CbC/CbC_gcc: gcc/config/rs6000/vector.md annotate

annotate gcc/config/rs6000/vector.md @ 63:b7f97abdc517 gcc-4.6-20100522

update gcc from gcc-4.5.0 to gcc-4.6

author	ryoma <e075725@ie.u-ryukyu.ac.jp>
date	Mon, 24 May 2010 12:47:05 +0900
parents	77e2b8dfacca
children	f6334be47118

rev	line source
55 77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1 ;; Expander definitions for vector support between altivec & vsx. No
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	2 ;; instructions are in this file, this file provides the generic vector
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	3 ;; expander, and the actual vector instructions will be in altivec.md and
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	4 ;; vsx.md
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	5
63 b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: 55 diff changeset	6 ;; Copyright (C) 2009, 2010
55 77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	7 ;; Free Software Foundation, Inc.
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	8 ;; Contributed by Michael Meissner <meissner@linux.vnet.ibm.com>
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	9
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	10 ;; This file is part of GCC.
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	11
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	12 ;; GCC is free software; you can redistribute it and/or modify it
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	13 ;; under the terms of the GNU General Public License as published
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	14 ;; by the Free Software Foundation; either version 3, or (at your
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	15 ;; option) any later version.
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	16
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	17 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	18 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	19 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	20 ;; License for more details.
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	21
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	22 ;; You should have received a copy of the GNU General Public License
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	23 ;; along with GCC; see the file COPYING3. If not see
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	24 ;; <http://www.gnu.org/licenses/>.
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	25
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	26
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	27 ;; Vector int modes
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	28 (define_mode_iterator VEC_I [V16QI V8HI V4SI])
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	29
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	30 ;; Vector float modes
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	31 (define_mode_iterator VEC_F [V4SF V2DF])
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	32
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	33 ;; Vector arithmetic modes
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	34 (define_mode_iterator VEC_A [V16QI V8HI V4SI V4SF V2DF])
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	35
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	36 ;; Vector modes that need alginment via permutes
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	37 (define_mode_iterator VEC_K [V16QI V8HI V4SI V4SF])
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	38
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	39 ;; Vector logical modes
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	40 (define_mode_iterator VEC_L [V16QI V8HI V4SI V2DI V4SF V2DF TI])
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	41
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	42 ;; Vector modes for moves. Don't do TImode here.
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	43 (define_mode_iterator VEC_M [V16QI V8HI V4SI V2DI V4SF V2DF])
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	44
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	45 ;; Vector modes for types that don't need a realignment under VSX
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	46 (define_mode_iterator VEC_N [V4SI V4SF V2DI V2DF])
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	47
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	48 ;; Vector comparison modes
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	49 (define_mode_iterator VEC_C [V16QI V8HI V4SI V4SF V2DF])
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	50
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	51 ;; Vector init/extract modes
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	52 (define_mode_iterator VEC_E [V16QI V8HI V4SI V2DI V4SF V2DF])
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	53
63 b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: 55 diff changeset	54 ;; Vector modes for 64-bit base types
b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: 55 diff changeset	55 (define_mode_iterator VEC_64 [V2DI V2DF])
b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: 55 diff changeset	56
55 77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	57 ;; Vector reload iterator
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	58 (define_mode_iterator VEC_R [V16QI V8HI V4SI V2DI V4SF V2DF DF TI])
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	59
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	60 ;; Base type from vector mode
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	61 (define_mode_attr VEC_base [(V16QI "QI")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	62 (V8HI "HI")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	63 (V4SI "SI")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	64 (V2DI "DI")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	65 (V4SF "SF")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	66 (V2DF "DF")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	67 (TI "TI")])
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	68
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	69 ;; Same size integer type for floating point data
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	70 (define_mode_attr VEC_int [(V4SF "v4si")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	71 (V2DF "v2di")])
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	72
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	73 (define_mode_attr VEC_INT [(V4SF "V4SI")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	74 (V2DF "V2DI")])
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	75
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	76 ;; constants for unspec
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	77 (define_constants
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	78 [(UNSPEC_PREDICATE 400)])
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	79
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	80
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	81 ;; Vector move instructions.
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	82 (define_expand "mov<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	83 [(set (match_operand:VEC_M 0 "nonimmediate_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	84 (match_operand:VEC_M 1 "any_operand" ""))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	85 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	86 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	87 if (can_create_pseudo_p ())
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	88 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	89 if (CONSTANT_P (operands[1])
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	90 && !easy_vector_constant (operands[1], <MODE>mode))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	91 operands[1] = force_const_mem (<MODE>mode, operands[1]);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	92
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	93 else if (!vlogical_operand (operands[0], <MODE>mode)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	94 && !vlogical_operand (operands[1], <MODE>mode))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	95 operands[1] = force_reg (<MODE>mode, operands[1]);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	96 }
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	97 })
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	98
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	99 ;; Generic vector floating point load/store instructions. These will match
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	100 ;; insns defined in vsx.md or altivec.md depending on the switches.
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	101 (define_expand "vector_load_<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	102 [(set (match_operand:VEC_M 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	103 (match_operand:VEC_M 1 "memory_operand" ""))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	104 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	105 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	106
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	107 (define_expand "vector_store_<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	108 [(set (match_operand:VEC_M 0 "memory_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	109 (match_operand:VEC_M 1 "vfloat_operand" ""))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	110 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	111 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	112
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	113 ;; Splits if a GPR register was chosen for the move
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	114 (define_split
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	115 [(set (match_operand:VEC_L 0 "nonimmediate_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	116 (match_operand:VEC_L 1 "input_operand" ""))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	117 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	118 && reload_completed
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	119 && gpr_or_gpr_p (operands[0], operands[1])"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	120 [(pc)]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	121 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	122 rs6000_split_multireg_move (operands[0], operands[1]);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	123 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	124 })
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	125
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	126
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	127 ;; Reload patterns for vector operations. We may need an addtional base
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	128 ;; register to convert the reg+offset addressing to reg+reg for vector
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	129 ;; registers and reg+reg or (reg+reg)&(-16) addressing to just an index
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	130 ;; register for gpr registers.
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	131 (define_expand "reload_<VEC_R:mode>_<P:mptrsize>_store"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	132 [(parallel [(match_operand:VEC_R 0 "memory_operand" "m")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	133 (match_operand:VEC_R 1 "gpc_reg_operand" "r")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	134 (match_operand:P 2 "register_operand" "=&b")])]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	135 "<P:tptrsize>"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	136 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	137 rs6000_secondary_reload_inner (operands[1], operands[0], operands[2], true);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	138 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	139 })
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	140
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	141 (define_expand "reload_<VEC_R:mode>_<P:mptrsize>_load"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	142 [(parallel [(match_operand:VEC_R 0 "gpc_reg_operand" "=&r")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	143 (match_operand:VEC_R 1 "memory_operand" "m")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	144 (match_operand:P 2 "register_operand" "=&b")])]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	145 "<P:tptrsize>"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	146 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	147 rs6000_secondary_reload_inner (operands[0], operands[1], operands[2], false);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	148 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	149 })
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	150
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	151 ;; Reload sometimes tries to move the address to a GPR, and can generate
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	152 ;; invalid RTL for addresses involving AND -16. Allow addresses involving
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	153 ;; reg+reg, reg+small constant, or just reg, all wrapped in an AND -16.
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	154
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	155 (define_insn_and_split "*vec_reload_and_plus_<mptrsize>"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	156 [(set (match_operand:P 0 "gpc_reg_operand" "=b")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	157 (and:P (plus:P (match_operand:P 1 "gpc_reg_operand" "r")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	158 (match_operand:P 2 "reg_or_cint_operand" "rI"))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	159 (const_int -16)))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	160 "(TARGET_ALTIVEC \|\| TARGET_VSX) && (reload_in_progress \|\| reload_completed)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	161 "#"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	162 "&& reload_completed"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	163 [(set (match_dup 0)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	164 (plus:P (match_dup 1)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	165 (match_dup 2)))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	166 (parallel [(set (match_dup 0)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	167 (and:P (match_dup 0)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	168 (const_int -16)))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	169 (clobber:CC (scratch:CC))])])
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	170
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	171 ;; The normal ANDSI3/ANDDI3 won't match if reload decides to move an AND -16
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	172 ;; address to a register because there is no clobber of a (scratch), so we add
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	173 ;; it here.
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	174 (define_insn_and_split "*vec_reload_and_reg_<mptrsize>"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	175 [(set (match_operand:P 0 "gpc_reg_operand" "=b")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	176 (and:P (match_operand:P 1 "gpc_reg_operand" "r")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	177 (const_int -16)))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	178 "(TARGET_ALTIVEC \|\| TARGET_VSX) && (reload_in_progress \|\| reload_completed)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	179 "#"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	180 "&& reload_completed"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	181 [(parallel [(set (match_dup 0)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	182 (and:P (match_dup 1)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	183 (const_int -16)))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	184 (clobber:CC (scratch:CC))])])
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	185
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	186 ;; Generic floating point vector arithmetic support
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	187 (define_expand "add<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	188 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	189 (plus:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	190 (match_operand:VEC_F 2 "vfloat_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	191 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	192 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	193
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	194 (define_expand "sub<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	195 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	196 (minus:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	197 (match_operand:VEC_F 2 "vfloat_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	198 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	199 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	200
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	201 (define_expand "mul<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	202 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	203 (mult:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	204 (match_operand:VEC_F 2 "vfloat_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	205 "(VECTOR_UNIT_VSX_P (<MODE>mode)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	206 \|\| (VECTOR_UNIT_ALTIVEC_P (<MODE>mode) && TARGET_FUSED_MADD))"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	207 "
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	208 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	209 if (<MODE>mode == V4SFmode && VECTOR_UNIT_ALTIVEC_P (<MODE>mode))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	210 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	211 emit_insn (gen_altivec_mulv4sf3 (operands[0], operands[1], operands[2]));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	212 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	213 }
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	214 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	215
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	216 (define_expand "div<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	217 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	218 (div:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	219 (match_operand:VEC_F 2 "vfloat_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	220 "VECTOR_UNIT_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	221 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	222
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	223 (define_expand "neg<mode>2"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	224 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	225 (neg:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	226 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	227 "
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	228 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	229 if (<MODE>mode == V4SFmode && VECTOR_UNIT_ALTIVEC_P (<MODE>mode))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	230 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	231 emit_insn (gen_altivec_negv4sf2 (operands[0], operands[1]));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	232 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	233 }
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	234 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	235
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	236 (define_expand "abs<mode>2"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	237 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	238 (abs:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	239 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	240 "
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	241 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	242 if (<MODE>mode == V4SFmode && VECTOR_UNIT_ALTIVEC_P (<MODE>mode))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	243 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	244 emit_insn (gen_altivec_absv4sf2 (operands[0], operands[1]));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	245 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	246 }
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	247 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	248
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	249 (define_expand "smin<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	250 [(set (match_operand:VEC_F 0 "register_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	251 (smin:VEC_F (match_operand:VEC_F 1 "register_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	252 (match_operand:VEC_F 2 "register_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	253 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	254 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	255
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	256 (define_expand "smax<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	257 [(set (match_operand:VEC_F 0 "register_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	258 (smax:VEC_F (match_operand:VEC_F 1 "register_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	259 (match_operand:VEC_F 2 "register_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	260 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	261 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	262
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	263
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	264 (define_expand "sqrt<mode>2"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	265 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	266 (sqrt:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	267 "VECTOR_UNIT_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	268 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	269
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	270 (define_expand "ftrunc<mode>2"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	271 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	272 (fix:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	273 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	274 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	275
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	276 (define_expand "vector_ceil<mode>2"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	277 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	278 (unspec:VEC_F [(match_operand:VEC_F 1 "vfloat_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	279 UNSPEC_FRIP))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	280 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	281 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	282
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	283 (define_expand "vector_floor<mode>2"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	284 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	285 (unspec:VEC_F [(match_operand:VEC_F 1 "vfloat_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	286 UNSPEC_FRIM))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	287 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	288 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	289
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	290 (define_expand "vector_btrunc<mode>2"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	291 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	292 (fix:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	293 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	294 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	295
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	296 (define_expand "vector_copysign<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	297 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	298 (if_then_else:VEC_F
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	299 (ge:VEC_F (match_operand:VEC_F 2 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	300 (match_dup 3))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	301 (abs:VEC_F (match_operand:VEC_F 1 "vfloat_operand" ""))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	302 (neg:VEC_F (abs:VEC_F (match_dup 1)))))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	303 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	304 "
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	305 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	306 if (<MODE>mode == V4SFmode && VECTOR_UNIT_ALTIVEC_P (<MODE>mode))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	307 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	308 emit_insn (gen_altivec_copysign_v4sf3 (operands[0], operands[1],
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	309 operands[2]));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	310 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	311 }
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	312
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	313 operands[3] = CONST0_RTX (<MODE>mode);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	314 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	315
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	316
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	317 ;; Vector comparisons
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	318 (define_expand "vcond<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	319 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	320 (if_then_else:VEC_F
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	321 (match_operator 3 "comparison_operator"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	322 [(match_operand:VEC_F 4 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	323 (match_operand:VEC_F 5 "vfloat_operand" "")])
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	324 (match_operand:VEC_F 1 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	325 (match_operand:VEC_F 2 "vfloat_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	326 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	327 "
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	328 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	329 if (rs6000_emit_vector_cond_expr (operands[0], operands[1], operands[2],
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	330 operands[3], operands[4], operands[5]))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	331 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	332 else
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	333 FAIL;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	334 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	335
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	336 (define_expand "vcond<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	337 [(set (match_operand:VEC_I 0 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	338 (if_then_else:VEC_I
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	339 (match_operator 3 "comparison_operator"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	340 [(match_operand:VEC_I 4 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	341 (match_operand:VEC_I 5 "vint_operand" "")])
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	342 (match_operand:VEC_I 1 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	343 (match_operand:VEC_I 2 "vint_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	344 "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	345 "
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	346 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	347 if (rs6000_emit_vector_cond_expr (operands[0], operands[1], operands[2],
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	348 operands[3], operands[4], operands[5]))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	349 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	350 else
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	351 FAIL;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	352 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	353
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	354 (define_expand "vcondu<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	355 [(set (match_operand:VEC_I 0 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	356 (if_then_else:VEC_I
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	357 (match_operator 3 "comparison_operator"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	358 [(match_operand:VEC_I 4 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	359 (match_operand:VEC_I 5 "vint_operand" "")])
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	360 (match_operand:VEC_I 1 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	361 (match_operand:VEC_I 2 "vint_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	362 "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	363 "
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	364 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	365 if (rs6000_emit_vector_cond_expr (operands[0], operands[1], operands[2],
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	366 operands[3], operands[4], operands[5]))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	367 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	368 else
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	369 FAIL;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	370 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	371
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	372 (define_expand "vector_eq<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	373 [(set (match_operand:VEC_C 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	374 (eq:VEC_C (match_operand:VEC_C 1 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	375 (match_operand:VEC_C 2 "vlogical_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	376 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	377 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	378
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	379 (define_expand "vector_gt<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	380 [(set (match_operand:VEC_C 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	381 (gt:VEC_C (match_operand:VEC_C 1 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	382 (match_operand:VEC_C 2 "vlogical_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	383 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	384 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	385
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	386 (define_expand "vector_ge<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	387 [(set (match_operand:VEC_C 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	388 (ge:VEC_C (match_operand:VEC_C 1 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	389 (match_operand:VEC_C 2 "vlogical_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	390 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	391 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	392
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	393 (define_expand "vector_gtu<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	394 [(set (match_operand:VEC_I 0 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	395 (gtu:VEC_I (match_operand:VEC_I 1 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	396 (match_operand:VEC_I 2 "vint_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	397 "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	398 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	399
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	400 (define_expand "vector_geu<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	401 [(set (match_operand:VEC_I 0 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	402 (geu:VEC_I (match_operand:VEC_I 1 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	403 (match_operand:VEC_I 2 "vint_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	404 "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	405 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	406
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	407 ;; Note the arguments for __builtin_altivec_vsel are op2, op1, mask
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	408 ;; which is in the reverse order that we want
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	409 (define_expand "vector_select_<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	410 [(set (match_operand:VEC_L 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	411 (if_then_else:VEC_L
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	412 (ne:CC (match_operand:VEC_L 3 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	413 (const_int 0))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	414 (match_operand:VEC_L 2 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	415 (match_operand:VEC_L 1 "vlogical_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	416 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	417 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	418
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	419 (define_expand "vector_select_<mode>_uns"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	420 [(set (match_operand:VEC_L 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	421 (if_then_else:VEC_L
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	422 (ne:CCUNS (match_operand:VEC_L 3 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	423 (const_int 0))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	424 (match_operand:VEC_L 2 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	425 (match_operand:VEC_L 1 "vlogical_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	426 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	427 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	428
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	429 ;; Expansions that compare vectors producing a vector result and a predicate,
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	430 ;; setting CR6 to indicate a combined status
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	431 (define_expand "vector_eq_<mode>_p"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	432 [(parallel
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	433 [(set (reg:CC 74)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	434 (unspec:CC [(eq:CC (match_operand:VEC_A 1 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	435 (match_operand:VEC_A 2 "vlogical_operand" ""))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	436 UNSPEC_PREDICATE))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	437 (set (match_operand:VEC_A 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	438 (eq:VEC_A (match_dup 1)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	439 (match_dup 2)))])]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	440 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	441 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	442
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	443 (define_expand "vector_gt_<mode>_p"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	444 [(parallel
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	445 [(set (reg:CC 74)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	446 (unspec:CC [(gt:CC (match_operand:VEC_A 1 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	447 (match_operand:VEC_A 2 "vlogical_operand" ""))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	448 UNSPEC_PREDICATE))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	449 (set (match_operand:VEC_A 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	450 (gt:VEC_A (match_dup 1)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	451 (match_dup 2)))])]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	452 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	453 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	454
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	455 (define_expand "vector_ge_<mode>_p"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	456 [(parallel
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	457 [(set (reg:CC 74)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	458 (unspec:CC [(ge:CC (match_operand:VEC_F 1 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	459 (match_operand:VEC_F 2 "vfloat_operand" ""))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	460 UNSPEC_PREDICATE))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	461 (set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	462 (ge:VEC_F (match_dup 1)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	463 (match_dup 2)))])]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	464 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	465 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	466
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	467 (define_expand "vector_gtu_<mode>_p"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	468 [(parallel
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	469 [(set (reg:CC 74)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	470 (unspec:CC [(gtu:CC (match_operand:VEC_I 1 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	471 (match_operand:VEC_I 2 "vint_operand" ""))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	472 UNSPEC_PREDICATE))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	473 (set (match_operand:VEC_I 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	474 (gtu:VEC_I (match_dup 1)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	475 (match_dup 2)))])]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	476 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	477 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	478
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	479 ;; AltiVec/VSX predicates.
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	480
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	481 (define_expand "cr6_test_for_zero"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	482 [(set (match_operand:SI 0 "register_operand" "=r")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	483 (eq:SI (reg:CC 74)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	484 (const_int 0)))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	485 "TARGET_ALTIVEC \|\| TARGET_VSX"
63 b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: 55 diff changeset	486 "")
55 77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	487
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	488 (define_expand "cr6_test_for_zero_reverse"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	489 [(set (match_operand:SI 0 "register_operand" "=r")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	490 (eq:SI (reg:CC 74)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	491 (const_int 0)))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	492 (set (match_dup 0) (minus:SI (const_int 1) (match_dup 0)))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	493 "TARGET_ALTIVEC \|\| TARGET_VSX"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	494 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	495
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	496 (define_expand "cr6_test_for_lt"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	497 [(set (match_operand:SI 0 "register_operand" "=r")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	498 (lt:SI (reg:CC 74)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	499 (const_int 0)))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	500 "TARGET_ALTIVEC \|\| TARGET_VSX"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	501 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	502
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	503 (define_expand "cr6_test_for_lt_reverse"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	504 [(set (match_operand:SI 0 "register_operand" "=r")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	505 (lt:SI (reg:CC 74)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	506 (const_int 0)))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	507 (set (match_dup 0) (minus:SI (const_int 1) (match_dup 0)))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	508 "TARGET_ALTIVEC \|\| TARGET_VSX"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	509 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	510
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	511
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	512 ;; Vector logical instructions
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	513 (define_expand "xor<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	514 [(set (match_operand:VEC_L 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	515 (xor:VEC_L (match_operand:VEC_L 1 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	516 (match_operand:VEC_L 2 "vlogical_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	517 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	518 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	519
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	520 (define_expand "ior<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	521 [(set (match_operand:VEC_L 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	522 (ior:VEC_L (match_operand:VEC_L 1 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	523 (match_operand:VEC_L 2 "vlogical_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	524 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	525 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	526
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	527 (define_expand "and<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	528 [(set (match_operand:VEC_L 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	529 (and:VEC_L (match_operand:VEC_L 1 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	530 (match_operand:VEC_L 2 "vlogical_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	531 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	532 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	533
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	534 (define_expand "one_cmpl<mode>2"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	535 [(set (match_operand:VEC_L 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	536 (not:VEC_L (match_operand:VEC_L 1 "vlogical_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	537 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	538 "")
63 b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: 55 diff changeset	539
55 77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	540 (define_expand "nor<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	541 [(set (match_operand:VEC_L 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	542 (not:VEC_L (ior:VEC_L (match_operand:VEC_L 1 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	543 (match_operand:VEC_L 2 "vlogical_operand" ""))))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	544 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	545 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	546
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	547 (define_expand "andc<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	548 [(set (match_operand:VEC_L 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	549 (and:VEC_L (not:VEC_L (match_operand:VEC_L 2 "vlogical_operand" ""))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	550 (match_operand:VEC_L 1 "vlogical_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	551 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	552 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	553
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	554 ;; Same size conversions
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	555 (define_expand "float<VEC_int><mode>2"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	556 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	557 (float:VEC_F (match_operand:<VEC_INT> 1 "vint_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	558 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	559 "
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	560 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	561 if (<MODE>mode == V4SFmode && VECTOR_UNIT_ALTIVEC_P (<MODE>mode))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	562 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	563 emit_insn (gen_altivec_vcfsx (operands[0], operands[1], const0_rtx));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	564 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	565 }
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	566 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	567
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	568 (define_expand "unsigned_float<VEC_int><mode>2"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	569 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	570 (unsigned_float:VEC_F (match_operand:<VEC_INT> 1 "vint_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	571 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	572 "
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	573 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	574 if (<MODE>mode == V4SFmode && VECTOR_UNIT_ALTIVEC_P (<MODE>mode))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	575 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	576 emit_insn (gen_altivec_vcfux (operands[0], operands[1], const0_rtx));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	577 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	578 }
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	579 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	580
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	581 (define_expand "fix_trunc<mode><VEC_int>2"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	582 [(set (match_operand:<VEC_INT> 0 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	583 (fix:<VEC_INT> (match_operand:VEC_F 1 "vfloat_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	584 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	585 "
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	586 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	587 if (<MODE>mode == V4SFmode && VECTOR_UNIT_ALTIVEC_P (<MODE>mode))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	588 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	589 emit_insn (gen_altivec_vctsxs (operands[0], operands[1], const0_rtx));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	590 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	591 }
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	592 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	593
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	594 (define_expand "fixuns_trunc<mode><VEC_int>2"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	595 [(set (match_operand:<VEC_INT> 0 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	596 (unsigned_fix:<VEC_INT> (match_operand:VEC_F 1 "vfloat_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	597 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	598 "
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	599 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	600 if (<MODE>mode == V4SFmode && VECTOR_UNIT_ALTIVEC_P (<MODE>mode))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	601 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	602 emit_insn (gen_altivec_vctuxs (operands[0], operands[1], const0_rtx));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	603 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	604 }
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	605 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	606
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	607
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	608 ;; Vector initialization, set, extract
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	609 (define_expand "vec_init<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	610 [(match_operand:VEC_E 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	611 (match_operand:VEC_E 1 "" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	612 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	613 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	614 rs6000_expand_vector_init (operands[0], operands[1]);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	615 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	616 })
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	617
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	618 (define_expand "vec_set<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	619 [(match_operand:VEC_E 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	620 (match_operand:<VEC_base> 1 "register_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	621 (match_operand 2 "const_int_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	622 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	623 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	624 rs6000_expand_vector_set (operands[0], operands[1], INTVAL (operands[2]));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	625 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	626 })
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	627
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	628 (define_expand "vec_extract<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	629 [(match_operand:<VEC_base> 0 "register_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	630 (match_operand:VEC_E 1 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	631 (match_operand 2 "const_int_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	632 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	633 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	634 rs6000_expand_vector_extract (operands[0], operands[1],
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	635 INTVAL (operands[2]));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	636 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	637 })
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	638
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	639 ;; Interleave patterns
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	640 (define_expand "vec_interleave_highv4sf"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	641 [(set (match_operand:V4SF 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	642 (vec_merge:V4SF
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	643 (vec_select:V4SF (match_operand:V4SF 1 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	644 (parallel [(const_int 0)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	645 (const_int 2)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	646 (const_int 1)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	647 (const_int 3)]))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	648 (vec_select:V4SF (match_operand:V4SF 2 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	649 (parallel [(const_int 2)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	650 (const_int 0)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	651 (const_int 3)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	652 (const_int 1)]))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	653 (const_int 5)))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	654 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SFmode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	655 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	656
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	657 (define_expand "vec_interleave_lowv4sf"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	658 [(set (match_operand:V4SF 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	659 (vec_merge:V4SF
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	660 (vec_select:V4SF (match_operand:V4SF 1 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	661 (parallel [(const_int 2)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	662 (const_int 0)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	663 (const_int 3)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	664 (const_int 1)]))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	665 (vec_select:V4SF (match_operand:V4SF 2 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	666 (parallel [(const_int 0)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	667 (const_int 2)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	668 (const_int 1)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	669 (const_int 3)]))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	670 (const_int 5)))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	671 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SFmode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	672 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	673
63 b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: 55 diff changeset	674 (define_expand "vec_interleave_high<mode>"
b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: 55 diff changeset	675 [(set (match_operand:VEC_64 0 "vfloat_operand" "")
b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: 55 diff changeset	676 (vec_concat:VEC_64
b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: 55 diff changeset	677 (vec_select:<VEC_base> (match_operand:VEC_64 1 "vfloat_operand" "")
b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: 55 diff changeset	678 (parallel [(const_int 0)]))
b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: 55 diff changeset	679 (vec_select:<VEC_base> (match_operand:VEC_64 2 "vfloat_operand" "")
b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: 55 diff changeset	680 (parallel [(const_int 0)]))))]
b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: 55 diff changeset	681 "VECTOR_UNIT_VSX_P (<MODE>mode)"
55 77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	682 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	683
63 b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: 55 diff changeset	684 (define_expand "vec_interleave_low<mode>"
b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: 55 diff changeset	685 [(set (match_operand:VEC_64 0 "vfloat_operand" "")
b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: 55 diff changeset	686 (vec_concat:VEC_64
b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: 55 diff changeset	687 (vec_select:<VEC_base> (match_operand:VEC_64 1 "vfloat_operand" "")
b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: 55 diff changeset	688 (parallel [(const_int 1)]))
b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: 55 diff changeset	689 (vec_select:<VEC_base> (match_operand:VEC_64 2 "vfloat_operand" "")
b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: 55 diff changeset	690 (parallel [(const_int 1)]))))]
b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: 55 diff changeset	691 "VECTOR_UNIT_VSX_P (<MODE>mode)"
55 77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	692 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	693
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	694
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	695 ;; Convert double word types to single word types
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	696 (define_expand "vec_pack_trunc_v2df"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	697 [(match_operand:V4SF 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	698 (match_operand:V2DF 1 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	699 (match_operand:V2DF 2 "vfloat_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	700 "VECTOR_UNIT_VSX_P (V2DFmode) && TARGET_ALTIVEC"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	701 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	702 rtx r1 = gen_reg_rtx (V4SFmode);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	703 rtx r2 = gen_reg_rtx (V4SFmode);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	704
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	705 emit_insn (gen_vsx_xvcvdpsp (r1, operands[1]));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	706 emit_insn (gen_vsx_xvcvdpsp (r2, operands[2]));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	707 emit_insn (gen_vec_extract_evenv4sf (operands[0], r1, r2));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	708 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	709 })
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	710
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	711 (define_expand "vec_pack_sfix_trunc_v2df"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	712 [(match_operand:V4SI 0 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	713 (match_operand:V2DF 1 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	714 (match_operand:V2DF 2 "vfloat_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	715 "VECTOR_UNIT_VSX_P (V2DFmode) && TARGET_ALTIVEC"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	716 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	717 rtx r1 = gen_reg_rtx (V4SImode);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	718 rtx r2 = gen_reg_rtx (V4SImode);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	719
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	720 emit_insn (gen_vsx_xvcvdpsxws (r1, operands[1]));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	721 emit_insn (gen_vsx_xvcvdpsxws (r2, operands[2]));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	722 emit_insn (gen_vec_extract_evenv4si (operands[0], r1, r2));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	723 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	724 })
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	725
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	726 (define_expand "vec_pack_ufix_trunc_v2df"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	727 [(match_operand:V4SI 0 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	728 (match_operand:V2DF 1 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	729 (match_operand:V2DF 2 "vfloat_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	730 "VECTOR_UNIT_VSX_P (V2DFmode) && TARGET_ALTIVEC"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	731 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	732 rtx r1 = gen_reg_rtx (V4SImode);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	733 rtx r2 = gen_reg_rtx (V4SImode);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	734
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	735 emit_insn (gen_vsx_xvcvdpuxws (r1, operands[1]));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	736 emit_insn (gen_vsx_xvcvdpuxws (r2, operands[2]));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	737 emit_insn (gen_vec_extract_evenv4si (operands[0], r1, r2));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	738 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	739 })
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	740
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	741 ;; Convert single word types to double word
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	742 (define_expand "vec_unpacks_hi_v4sf"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	743 [(match_operand:V2DF 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	744 (match_operand:V4SF 1 "vfloat_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	745 "VECTOR_UNIT_VSX_P (V2DFmode) && VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SFmode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	746 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	747 rtx reg = gen_reg_rtx (V4SFmode);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	748
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	749 emit_insn (gen_vec_interleave_highv4sf (reg, operands[1], operands[1]));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	750 emit_insn (gen_vsx_xvcvspdp (operands[0], reg));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	751 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	752 })
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	753
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	754 (define_expand "vec_unpacks_lo_v4sf"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	755 [(match_operand:V2DF 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	756 (match_operand:V4SF 1 "vfloat_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	757 "VECTOR_UNIT_VSX_P (V2DFmode) && VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SFmode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	758 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	759 rtx reg = gen_reg_rtx (V4SFmode);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	760
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	761 emit_insn (gen_vec_interleave_lowv4sf (reg, operands[1], operands[1]));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	762 emit_insn (gen_vsx_xvcvspdp (operands[0], reg));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	763 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	764 })
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	765
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	766 (define_expand "vec_unpacks_float_hi_v4si"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	767 [(match_operand:V2DF 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	768 (match_operand:V4SI 1 "vint_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	769 "VECTOR_UNIT_VSX_P (V2DFmode) && VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SImode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	770 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	771 rtx reg = gen_reg_rtx (V4SImode);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	772
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	773 emit_insn (gen_vec_interleave_highv4si (reg, operands[1], operands[1]));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	774 emit_insn (gen_vsx_xvcvsxwdp (operands[0], reg));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	775 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	776 })
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	777
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	778 (define_expand "vec_unpacks_float_lo_v4si"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	779 [(match_operand:V2DF 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	780 (match_operand:V4SI 1 "vint_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	781 "VECTOR_UNIT_VSX_P (V2DFmode) && VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SImode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	782 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	783 rtx reg = gen_reg_rtx (V4SImode);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	784
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	785 emit_insn (gen_vec_interleave_lowv4si (reg, operands[1], operands[1]));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	786 emit_insn (gen_vsx_xvcvsxwdp (operands[0], reg));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	787 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	788 })
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	789
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	790 (define_expand "vec_unpacku_float_hi_v4si"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	791 [(match_operand:V2DF 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	792 (match_operand:V4SI 1 "vint_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	793 "VECTOR_UNIT_VSX_P (V2DFmode) && VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SImode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	794 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	795 rtx reg = gen_reg_rtx (V4SImode);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	796
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	797 emit_insn (gen_vec_interleave_highv4si (reg, operands[1], operands[1]));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	798 emit_insn (gen_vsx_xvcvuxwdp (operands[0], reg));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	799 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	800 })
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	801
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	802 (define_expand "vec_unpacku_float_lo_v4si"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	803 [(match_operand:V2DF 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	804 (match_operand:V4SI 1 "vint_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	805 "VECTOR_UNIT_VSX_P (V2DFmode) && VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SImode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	806 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	807 rtx reg = gen_reg_rtx (V4SImode);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	808
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	809 emit_insn (gen_vec_interleave_lowv4si (reg, operands[1], operands[1]));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	810 emit_insn (gen_vsx_xvcvuxwdp (operands[0], reg));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	811 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	812 })
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	813
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	814
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	815 ;; Align vector loads with a permute.
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	816 (define_expand "vec_realign_load_<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	817 [(match_operand:VEC_K 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	818 (match_operand:VEC_K 1 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	819 (match_operand:VEC_K 2 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	820 (match_operand:V16QI 3 "vlogical_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	821 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	822 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	823 emit_insn (gen_altivec_vperm_<mode> (operands[0], operands[1], operands[2],
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	824 operands[3]));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	825 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	826 })
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	827
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	828 ;; Under VSX, vectors of 4/8 byte alignments do not need to be aligned
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	829 ;; since the load already handles it.
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	830 (define_expand "movmisalign<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	831 [(set (match_operand:VEC_N 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	832 (match_operand:VEC_N 1 "vfloat_operand" ""))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	833 "VECTOR_MEM_VSX_P (<MODE>mode) && TARGET_ALLOW_MOVMISALIGN"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	834 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	835
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	836
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	837 ;; Vector shift left in bits. Currently supported ony for shift
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	838 ;; amounts that can be expressed as byte shifts (divisible by 8).
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	839 ;; General shift amounts can be supported using vslo + vsl. We're
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	840 ;; not expecting to see these yet (the vectorizer currently
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	841 ;; generates only shifts divisible by byte_size).
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	842 (define_expand "vec_shl_<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	843 [(match_operand:VEC_L 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	844 (match_operand:VEC_L 1 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	845 (match_operand:QI 2 "reg_or_short_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	846 "TARGET_ALTIVEC"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	847 "
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	848 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	849 rtx bitshift = operands[2];
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	850 rtx shift;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	851 rtx insn;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	852 HOST_WIDE_INT bitshift_val;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	853 HOST_WIDE_INT byteshift_val;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	854
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	855 if (! CONSTANT_P (bitshift))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	856 FAIL;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	857 bitshift_val = INTVAL (bitshift);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	858 if (bitshift_val & 0x7)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	859 FAIL;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	860 byteshift_val = bitshift_val >> 3;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	861 if (TARGET_VSX && (byteshift_val & 0x3) == 0)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	862 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	863 shift = gen_rtx_CONST_INT (QImode, byteshift_val >> 2);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	864 insn = gen_vsx_xxsldwi_<mode> (operands[0], operands[1], operands[1],
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	865 shift);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	866 }
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	867 else
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	868 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	869 shift = gen_rtx_CONST_INT (QImode, byteshift_val);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	870 insn = gen_altivec_vsldoi_<mode> (operands[0], operands[1], operands[1],
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	871 shift);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	872 }
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	873
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	874 emit_insn (insn);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	875 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	876 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	877
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	878 ;; Vector shift right in bits. Currently supported ony for shift
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	879 ;; amounts that can be expressed as byte shifts (divisible by 8).
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	880 ;; General shift amounts can be supported using vsro + vsr. We're
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	881 ;; not expecting to see these yet (the vectorizer currently
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	882 ;; generates only shifts divisible by byte_size).
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	883 (define_expand "vec_shr_<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	884 [(match_operand:VEC_L 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	885 (match_operand:VEC_L 1 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	886 (match_operand:QI 2 "reg_or_short_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	887 "TARGET_ALTIVEC"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	888 "
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	889 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	890 rtx bitshift = operands[2];
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	891 rtx shift;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	892 rtx insn;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	893 HOST_WIDE_INT bitshift_val;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	894 HOST_WIDE_INT byteshift_val;
63 b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: 55 diff changeset	895
55 77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	896 if (! CONSTANT_P (bitshift))
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	897 FAIL;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	898 bitshift_val = INTVAL (bitshift);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	899 if (bitshift_val & 0x7)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	900 FAIL;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	901 byteshift_val = 16 - (bitshift_val >> 3);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	902 if (TARGET_VSX && (byteshift_val & 0x3) == 0)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	903 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	904 shift = gen_rtx_CONST_INT (QImode, byteshift_val >> 2);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	905 insn = gen_vsx_xxsldwi_<mode> (operands[0], operands[1], operands[1],
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	906 shift);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	907 }
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	908 else
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	909 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	910 shift = gen_rtx_CONST_INT (QImode, byteshift_val);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	911 insn = gen_altivec_vsldoi_<mode> (operands[0], operands[1], operands[1],
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	912 shift);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	913 }
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	914
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	915 emit_insn (insn);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	916 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	917 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	918
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	919 ;; Expanders for rotate each element in a vector
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	920 (define_expand "vrotl<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	921 [(set (match_operand:VEC_I 0 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	922 (rotate:VEC_I (match_operand:VEC_I 1 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	923 (match_operand:VEC_I 2 "vint_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	924 "TARGET_ALTIVEC"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	925 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	926
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	927 ;; Expanders for arithmetic shift left on each vector element
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	928 (define_expand "vashl<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	929 [(set (match_operand:VEC_I 0 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	930 (ashift:VEC_I (match_operand:VEC_I 1 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	931 (match_operand:VEC_I 2 "vint_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	932 "TARGET_ALTIVEC"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	933 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	934
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	935 ;; Expanders for logical shift right on each vector element
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	936 (define_expand "vlshr<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	937 [(set (match_operand:VEC_I 0 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	938 (lshiftrt:VEC_I (match_operand:VEC_I 1 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	939 (match_operand:VEC_I 2 "vint_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	940 "TARGET_ALTIVEC"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	941 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	942
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	943 ;; Expanders for arithmetic shift right on each vector element
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	944 (define_expand "vashr<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	945 [(set (match_operand:VEC_I 0 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	946 (ashiftrt:VEC_I (match_operand:VEC_I 1 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	947 (match_operand:VEC_I 2 "vint_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	948 "TARGET_ALTIVEC"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	949 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	950
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	951 ;;; Expanders for vector insn patterns shared between the SPE and TARGET_PAIRED systems.
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	952
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	953 (define_expand "absv2sf2"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	954 [(set (match_operand:V2SF 0 "gpc_reg_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	955 (abs:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	956 "TARGET_PAIRED_FLOAT \|\| TARGET_SPE"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	957 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	958
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	959 (define_expand "negv2sf2"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	960 [(set (match_operand:V2SF 0 "gpc_reg_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	961 (neg:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	962 "TARGET_PAIRED_FLOAT \|\| TARGET_SPE"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	963 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	964
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	965 (define_expand "addv2sf3"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	966 [(set (match_operand:V2SF 0 "gpc_reg_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	967 (plus:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	968 (match_operand:V2SF 2 "gpc_reg_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	969 "TARGET_PAIRED_FLOAT \|\| TARGET_SPE"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	970 "
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	971 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	972 if (TARGET_SPE)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	973 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	974 /* We need to make a note that we clobber SPEFSCR. */
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	975 rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (2));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	976
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	977 XVECEXP (par, 0, 0) = gen_rtx_SET (VOIDmode, operands[0],
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	978 gen_rtx_PLUS (V2SFmode, operands[1], operands[2]));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	979 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	980 emit_insn (par);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	981 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	982 }
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	983 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	984
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	985 (define_expand "subv2sf3"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	986 [(set (match_operand:V2SF 0 "gpc_reg_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	987 (minus:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	988 (match_operand:V2SF 2 "gpc_reg_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	989 "TARGET_PAIRED_FLOAT \|\| TARGET_SPE"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	990 "
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	991 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	992 if (TARGET_SPE)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	993 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	994 /* We need to make a note that we clobber SPEFSCR. */
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	995 rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (2));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	996
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	997 XVECEXP (par, 0, 0) = gen_rtx_SET (VOIDmode, operands[0],
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	998 gen_rtx_MINUS (V2SFmode, operands[1], operands[2]));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	999 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1000 emit_insn (par);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1001 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1002 }
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1003 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1004
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1005 (define_expand "mulv2sf3"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1006 [(set (match_operand:V2SF 0 "gpc_reg_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1007 (mult:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1008 (match_operand:V2SF 2 "gpc_reg_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1009 "TARGET_PAIRED_FLOAT \|\| TARGET_SPE"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1010 "
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1011 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1012 if (TARGET_SPE)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1013 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1014 /* We need to make a note that we clobber SPEFSCR. */
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1015 rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (2));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1016
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1017 XVECEXP (par, 0, 0) = gen_rtx_SET (VOIDmode, operands[0],
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1018 gen_rtx_MULT (V2SFmode, operands[1], operands[2]));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1019 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1020 emit_insn (par);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1021 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1022 }
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1023 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1024
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1025 (define_expand "divv2sf3"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1026 [(set (match_operand:V2SF 0 "gpc_reg_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1027 (div:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1028 (match_operand:V2SF 2 "gpc_reg_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1029 "TARGET_PAIRED_FLOAT \|\| TARGET_SPE"
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1030 "
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1031 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1032 if (TARGET_SPE)
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1033 {
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1034 /* We need to make a note that we clobber SPEFSCR. */
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1035 rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (2));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1036
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1037 XVECEXP (par, 0, 0) = gen_rtx_SET (VOIDmode, operands[0],
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1038 gen_rtx_DIV (V2SFmode, operands[1], operands[2]));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1039 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO));
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1040 emit_insn (par);
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1041 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1042 }
77e2b8dfacca update it from 4.4.3 to 4.5.0 ryoma <e075725@ie.u-ryukyu.ac.jp> parents: diff changeset	1043 }")

Mercurial > hg > CbC > CbC_gcc

annotate gcc/config/rs6000/vector.md @ 63:b7f97abdc517 gcc-4.6-20100522