Mercurial > hg > CbC > CbC_gcc
annotate gcc/rtl.def @ 142:c83ff0b5a2ed
merge
author | Shinji KONO <kono@ie.u-ryukyu.ac.jp> |
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date | Thu, 22 Nov 2018 19:45:33 +0900 |
parents | 84e7813d76e9 |
children | 1830386684a0 |
rev | line source |
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0 | 1 /* This file contains the definitions and documentation for the |
2 Register Transfer Expressions (rtx's) that make up the | |
3 Register Transfer Language (rtl) used in the Back End of the GNU compiler. | |
131 | 4 Copyright (C) 1987-2018 Free Software Foundation, Inc. |
0 | 5 |
6 This file is part of GCC. | |
7 | |
8 GCC is free software; you can redistribute it and/or modify it under | |
9 the terms of the GNU General Public License as published by the Free | |
10 Software Foundation; either version 3, or (at your option) any later | |
11 version. | |
12 | |
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
16 for more details. | |
17 | |
18 You should have received a copy of the GNU General Public License | |
19 along with GCC; see the file COPYING3. If not see | |
20 <http://www.gnu.org/licenses/>. */ | |
21 | |
22 | |
23 /* Expression definitions and descriptions for all targets are in this file. | |
24 Some will not be used for some targets. | |
25 | |
26 The fields in the cpp macro call "DEF_RTL_EXPR()" | |
27 are used to create declarations in the C source of the compiler. | |
28 | |
29 The fields are: | |
30 | |
31 1. The internal name of the rtx used in the C source. | |
32 It is a tag in the enumeration "enum rtx_code" defined in "rtl.h". | |
33 By convention these are in UPPER_CASE. | |
34 | |
35 2. The name of the rtx in the external ASCII format read by | |
36 read_rtx(), and printed by print_rtx(). | |
37 These names are stored in rtx_name[]. | |
38 By convention these are the internal (field 1) names in lower_case. | |
39 | |
40 3. The print format, and type of each rtx->u.fld[] (field) in this rtx. | |
41 These formats are stored in rtx_format[]. | |
42 The meaning of the formats is documented in front of this array in rtl.c | |
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43 |
0 | 44 4. The class of the rtx. These are stored in rtx_class and are accessed |
45 via the GET_RTX_CLASS macro. They are defined as follows: | |
46 | |
47 RTX_CONST_OBJ | |
48 an rtx code that can be used to represent a constant object | |
49 (e.g, CONST_INT) | |
50 RTX_OBJ | |
51 an rtx code that can be used to represent an object (e.g, REG, MEM) | |
52 RTX_COMPARE | |
53 an rtx code for a comparison (e.g, LT, GT) | |
54 RTX_COMM_COMPARE | |
55 an rtx code for a commutative comparison (e.g, EQ, NE, ORDERED) | |
56 RTX_UNARY | |
57 an rtx code for a unary arithmetic expression (e.g, NEG, NOT) | |
58 RTX_COMM_ARITH | |
59 an rtx code for a commutative binary operation (e.g,, PLUS, MULT) | |
60 RTX_TERNARY | |
61 an rtx code for a non-bitfield three input operation (IF_THEN_ELSE) | |
62 RTX_BIN_ARITH | |
63 an rtx code for a non-commutative binary operation (e.g., MINUS, DIV) | |
64 RTX_BITFIELD_OPS | |
65 an rtx code for a bit-field operation (ZERO_EXTRACT, SIGN_EXTRACT) | |
66 RTX_INSN | |
111 | 67 an rtx code for a machine insn (INSN, JUMP_INSN, CALL_INSN) or |
68 data that will be output as assembly pseudo-ops (DEBUG_INSN) | |
0 | 69 RTX_MATCH |
70 an rtx code for something that matches in insns (e.g, MATCH_DUP) | |
71 RTX_AUTOINC | |
72 an rtx code for autoincrement addressing modes (e.g. POST_DEC) | |
73 RTX_EXTRA | |
74 everything else | |
75 | |
76 All of the expressions that appear only in machine descriptions, | |
77 not in RTL used by the compiler itself, are at the end of the file. */ | |
78 | |
79 /* Unknown, or no such operation; the enumeration constant should have | |
80 value zero. */ | |
81 DEF_RTL_EXPR(UNKNOWN, "UnKnown", "*", RTX_EXTRA) | |
82 | |
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83 /* Used in the cselib routines to describe a value. Objects of this |
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84 kind are only allocated in cselib.c, in an alloc pool instead of in |
111 | 85 GC memory. The only operand of a VALUE is a cselib_val. |
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86 var-tracking requires this to have a distinct integral value from |
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87 DECL codes in trees. */ |
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88 DEF_RTL_EXPR(VALUE, "value", "0", RTX_OBJ) |
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89 |
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90 /* The RTL generated for a DEBUG_EXPR_DECL. It links back to the |
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91 DEBUG_EXPR_DECL in the first operand. */ |
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92 DEF_RTL_EXPR(DEBUG_EXPR, "debug_expr", "0", RTX_OBJ) |
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93 |
0 | 94 /* --------------------------------------------------------------------- |
95 Expressions used in constructing lists. | |
96 --------------------------------------------------------------------- */ | |
97 | |
111 | 98 /* A linked list of expressions. */ |
0 | 99 DEF_RTL_EXPR(EXPR_LIST, "expr_list", "ee", RTX_EXTRA) |
100 | |
111 | 101 /* A linked list of instructions. |
0 | 102 The insns are represented in print by their uids. */ |
103 DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", RTX_EXTRA) | |
104 | |
111 | 105 /* A linked list of integers. */ |
106 DEF_RTL_EXPR(INT_LIST, "int_list", "ie", RTX_EXTRA) | |
107 | |
108 /* SEQUENCE is used in late passes of the compiler to group insns for | |
109 one reason or another. | |
110 | |
111 For example, after delay slot filling, branch instructions with filled | |
112 delay slots are represented as a SEQUENCE of length 1 + n_delay_slots, | |
113 with the branch instruction in XEXPVEC(seq, 0, 0) and the instructions | |
114 occupying the delay slots in the remaining XEXPVEC slots. | |
115 | |
116 Another place where a SEQUENCE may appear, is in REG_FRAME_RELATED_EXPR | |
117 notes, to express complex operations that are not obvious from the insn | |
118 to which the REG_FRAME_RELATED_EXPR note is attached. In this usage of | |
119 SEQUENCE, the sequence vector slots do not hold real instructions but | |
120 only pseudo-instructions that can be translated to DWARF CFA expressions. | |
121 | |
122 Some back ends also use SEQUENCE to group insns in bundles. | |
123 | |
124 Much of the compiler infrastructure is not prepared to handle SEQUENCE | |
125 objects. Only passes after pass_free_cfg are expected to handle them. */ | |
0 | 126 DEF_RTL_EXPR(SEQUENCE, "sequence", "E", RTX_EXTRA) |
127 | |
111 | 128 /* Represents a non-global base address. This is only used in alias.c. */ |
129 DEF_RTL_EXPR(ADDRESS, "address", "i", RTX_EXTRA) | |
0 | 130 |
131 /* ---------------------------------------------------------------------- | |
132 Expression types used for things in the instruction chain. | |
133 | |
111 | 134 All formats must start with "uu" to handle the chain. |
0 | 135 Each insn expression holds an rtl instruction and its semantics |
136 during back-end processing. | |
111 | 137 See macros in "rtl.h" for the meaning of each rtx->u.fld[]. |
0 | 138 |
139 ---------------------------------------------------------------------- */ | |
140 | |
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141 /* An annotation for variable assignment tracking. */ |
111 | 142 DEF_RTL_EXPR(DEBUG_INSN, "debug_insn", "uuBeiie", RTX_INSN) |
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143 |
0 | 144 /* An instruction that cannot jump. */ |
111 | 145 DEF_RTL_EXPR(INSN, "insn", "uuBeiie", RTX_INSN) |
0 | 146 |
147 /* An instruction that can possibly jump. | |
148 Fields ( rtx->u.fld[] ) have exact same meaning as INSN's. */ | |
111 | 149 DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "uuBeiie0", RTX_INSN) |
0 | 150 |
151 /* An instruction that can possibly call a subroutine | |
152 but which will not change which instruction comes next | |
153 in the current function. | |
154 Field ( rtx->u.fld[8] ) is CALL_INSN_FUNCTION_USAGE. | |
155 All other fields ( rtx->u.fld[] ) have exact same meaning as INSN's. */ | |
111 | 156 DEF_RTL_EXPR(CALL_INSN, "call_insn", "uuBeiiee", RTX_INSN) |
157 | |
158 /* Placeholder for tablejump JUMP_INSNs. The pattern of this kind | |
159 of rtx is always either an ADDR_VEC or an ADDR_DIFF_VEC. These | |
160 placeholders do not appear as real instructions inside a basic | |
161 block, but are considered active_insn_p instructions for historical | |
162 reasons, when jump table data was represented with JUMP_INSNs. */ | |
163 DEF_RTL_EXPR(JUMP_TABLE_DATA, "jump_table_data", "uuBe0000", RTX_INSN) | |
0 | 164 |
165 /* A marker that indicates that control will not flow through. */ | |
111 | 166 DEF_RTL_EXPR(BARRIER, "barrier", "uu00000", RTX_EXTRA) |
0 | 167 |
168 /* Holds a label that is followed by instructions. | |
169 Operand: | |
111 | 170 3: is used in jump.c for the use-count of the label. |
171 4: is used in the sh backend. | |
172 5: is a number that is unique in the entire compilation. | |
173 6: is the user-given name of the label, if any. */ | |
174 DEF_RTL_EXPR(CODE_LABEL, "code_label", "uuB00is", RTX_EXTRA) | |
0 | 175 |
176 /* Say where in the code a source line starts, for symbol table's sake. | |
177 Operand: | |
111 | 178 3: note-specific data |
179 4: enum insn_note | |
180 5: unique number if insn_note == note_insn_deleted_label. */ | |
181 DEF_RTL_EXPR(NOTE, "note", "uuB0ni", RTX_EXTRA) | |
0 | 182 |
183 /* ---------------------------------------------------------------------- | |
184 Top level constituents of INSN, JUMP_INSN and CALL_INSN. | |
185 ---------------------------------------------------------------------- */ | |
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186 |
0 | 187 /* Conditionally execute code. |
188 Operand 0 is the condition that if true, the code is executed. | |
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189 Operand 1 is the code to be executed (typically a SET). |
0 | 190 |
191 Semantics are that there are no side effects if the condition | |
192 is false. This pattern is created automatically by the if_convert | |
193 pass run after reload or by target-specific splitters. */ | |
194 DEF_RTL_EXPR(COND_EXEC, "cond_exec", "ee", RTX_EXTRA) | |
195 | |
196 /* Several operations to be done in parallel (perhaps under COND_EXEC). */ | |
197 DEF_RTL_EXPR(PARALLEL, "parallel", "E", RTX_EXTRA) | |
198 | |
199 /* A string that is passed through to the assembler as input. | |
200 One can obviously pass comments through by using the | |
201 assembler comment syntax. | |
202 These occur in an insn all by themselves as the PATTERN. | |
203 They also appear inside an ASM_OPERANDS | |
204 as a convenient way to hold a string. */ | |
205 DEF_RTL_EXPR(ASM_INPUT, "asm_input", "si", RTX_EXTRA) | |
206 | |
207 /* An assembler instruction with operands. | |
208 1st operand is the instruction template. | |
209 2nd operand is the constraint for the output. | |
210 3rd operand is the number of the output this expression refers to. | |
211 When an insn stores more than one value, a separate ASM_OPERANDS | |
212 is made for each output; this integer distinguishes them. | |
213 4th is a vector of values of input operands. | |
214 5th is a vector of modes and constraints for the input operands. | |
215 Each element is an ASM_INPUT containing a constraint string | |
216 and whose mode indicates the mode of the input operand. | |
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217 6th is a vector of labels that may be branched to by the asm. |
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218 7th is the source line number. */ |
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219 DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEEi", RTX_EXTRA) |
0 | 220 |
221 /* A machine-specific operation. | |
222 1st operand is a vector of operands being used by the operation so that | |
223 any needed reloads can be done. | |
224 2nd operand is a unique value saying which of a number of machine-specific | |
225 operations is to be performed. | |
226 (Note that the vector must be the first operand because of the way that | |
227 genrecog.c record positions within an insn.) | |
228 | |
229 UNSPEC can occur all by itself in a PATTERN, as a component of a PARALLEL, | |
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230 or inside an expression. |
0 | 231 UNSPEC by itself or as a component of a PARALLEL |
232 is currently considered not deletable. | |
233 | |
234 FIXME: Replace all uses of UNSPEC that appears by itself or as a component | |
235 of a PARALLEL with USE. | |
236 */ | |
237 DEF_RTL_EXPR(UNSPEC, "unspec", "Ei", RTX_EXTRA) | |
238 | |
239 /* Similar, but a volatile operation and one which may trap. */ | |
240 DEF_RTL_EXPR(UNSPEC_VOLATILE, "unspec_volatile", "Ei", RTX_EXTRA) | |
241 | |
111 | 242 /* ---------------------------------------------------------------------- |
243 Table jump addresses. | |
244 ---------------------------------------------------------------------- */ | |
245 | |
246 /* Vector of addresses, stored as full words. | |
247 Each element is a LABEL_REF to a CODE_LABEL whose address we want. */ | |
0 | 248 DEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E", RTX_EXTRA) |
249 | |
250 /* Vector of address differences X0 - BASE, X1 - BASE, ... | |
251 First operand is BASE; the vector contains the X's. | |
252 The machine mode of this rtx says how much space to leave | |
253 for each difference and is adjusted by branch shortening if | |
254 CASE_VECTOR_SHORTEN_MODE is defined. | |
255 The third and fourth operands store the target labels with the | |
256 minimum and maximum addresses respectively. | |
257 The fifth operand stores flags for use by branch shortening. | |
258 Set at the start of shorten_branches: | |
259 min_align: the minimum alignment for any of the target labels. | |
260 base_after_vec: true iff BASE is after the ADDR_DIFF_VEC. | |
261 min_after_vec: true iff minimum addr target label is after the ADDR_DIFF_VEC. | |
262 max_after_vec: true iff maximum addr target label is after the ADDR_DIFF_VEC. | |
263 min_after_base: true iff minimum address target label is after BASE. | |
264 max_after_base: true iff maximum address target label is after BASE. | |
265 Set by the actual branch shortening process: | |
266 offset_unsigned: true iff offsets have to be treated as unsigned. | |
267 scale: scaling that is necessary to make offsets fit into the mode. | |
268 | |
269 The third, fourth and fifth operands are only valid when | |
270 CASE_VECTOR_SHORTEN_MODE is defined, and only in an optimizing | |
111 | 271 compilation. */ |
0 | 272 DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eEee0", RTX_EXTRA) |
273 | |
274 /* Memory prefetch, with attributes supported on some targets. | |
275 Operand 1 is the address of the memory to fetch. | |
276 Operand 2 is 1 for a write access, 0 otherwise. | |
277 Operand 3 is the level of temporal locality; 0 means there is no | |
278 temporal locality and 1, 2, and 3 are for increasing levels of temporal | |
279 locality. | |
280 | |
281 The attributes specified by operands 2 and 3 are ignored for targets | |
282 whose prefetch instructions do not support them. */ | |
283 DEF_RTL_EXPR(PREFETCH, "prefetch", "eee", RTX_EXTRA) | |
284 | |
285 /* ---------------------------------------------------------------------- | |
286 At the top level of an instruction (perhaps under PARALLEL). | |
287 ---------------------------------------------------------------------- */ | |
288 | |
289 /* Assignment. | |
290 Operand 1 is the location (REG, MEM, PC, CC0 or whatever) assigned to. | |
291 Operand 2 is the value stored there. | |
292 ALL assignment must use SET. | |
293 Instructions that do multiple assignments must use multiple SET, | |
294 under PARALLEL. */ | |
295 DEF_RTL_EXPR(SET, "set", "ee", RTX_EXTRA) | |
296 | |
297 /* Indicate something is used in a way that we don't want to explain. | |
298 For example, subroutine calls will use the register | |
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299 in which the static chain is passed. |
0 | 300 |
301 USE can not appear as an operand of other rtx except for PARALLEL. | |
302 USE is not deletable, as it indicates that the operand | |
303 is used in some unknown way. */ | |
304 DEF_RTL_EXPR(USE, "use", "e", RTX_EXTRA) | |
305 | |
306 /* Indicate something is clobbered in a way that we don't want to explain. | |
307 For example, subroutine calls will clobber some physical registers | |
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308 (the ones that are by convention not saved). |
0 | 309 |
310 CLOBBER can not appear as an operand of other rtx except for PARALLEL. | |
311 CLOBBER of a hard register appearing by itself (not within PARALLEL) | |
312 is considered undeletable before reload. */ | |
313 DEF_RTL_EXPR(CLOBBER, "clobber", "e", RTX_EXTRA) | |
314 | |
131 | 315 /* Indicate that the upper parts of something are clobbered in a way that we |
316 don't want to explain. The MODE references the lower bits that will be | |
317 preserved. Anything above that size will be clobbered. | |
318 | |
319 CLOBBER_HIGH only occurs as the operand of a PARALLEL rtx. It cannot appear | |
320 in other contexts, and unlike CLOBBER, it cannot appear on its own. | |
321 CLOBBER_HIGH can only be used with fixed register rtxes. */ | |
322 | |
323 DEF_RTL_EXPR(CLOBBER_HIGH, "clobber_high", "e", RTX_EXTRA) | |
324 | |
0 | 325 /* Call a subroutine. |
326 Operand 1 is the address to call. | |
327 Operand 2 is the number of arguments. */ | |
328 | |
329 DEF_RTL_EXPR(CALL, "call", "ee", RTX_EXTRA) | |
330 | |
331 /* Return from a subroutine. */ | |
332 | |
333 DEF_RTL_EXPR(RETURN, "return", "", RTX_EXTRA) | |
334 | |
111 | 335 /* Like RETURN, but truly represents only a function return, while |
336 RETURN may represent an insn that also performs other functions | |
337 of the function epilogue. Like RETURN, this may also occur in | |
338 conditional jumps. */ | |
339 DEF_RTL_EXPR(SIMPLE_RETURN, "simple_return", "", RTX_EXTRA) | |
340 | |
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341 /* Special for EH return from subroutine. */ |
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342 |
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343 DEF_RTL_EXPR(EH_RETURN, "eh_return", "", RTX_EXTRA) |
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344 |
0 | 345 /* Conditional trap. |
346 Operand 1 is the condition. | |
347 Operand 2 is the trap code. | |
348 For an unconditional trap, make the condition (const_int 1). */ | |
349 DEF_RTL_EXPR(TRAP_IF, "trap_if", "ee", RTX_EXTRA) | |
350 | |
351 /* ---------------------------------------------------------------------- | |
352 Primitive values for use in expressions. | |
353 ---------------------------------------------------------------------- */ | |
354 | |
355 /* numeric integer constant */ | |
356 DEF_RTL_EXPR(CONST_INT, "const_int", "w", RTX_CONST_OBJ) | |
357 | |
111 | 358 /* numeric integer constant */ |
359 DEF_RTL_EXPR(CONST_WIDE_INT, "const_wide_int", "", RTX_CONST_OBJ) | |
360 | |
131 | 361 /* An rtx representation of a poly_wide_int. */ |
362 DEF_RTL_EXPR(CONST_POLY_INT, "const_poly_int", "", RTX_CONST_OBJ) | |
363 | |
0 | 364 /* fixed-point constant */ |
365 DEF_RTL_EXPR(CONST_FIXED, "const_fixed", "www", RTX_CONST_OBJ) | |
366 | |
111 | 367 /* numeric floating point or integer constant. If the mode is |
368 VOIDmode it is an int otherwise it has a floating point mode and a | |
369 floating point value. Operands hold the value. They are all 'w' | |
370 and there may be from 2 to 6; see real.h. */ | |
0 | 371 DEF_RTL_EXPR(CONST_DOUBLE, "const_double", CONST_DOUBLE_FORMAT, RTX_CONST_OBJ) |
372 | |
373 /* Describes a vector constant. */ | |
374 DEF_RTL_EXPR(CONST_VECTOR, "const_vector", "E", RTX_CONST_OBJ) | |
375 | |
376 /* String constant. Used for attributes in machine descriptions and | |
377 for special cases in DWARF2 debug output. NOT used for source- | |
378 language string constants. */ | |
379 DEF_RTL_EXPR(CONST_STRING, "const_string", "s", RTX_OBJ) | |
380 | |
381 /* This is used to encapsulate an expression whose value is constant | |
382 (such as the sum of a SYMBOL_REF and a CONST_INT) so that it will be | |
383 recognized as a constant operand rather than by arithmetic instructions. */ | |
384 | |
385 DEF_RTL_EXPR(CONST, "const", "e", RTX_CONST_OBJ) | |
386 | |
387 /* program counter. Ordinary jumps are represented | |
388 by a SET whose first operand is (PC). */ | |
389 DEF_RTL_EXPR(PC, "pc", "", RTX_OBJ) | |
390 | |
391 /* A register. The "operand" is the register number, accessed with | |
392 the REGNO macro. If this number is less than FIRST_PSEUDO_REGISTER | |
393 than a hardware register is being referred to. The second operand | |
111 | 394 points to a reg_attrs structure. |
0 | 395 This rtx needs to have as many (or more) fields as a MEM, since we |
396 can change REG rtx's into MEMs during reload. */ | |
111 | 397 DEF_RTL_EXPR(REG, "reg", "r", RTX_OBJ) |
0 | 398 |
399 /* A scratch register. This represents a register used only within a | |
111 | 400 single insn. It will be replaced by a REG during register allocation |
0 | 401 or reload unless the constraint indicates that the register won't be |
111 | 402 needed, in which case it can remain a SCRATCH. */ |
403 DEF_RTL_EXPR(SCRATCH, "scratch", "", RTX_OBJ) | |
0 | 404 |
405 /* A reference to a part of another value. The first operand is the | |
406 complete value and the second is the byte offset of the selected part. */ | |
131 | 407 DEF_RTL_EXPR(SUBREG, "subreg", "ep", RTX_EXTRA) |
0 | 408 |
409 /* This one-argument rtx is used for move instructions | |
410 that are guaranteed to alter only the low part of a destination. | |
411 Thus, (SET (SUBREG:HI (REG...)) (MEM:HI ...)) | |
412 has an unspecified effect on the high part of REG, | |
413 but (SET (STRICT_LOW_PART (SUBREG:HI (REG...))) (MEM:HI ...)) | |
414 is guaranteed to alter only the bits of REG that are in HImode. | |
415 | |
416 The actual instruction used is probably the same in both cases, | |
417 but the register constraints may be tighter when STRICT_LOW_PART | |
418 is in use. */ | |
419 | |
420 DEF_RTL_EXPR(STRICT_LOW_PART, "strict_low_part", "e", RTX_EXTRA) | |
421 | |
422 /* (CONCAT a b) represents the virtual concatenation of a and b | |
423 to make a value that has as many bits as a and b put together. | |
424 This is used for complex values. Normally it appears only | |
425 in DECL_RTLs and during RTL generation, but not in the insn chain. */ | |
426 DEF_RTL_EXPR(CONCAT, "concat", "ee", RTX_OBJ) | |
427 | |
428 /* (CONCATN [a1 a2 ... an]) represents the virtual concatenation of | |
429 all An to make a value. This is an extension of CONCAT to larger | |
430 number of components. Like CONCAT, it should not appear in the | |
431 insn chain. Every element of the CONCATN is the same size. */ | |
432 DEF_RTL_EXPR(CONCATN, "concatn", "E", RTX_OBJ) | |
433 | |
434 /* A memory location; operand is the address. The second operand is the | |
435 alias set to which this MEM belongs. We use `0' instead of `w' for this | |
436 field so that the field need not be specified in machine descriptions. */ | |
437 DEF_RTL_EXPR(MEM, "mem", "e0", RTX_OBJ) | |
438 | |
439 /* Reference to an assembler label in the code for this function. | |
440 The operand is a CODE_LABEL found in the insn chain. */ | |
441 DEF_RTL_EXPR(LABEL_REF, "label_ref", "u", RTX_CONST_OBJ) | |
442 | |
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443 /* Reference to a named label: |
0 | 444 Operand 0: label name |
111 | 445 Operand 1: tree from which this symbol is derived, or null. |
0 | 446 This is either a DECL node, or some kind of constant. */ |
111 | 447 DEF_RTL_EXPR(SYMBOL_REF, "symbol_ref", "s0", RTX_CONST_OBJ) |
0 | 448 |
449 /* The condition code register is represented, in our imagination, | |
450 as a register holding a value that can be compared to zero. | |
451 In fact, the machine has already compared them and recorded the | |
452 results; but instructions that look at the condition code | |
453 pretend to be looking at the entire value and comparing it. */ | |
454 DEF_RTL_EXPR(CC0, "cc0", "", RTX_OBJ) | |
455 | |
456 /* ---------------------------------------------------------------------- | |
457 Expressions for operators in an rtl pattern | |
458 ---------------------------------------------------------------------- */ | |
459 | |
460 /* if_then_else. This is used in representing ordinary | |
461 conditional jump instructions. | |
462 Operand: | |
463 0: condition | |
464 1: then expr | |
465 2: else expr */ | |
466 DEF_RTL_EXPR(IF_THEN_ELSE, "if_then_else", "eee", RTX_TERNARY) | |
467 | |
468 /* Comparison, produces a condition code result. */ | |
469 DEF_RTL_EXPR(COMPARE, "compare", "ee", RTX_BIN_ARITH) | |
470 | |
471 /* plus */ | |
472 DEF_RTL_EXPR(PLUS, "plus", "ee", RTX_COMM_ARITH) | |
473 | |
474 /* Operand 0 minus operand 1. */ | |
475 DEF_RTL_EXPR(MINUS, "minus", "ee", RTX_BIN_ARITH) | |
476 | |
477 /* Minus operand 0. */ | |
478 DEF_RTL_EXPR(NEG, "neg", "e", RTX_UNARY) | |
479 | |
480 DEF_RTL_EXPR(MULT, "mult", "ee", RTX_COMM_ARITH) | |
481 | |
482 /* Multiplication with signed saturation */ | |
483 DEF_RTL_EXPR(SS_MULT, "ss_mult", "ee", RTX_COMM_ARITH) | |
484 /* Multiplication with unsigned saturation */ | |
485 DEF_RTL_EXPR(US_MULT, "us_mult", "ee", RTX_COMM_ARITH) | |
486 | |
487 /* Operand 0 divided by operand 1. */ | |
488 DEF_RTL_EXPR(DIV, "div", "ee", RTX_BIN_ARITH) | |
489 /* Division with signed saturation */ | |
490 DEF_RTL_EXPR(SS_DIV, "ss_div", "ee", RTX_BIN_ARITH) | |
491 /* Division with unsigned saturation */ | |
492 DEF_RTL_EXPR(US_DIV, "us_div", "ee", RTX_BIN_ARITH) | |
493 | |
494 /* Remainder of operand 0 divided by operand 1. */ | |
495 DEF_RTL_EXPR(MOD, "mod", "ee", RTX_BIN_ARITH) | |
496 | |
497 /* Unsigned divide and remainder. */ | |
498 DEF_RTL_EXPR(UDIV, "udiv", "ee", RTX_BIN_ARITH) | |
499 DEF_RTL_EXPR(UMOD, "umod", "ee", RTX_BIN_ARITH) | |
500 | |
501 /* Bitwise operations. */ | |
502 DEF_RTL_EXPR(AND, "and", "ee", RTX_COMM_ARITH) | |
503 DEF_RTL_EXPR(IOR, "ior", "ee", RTX_COMM_ARITH) | |
504 DEF_RTL_EXPR(XOR, "xor", "ee", RTX_COMM_ARITH) | |
505 DEF_RTL_EXPR(NOT, "not", "e", RTX_UNARY) | |
506 | |
507 /* Operand: | |
508 0: value to be shifted. | |
509 1: number of bits. */ | |
510 DEF_RTL_EXPR(ASHIFT, "ashift", "ee", RTX_BIN_ARITH) /* shift left */ | |
511 DEF_RTL_EXPR(ROTATE, "rotate", "ee", RTX_BIN_ARITH) /* rotate left */ | |
512 DEF_RTL_EXPR(ASHIFTRT, "ashiftrt", "ee", RTX_BIN_ARITH) /* arithmetic shift right */ | |
513 DEF_RTL_EXPR(LSHIFTRT, "lshiftrt", "ee", RTX_BIN_ARITH) /* logical shift right */ | |
514 DEF_RTL_EXPR(ROTATERT, "rotatert", "ee", RTX_BIN_ARITH) /* rotate right */ | |
515 | |
516 /* Minimum and maximum values of two operands. We need both signed and | |
517 unsigned forms. (We cannot use MIN for SMIN because it conflicts | |
518 with a macro of the same name.) The signed variants should be used | |
519 with floating point. Further, if both operands are zeros, or if either | |
520 operand is NaN, then it is unspecified which of the two operands is | |
521 returned as the result. */ | |
522 | |
523 DEF_RTL_EXPR(SMIN, "smin", "ee", RTX_COMM_ARITH) | |
524 DEF_RTL_EXPR(SMAX, "smax", "ee", RTX_COMM_ARITH) | |
525 DEF_RTL_EXPR(UMIN, "umin", "ee", RTX_COMM_ARITH) | |
526 DEF_RTL_EXPR(UMAX, "umax", "ee", RTX_COMM_ARITH) | |
527 | |
528 /* These unary operations are used to represent incrementation | |
529 and decrementation as they occur in memory addresses. | |
530 The amount of increment or decrement are not represented | |
531 because they can be understood from the machine-mode of the | |
532 containing MEM. These operations exist in only two cases: | |
533 1. pushes onto the stack. | |
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534 2. created automatically by the auto-inc-dec pass. */ |
0 | 535 DEF_RTL_EXPR(PRE_DEC, "pre_dec", "e", RTX_AUTOINC) |
536 DEF_RTL_EXPR(PRE_INC, "pre_inc", "e", RTX_AUTOINC) | |
537 DEF_RTL_EXPR(POST_DEC, "post_dec", "e", RTX_AUTOINC) | |
538 DEF_RTL_EXPR(POST_INC, "post_inc", "e", RTX_AUTOINC) | |
539 | |
540 /* These binary operations are used to represent generic address | |
541 side-effects in memory addresses, except for simple incrementation | |
542 or decrementation which use the above operations. They are | |
543 created automatically by the life_analysis pass in flow.c. | |
544 The first operand is a REG which is used as the address. | |
545 The second operand is an expression that is assigned to the | |
546 register, either before (PRE_MODIFY) or after (POST_MODIFY) | |
547 evaluating the address. | |
548 Currently, the compiler can only handle second operands of the | |
549 form (plus (reg) (reg)) and (plus (reg) (const_int)), where | |
550 the first operand of the PLUS has to be the same register as | |
551 the first operand of the *_MODIFY. */ | |
552 DEF_RTL_EXPR(PRE_MODIFY, "pre_modify", "ee", RTX_AUTOINC) | |
553 DEF_RTL_EXPR(POST_MODIFY, "post_modify", "ee", RTX_AUTOINC) | |
554 | |
555 /* Comparison operations. The ordered comparisons exist in two | |
556 flavors, signed and unsigned. */ | |
557 DEF_RTL_EXPR(NE, "ne", "ee", RTX_COMM_COMPARE) | |
558 DEF_RTL_EXPR(EQ, "eq", "ee", RTX_COMM_COMPARE) | |
559 DEF_RTL_EXPR(GE, "ge", "ee", RTX_COMPARE) | |
560 DEF_RTL_EXPR(GT, "gt", "ee", RTX_COMPARE) | |
561 DEF_RTL_EXPR(LE, "le", "ee", RTX_COMPARE) | |
562 DEF_RTL_EXPR(LT, "lt", "ee", RTX_COMPARE) | |
563 DEF_RTL_EXPR(GEU, "geu", "ee", RTX_COMPARE) | |
564 DEF_RTL_EXPR(GTU, "gtu", "ee", RTX_COMPARE) | |
565 DEF_RTL_EXPR(LEU, "leu", "ee", RTX_COMPARE) | |
566 DEF_RTL_EXPR(LTU, "ltu", "ee", RTX_COMPARE) | |
567 | |
568 /* Additional floating point unordered comparison flavors. */ | |
569 DEF_RTL_EXPR(UNORDERED, "unordered", "ee", RTX_COMM_COMPARE) | |
570 DEF_RTL_EXPR(ORDERED, "ordered", "ee", RTX_COMM_COMPARE) | |
571 | |
572 /* These are equivalent to unordered or ... */ | |
573 DEF_RTL_EXPR(UNEQ, "uneq", "ee", RTX_COMM_COMPARE) | |
574 DEF_RTL_EXPR(UNGE, "unge", "ee", RTX_COMPARE) | |
575 DEF_RTL_EXPR(UNGT, "ungt", "ee", RTX_COMPARE) | |
576 DEF_RTL_EXPR(UNLE, "unle", "ee", RTX_COMPARE) | |
577 DEF_RTL_EXPR(UNLT, "unlt", "ee", RTX_COMPARE) | |
578 | |
579 /* This is an ordered NE, ie !UNEQ, ie false for NaN. */ | |
580 DEF_RTL_EXPR(LTGT, "ltgt", "ee", RTX_COMM_COMPARE) | |
581 | |
582 /* Represents the result of sign-extending the sole operand. | |
583 The machine modes of the operand and of the SIGN_EXTEND expression | |
584 determine how much sign-extension is going on. */ | |
585 DEF_RTL_EXPR(SIGN_EXTEND, "sign_extend", "e", RTX_UNARY) | |
586 | |
587 /* Similar for zero-extension (such as unsigned short to int). */ | |
588 DEF_RTL_EXPR(ZERO_EXTEND, "zero_extend", "e", RTX_UNARY) | |
589 | |
590 /* Similar but here the operand has a wider mode. */ | |
591 DEF_RTL_EXPR(TRUNCATE, "truncate", "e", RTX_UNARY) | |
592 | |
593 /* Similar for extending floating-point values (such as SFmode to DFmode). */ | |
594 DEF_RTL_EXPR(FLOAT_EXTEND, "float_extend", "e", RTX_UNARY) | |
595 DEF_RTL_EXPR(FLOAT_TRUNCATE, "float_truncate", "e", RTX_UNARY) | |
596 | |
597 /* Conversion of fixed point operand to floating point value. */ | |
598 DEF_RTL_EXPR(FLOAT, "float", "e", RTX_UNARY) | |
599 | |
600 /* With fixed-point machine mode: | |
601 Conversion of floating point operand to fixed point value. | |
602 Value is defined only when the operand's value is an integer. | |
603 With floating-point machine mode (and operand with same mode): | |
604 Operand is rounded toward zero to produce an integer value | |
605 represented in floating point. */ | |
606 DEF_RTL_EXPR(FIX, "fix", "e", RTX_UNARY) | |
607 | |
608 /* Conversion of unsigned fixed point operand to floating point value. */ | |
609 DEF_RTL_EXPR(UNSIGNED_FLOAT, "unsigned_float", "e", RTX_UNARY) | |
610 | |
611 /* With fixed-point machine mode: | |
612 Conversion of floating point operand to *unsigned* fixed point value. | |
613 Value is defined only when the operand's value is an integer. */ | |
614 DEF_RTL_EXPR(UNSIGNED_FIX, "unsigned_fix", "e", RTX_UNARY) | |
615 | |
616 /* Conversions involving fractional fixed-point types without saturation, | |
617 including: | |
618 fractional to fractional (of different precision), | |
619 signed integer to fractional, | |
620 fractional to signed integer, | |
621 floating point to fractional, | |
622 fractional to floating point. | |
623 NOTE: fractional can be either signed or unsigned for conversions. */ | |
624 DEF_RTL_EXPR(FRACT_CONVERT, "fract_convert", "e", RTX_UNARY) | |
625 | |
626 /* Conversions involving fractional fixed-point types and unsigned integer | |
627 without saturation, including: | |
628 unsigned integer to fractional, | |
629 fractional to unsigned integer. | |
630 NOTE: fractional can be either signed or unsigned for conversions. */ | |
631 DEF_RTL_EXPR(UNSIGNED_FRACT_CONVERT, "unsigned_fract_convert", "e", RTX_UNARY) | |
632 | |
633 /* Conversions involving fractional fixed-point types with saturation, | |
634 including: | |
635 fractional to fractional (of different precision), | |
636 signed integer to fractional, | |
637 floating point to fractional. | |
638 NOTE: fractional can be either signed or unsigned for conversions. */ | |
639 DEF_RTL_EXPR(SAT_FRACT, "sat_fract", "e", RTX_UNARY) | |
640 | |
641 /* Conversions involving fractional fixed-point types and unsigned integer | |
642 with saturation, including: | |
643 unsigned integer to fractional. | |
644 NOTE: fractional can be either signed or unsigned for conversions. */ | |
645 DEF_RTL_EXPR(UNSIGNED_SAT_FRACT, "unsigned_sat_fract", "e", RTX_UNARY) | |
646 | |
647 /* Absolute value */ | |
648 DEF_RTL_EXPR(ABS, "abs", "e", RTX_UNARY) | |
649 | |
650 /* Square root */ | |
651 DEF_RTL_EXPR(SQRT, "sqrt", "e", RTX_UNARY) | |
652 | |
653 /* Swap bytes. */ | |
654 DEF_RTL_EXPR(BSWAP, "bswap", "e", RTX_UNARY) | |
655 | |
656 /* Find first bit that is set. | |
657 Value is 1 + number of trailing zeros in the arg., | |
658 or 0 if arg is 0. */ | |
659 DEF_RTL_EXPR(FFS, "ffs", "e", RTX_UNARY) | |
660 | |
111 | 661 /* Count number of leading redundant sign bits (number of leading |
662 sign bits minus one). */ | |
663 DEF_RTL_EXPR(CLRSB, "clrsb", "e", RTX_UNARY) | |
664 | |
0 | 665 /* Count leading zeros. */ |
666 DEF_RTL_EXPR(CLZ, "clz", "e", RTX_UNARY) | |
667 | |
668 /* Count trailing zeros. */ | |
669 DEF_RTL_EXPR(CTZ, "ctz", "e", RTX_UNARY) | |
670 | |
671 /* Population count (number of 1 bits). */ | |
672 DEF_RTL_EXPR(POPCOUNT, "popcount", "e", RTX_UNARY) | |
673 | |
674 /* Population parity (number of 1 bits modulo 2). */ | |
675 DEF_RTL_EXPR(PARITY, "parity", "e", RTX_UNARY) | |
676 | |
677 /* Reference to a signed bit-field of specified size and position. | |
678 Operand 0 is the memory unit (usually SImode or QImode) which | |
679 contains the field's first bit. Operand 1 is the width, in bits. | |
680 Operand 2 is the number of bits in the memory unit before the | |
681 first bit of this field. | |
682 If BITS_BIG_ENDIAN is defined, the first bit is the msb and | |
683 operand 2 counts from the msb of the memory unit. | |
684 Otherwise, the first bit is the lsb and operand 2 counts from | |
685 the lsb of the memory unit. | |
686 This kind of expression can not appear as an lvalue in RTL. */ | |
687 DEF_RTL_EXPR(SIGN_EXTRACT, "sign_extract", "eee", RTX_BITFIELD_OPS) | |
688 | |
689 /* Similar for unsigned bit-field. | |
690 But note! This kind of expression _can_ appear as an lvalue. */ | |
691 DEF_RTL_EXPR(ZERO_EXTRACT, "zero_extract", "eee", RTX_BITFIELD_OPS) | |
692 | |
693 /* For RISC machines. These save memory when splitting insns. */ | |
694 | |
695 /* HIGH are the high-order bits of a constant expression. */ | |
696 DEF_RTL_EXPR(HIGH, "high", "e", RTX_CONST_OBJ) | |
697 | |
698 /* LO_SUM is the sum of a register and the low-order bits | |
699 of a constant expression. */ | |
700 DEF_RTL_EXPR(LO_SUM, "lo_sum", "ee", RTX_OBJ) | |
701 | |
702 /* Describes a merge operation between two vector values. | |
703 Operands 0 and 1 are the vectors to be merged, operand 2 is a bitmask | |
704 that specifies where the parts of the result are taken from. Set bits | |
705 indicate operand 0, clear bits indicate operand 1. The parts are defined | |
706 by the mode of the vectors. */ | |
707 DEF_RTL_EXPR(VEC_MERGE, "vec_merge", "eee", RTX_TERNARY) | |
708 | |
709 /* Describes an operation that selects parts of a vector. | |
710 Operands 0 is the source vector, operand 1 is a PARALLEL that contains | |
711 a CONST_INT for each of the subparts of the result vector, giving the | |
712 number of the source subpart that should be stored into it. */ | |
713 DEF_RTL_EXPR(VEC_SELECT, "vec_select", "ee", RTX_BIN_ARITH) | |
714 | |
715 /* Describes a vector concat operation. Operands 0 and 1 are the source | |
716 vectors, the result is a vector that is as long as operands 0 and 1 | |
717 combined and is the concatenation of the two source vectors. */ | |
718 DEF_RTL_EXPR(VEC_CONCAT, "vec_concat", "ee", RTX_BIN_ARITH) | |
719 | |
720 /* Describes an operation that converts a small vector into a larger one by | |
721 duplicating the input values. The output vector mode must have the same | |
722 submodes as the input vector mode, and the number of output parts must be | |
723 an integer multiple of the number of input parts. */ | |
724 DEF_RTL_EXPR(VEC_DUPLICATE, "vec_duplicate", "e", RTX_UNARY) | |
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725 |
131 | 726 /* Creation of a vector in which element I has the value BASE + I * STEP, |
727 where BASE is the first operand and STEP is the second. The result | |
728 must have a vector integer mode. */ | |
729 DEF_RTL_EXPR(VEC_SERIES, "vec_series", "ee", RTX_BIN_ARITH) | |
730 | |
0 | 731 /* Addition with signed saturation */ |
732 DEF_RTL_EXPR(SS_PLUS, "ss_plus", "ee", RTX_COMM_ARITH) | |
733 | |
734 /* Addition with unsigned saturation */ | |
735 DEF_RTL_EXPR(US_PLUS, "us_plus", "ee", RTX_COMM_ARITH) | |
736 | |
737 /* Operand 0 minus operand 1, with signed saturation. */ | |
738 DEF_RTL_EXPR(SS_MINUS, "ss_minus", "ee", RTX_BIN_ARITH) | |
739 | |
740 /* Negation with signed saturation. */ | |
741 DEF_RTL_EXPR(SS_NEG, "ss_neg", "e", RTX_UNARY) | |
742 /* Negation with unsigned saturation. */ | |
743 DEF_RTL_EXPR(US_NEG, "us_neg", "e", RTX_UNARY) | |
744 | |
745 /* Absolute value with signed saturation. */ | |
746 DEF_RTL_EXPR(SS_ABS, "ss_abs", "e", RTX_UNARY) | |
747 | |
748 /* Shift left with signed saturation. */ | |
749 DEF_RTL_EXPR(SS_ASHIFT, "ss_ashift", "ee", RTX_BIN_ARITH) | |
750 | |
751 /* Shift left with unsigned saturation. */ | |
752 DEF_RTL_EXPR(US_ASHIFT, "us_ashift", "ee", RTX_BIN_ARITH) | |
753 | |
754 /* Operand 0 minus operand 1, with unsigned saturation. */ | |
755 DEF_RTL_EXPR(US_MINUS, "us_minus", "ee", RTX_BIN_ARITH) | |
756 | |
757 /* Signed saturating truncate. */ | |
758 DEF_RTL_EXPR(SS_TRUNCATE, "ss_truncate", "e", RTX_UNARY) | |
759 | |
760 /* Unsigned saturating truncate. */ | |
761 DEF_RTL_EXPR(US_TRUNCATE, "us_truncate", "e", RTX_UNARY) | |
762 | |
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763 /* Floating point multiply/add combined instruction. */ |
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764 DEF_RTL_EXPR(FMA, "fma", "eee", RTX_TERNARY) |
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765 |
0 | 766 /* Information about the variable and its location. */ |
111 | 767 DEF_RTL_EXPR(VAR_LOCATION, "var_location", "te", RTX_EXTRA) |
0 | 768 |
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769 /* Used in VAR_LOCATION for a pointer to a decl that is no longer |
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770 addressable. */ |
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771 DEF_RTL_EXPR(DEBUG_IMPLICIT_PTR, "debug_implicit_ptr", "t", RTX_OBJ) |
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772 |
111 | 773 /* Represents value that argument had on function entry. The |
774 single argument is the DECL_INCOMING_RTL of the corresponding | |
775 parameter. */ | |
776 DEF_RTL_EXPR(ENTRY_VALUE, "entry_value", "0", RTX_OBJ) | |
777 | |
778 /* Used in VAR_LOCATION for a reference to a parameter that has | |
779 been optimized away completely. */ | |
780 DEF_RTL_EXPR(DEBUG_PARAMETER_REF, "debug_parameter_ref", "t", RTX_OBJ) | |
781 | |
131 | 782 /* Used in marker DEBUG_INSNs to avoid being recognized as an insn. */ |
783 DEF_RTL_EXPR(DEBUG_MARKER, "debug_marker", "", RTX_EXTRA) | |
784 | |
0 | 785 /* All expressions from this point forward appear only in machine |
786 descriptions. */ | |
787 #ifdef GENERATOR_FILE | |
788 | |
789 /* Pattern-matching operators: */ | |
790 | |
791 /* Use the function named by the second arg (the string) | |
792 as a predicate; if matched, store the structure that was matched | |
793 in the operand table at index specified by the first arg (the integer). | |
794 If the second arg is the null string, the structure is just stored. | |
795 | |
796 A third string argument indicates to the register allocator restrictions | |
797 on where the operand can be allocated. | |
798 | |
799 If the target needs no restriction on any instruction this field should | |
800 be the null string. | |
801 | |
802 The string is prepended by: | |
803 '=' to indicate the operand is only written to. | |
804 '+' to indicate the operand is both read and written to. | |
805 | |
806 Each character in the string represents an allocable class for an operand. | |
807 'g' indicates the operand can be any valid class. | |
808 'i' indicates the operand can be immediate (in the instruction) data. | |
809 'r' indicates the operand can be in a register. | |
810 'm' indicates the operand can be in memory. | |
811 'o' a subset of the 'm' class. Those memory addressing modes that | |
812 can be offset at compile time (have a constant added to them). | |
813 | |
814 Other characters indicate target dependent operand classes and | |
815 are described in each target's machine description. | |
816 | |
817 For instructions with more than one operand, sets of classes can be | |
818 separated by a comma to indicate the appropriate multi-operand constraints. | |
819 There must be a 1 to 1 correspondence between these sets of classes in | |
820 all operands for an instruction. | |
821 */ | |
822 DEF_RTL_EXPR(MATCH_OPERAND, "match_operand", "iss", RTX_MATCH) | |
823 | |
824 /* Match a SCRATCH or a register. When used to generate rtl, a | |
825 SCRATCH is generated. As for MATCH_OPERAND, the mode specifies | |
826 the desired mode and the first argument is the operand number. | |
827 The second argument is the constraint. */ | |
828 DEF_RTL_EXPR(MATCH_SCRATCH, "match_scratch", "is", RTX_MATCH) | |
829 | |
830 /* Apply a predicate, AND match recursively the operands of the rtx. | |
831 Operand 0 is the operand-number, as in match_operand. | |
832 Operand 1 is a predicate to apply (as a string, a function name). | |
833 Operand 2 is a vector of expressions, each of which must match | |
834 one subexpression of the rtx this construct is matching. */ | |
835 DEF_RTL_EXPR(MATCH_OPERATOR, "match_operator", "isE", RTX_MATCH) | |
836 | |
837 /* Match a PARALLEL of arbitrary length. The predicate is applied | |
838 to the PARALLEL and the initial expressions in the PARALLEL are matched. | |
839 Operand 0 is the operand-number, as in match_operand. | |
840 Operand 1 is a predicate to apply to the PARALLEL. | |
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841 Operand 2 is a vector of expressions, each of which must match the |
0 | 842 corresponding element in the PARALLEL. */ |
843 DEF_RTL_EXPR(MATCH_PARALLEL, "match_parallel", "isE", RTX_MATCH) | |
844 | |
845 /* Match only something equal to what is stored in the operand table | |
846 at the index specified by the argument. Use with MATCH_OPERAND. */ | |
847 DEF_RTL_EXPR(MATCH_DUP, "match_dup", "i", RTX_MATCH) | |
848 | |
849 /* Match only something equal to what is stored in the operand table | |
850 at the index specified by the argument. Use with MATCH_OPERATOR. */ | |
851 DEF_RTL_EXPR(MATCH_OP_DUP, "match_op_dup", "iE", RTX_MATCH) | |
852 | |
853 /* Match only something equal to what is stored in the operand table | |
854 at the index specified by the argument. Use with MATCH_PARALLEL. */ | |
855 DEF_RTL_EXPR(MATCH_PAR_DUP, "match_par_dup", "iE", RTX_MATCH) | |
856 | |
857 /* Appears only in define_predicate/define_special_predicate | |
858 expressions. Evaluates true only if the operand has an RTX code | |
859 from the set given by the argument (a comma-separated list). If the | |
860 second argument is present and nonempty, it is a sequence of digits | |
861 and/or letters which indicates the subexpression to test, using the | |
862 same syntax as genextract/genrecog's location strings: 0-9 for | |
863 XEXP (op, n), a-z for XVECEXP (op, 0, n); each character applies to | |
864 the result of the one before it. */ | |
865 DEF_RTL_EXPR(MATCH_CODE, "match_code", "ss", RTX_MATCH) | |
866 | |
111 | 867 /* Used to inject a C conditional expression into an .md file. It can |
868 appear in a predicate definition or an attribute expression. */ | |
0 | 869 DEF_RTL_EXPR(MATCH_TEST, "match_test", "s", RTX_MATCH) |
870 | |
871 /* Insn (and related) definitions. */ | |
872 | |
873 /* Definition of the pattern for one kind of instruction. | |
874 Operand: | |
875 0: names this instruction. | |
876 If the name is the null string, the instruction is in the | |
877 machine description just to be recognized, and will never be emitted by | |
878 the tree to rtl expander. | |
879 1: is the pattern. | |
880 2: is a string which is a C expression | |
881 giving an additional condition for recognizing this pattern. | |
882 A null string means no extra condition. | |
883 3: is the action to execute if this pattern is matched. | |
884 If this assembler code template starts with a * then it is a fragment of | |
885 C code to run to decide on a template to use. Otherwise, it is the | |
886 template to use. | |
887 4: optionally, a vector of attributes for this insn. | |
888 */ | |
889 DEF_RTL_EXPR(DEFINE_INSN, "define_insn", "sEsTV", RTX_EXTRA) | |
890 | |
891 /* Definition of a peephole optimization. | |
892 1st operand: vector of insn patterns to match | |
893 2nd operand: C expression that must be true | |
894 3rd operand: template or C code to produce assembler output. | |
895 4: optionally, a vector of attributes for this insn. | |
896 | |
897 This form is deprecated; use define_peephole2 instead. */ | |
898 DEF_RTL_EXPR(DEFINE_PEEPHOLE, "define_peephole", "EsTV", RTX_EXTRA) | |
899 | |
900 /* Definition of a split operation. | |
901 1st operand: insn pattern to match | |
902 2nd operand: C expression that must be true | |
903 3rd operand: vector of insn patterns to place into a SEQUENCE | |
904 4th operand: optionally, some C code to execute before generating the | |
905 insns. This might, for example, create some RTX's and store them in | |
906 elements of `recog_data.operand' for use by the vector of | |
907 insn-patterns. | |
908 (`operands' is an alias here for `recog_data.operand'). */ | |
909 DEF_RTL_EXPR(DEFINE_SPLIT, "define_split", "EsES", RTX_EXTRA) | |
910 | |
911 /* Definition of an insn and associated split. | |
912 This is the concatenation, with a few modifications, of a define_insn | |
913 and a define_split which share the same pattern. | |
914 Operand: | |
915 0: names this instruction. | |
916 If the name is the null string, the instruction is in the | |
917 machine description just to be recognized, and will never be emitted by | |
918 the tree to rtl expander. | |
919 1: is the pattern. | |
920 2: is a string which is a C expression | |
921 giving an additional condition for recognizing this pattern. | |
922 A null string means no extra condition. | |
923 3: is the action to execute if this pattern is matched. | |
924 If this assembler code template starts with a * then it is a fragment of | |
925 C code to run to decide on a template to use. Otherwise, it is the | |
926 template to use. | |
927 4: C expression that must be true for split. This may start with "&&" | |
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928 in which case the split condition is the logical and of the insn |
0 | 929 condition and what follows the "&&" of this operand. |
930 5: vector of insn patterns to place into a SEQUENCE | |
931 6: optionally, some C code to execute before generating the | |
932 insns. This might, for example, create some RTX's and store them in | |
933 elements of `recog_data.operand' for use by the vector of | |
934 insn-patterns. | |
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935 (`operands' is an alias here for `recog_data.operand'). |
0 | 936 7: optionally, a vector of attributes for this insn. */ |
937 DEF_RTL_EXPR(DEFINE_INSN_AND_SPLIT, "define_insn_and_split", "sEsTsESV", RTX_EXTRA) | |
938 | |
939 /* Definition of an RTL peephole operation. | |
940 Follows the same arguments as define_split. */ | |
941 DEF_RTL_EXPR(DEFINE_PEEPHOLE2, "define_peephole2", "EsES", RTX_EXTRA) | |
942 | |
943 /* Define how to generate multiple insns for a standard insn name. | |
944 1st operand: the insn name. | |
945 2nd operand: vector of insn-patterns. | |
946 Use match_operand to substitute an element of `recog_data.operand'. | |
947 3rd operand: C expression that must be true for this to be available. | |
948 This may not test any operands. | |
949 4th operand: Extra C code to execute before generating the insns. | |
950 This might, for example, create some RTX's and store them in | |
951 elements of `recog_data.operand' for use by the vector of | |
952 insn-patterns. | |
111 | 953 (`operands' is an alias here for `recog_data.operand'). |
954 5th: optionally, a vector of attributes for this expand. */ | |
955 DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEssV", RTX_EXTRA) | |
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956 |
0 | 957 /* Define a requirement for delay slots. |
958 1st operand: Condition involving insn attributes that, if true, | |
959 indicates that the insn requires the number of delay slots | |
960 shown. | |
961 2nd operand: Vector whose length is the three times the number of delay | |
962 slots required. | |
963 Each entry gives three conditions, each involving attributes. | |
964 The first must be true for an insn to occupy that delay slot | |
965 location. The second is true for all insns that can be | |
966 annulled if the branch is true and the third is true for all | |
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967 insns that can be annulled if the branch is false. |
0 | 968 |
969 Multiple DEFINE_DELAYs may be present. They indicate differing | |
970 requirements for delay slots. */ | |
971 DEF_RTL_EXPR(DEFINE_DELAY, "define_delay", "eE", RTX_EXTRA) | |
972 | |
973 /* Define attribute computation for `asm' instructions. */ | |
974 DEF_RTL_EXPR(DEFINE_ASM_ATTRIBUTES, "define_asm_attributes", "V", RTX_EXTRA) | |
975 | |
976 /* Definition of a conditional execution meta operation. Automatically | |
977 generates new instances of DEFINE_INSN, selected by having attribute | |
978 "predicable" true. The new pattern will contain a COND_EXEC and the | |
979 predicate at top-level. | |
980 | |
981 Operand: | |
982 0: The predicate pattern. The top-level form should match a | |
983 relational operator. Operands should have only one alternative. | |
984 1: A C expression giving an additional condition for recognizing | |
985 the generated pattern. | |
111 | 986 2: A template or C code to produce assembler output. |
987 3: A vector of attributes to append to the resulting cond_exec insn. */ | |
988 DEF_RTL_EXPR(DEFINE_COND_EXEC, "define_cond_exec", "EssV", RTX_EXTRA) | |
0 | 989 |
990 /* Definition of an operand predicate. The difference between | |
991 DEFINE_PREDICATE and DEFINE_SPECIAL_PREDICATE is that genrecog will | |
992 not warn about a match_operand with no mode if it has a predicate | |
993 defined with DEFINE_SPECIAL_PREDICATE. | |
994 | |
995 Operand: | |
996 0: The name of the predicate. | |
997 1: A boolean expression which computes whether or not the predicate | |
998 matches. This expression can use IOR, AND, NOT, MATCH_OPERAND, | |
999 MATCH_CODE, and MATCH_TEST. It must be specific enough that genrecog | |
1000 can calculate the set of RTX codes that can possibly match. | |
1001 2: A C function body which must return true for the predicate to match. | |
1002 Optional. Use this when the test is too complicated to fit into a | |
1003 match_test expression. */ | |
1004 DEF_RTL_EXPR(DEFINE_PREDICATE, "define_predicate", "ses", RTX_EXTRA) | |
1005 DEF_RTL_EXPR(DEFINE_SPECIAL_PREDICATE, "define_special_predicate", "ses", RTX_EXTRA) | |
1006 | |
1007 /* Definition of a register operand constraint. This simply maps the | |
1008 constraint string to a register class. | |
1009 | |
1010 Operand: | |
1011 0: The name of the constraint (often, but not always, a single letter). | |
1012 1: A C expression which evaluates to the appropriate register class for | |
1013 this constraint. If this is not just a constant, it should look only | |
1014 at -m switches and the like. | |
1015 2: A docstring for this constraint, in Texinfo syntax; not currently | |
1016 used, in future will be incorporated into the manual's list of | |
1017 machine-specific operand constraints. */ | |
1018 DEF_RTL_EXPR(DEFINE_REGISTER_CONSTRAINT, "define_register_constraint", "sss", RTX_EXTRA) | |
1019 | |
1020 /* Definition of a non-register operand constraint. These look at the | |
1021 operand and decide whether it fits the constraint. | |
1022 | |
1023 DEFINE_CONSTRAINT gets no special treatment if it fails to match. | |
1024 It is appropriate for constant-only constraints, and most others. | |
1025 | |
1026 DEFINE_MEMORY_CONSTRAINT tells reload that this constraint can be made | |
1027 to match, if it doesn't already, by converting the operand to the form | |
1028 (mem (reg X)) where X is a base register. It is suitable for constraints | |
1029 that describe a subset of all memory references. | |
1030 | |
1031 DEFINE_ADDRESS_CONSTRAINT tells reload that this constraint can be made | |
1032 to match, if it doesn't already, by converting the operand to the form | |
1033 (reg X) where X is a base register. It is suitable for constraints that | |
1034 describe a subset of all address references. | |
1035 | |
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1036 When in doubt, use plain DEFINE_CONSTRAINT. |
0 | 1037 |
1038 Operand: | |
1039 0: The name of the constraint (often, but not always, a single letter). | |
1040 1: A docstring for this constraint, in Texinfo syntax; not currently | |
1041 used, in future will be incorporated into the manual's list of | |
1042 machine-specific operand constraints. | |
1043 2: A boolean expression which computes whether or not the constraint | |
1044 matches. It should follow the same rules as a define_predicate | |
1045 expression, including the bit about specifying the set of RTX codes | |
1046 that could possibly match. MATCH_TEST subexpressions may make use of | |
1047 these variables: | |
1048 `op' - the RTL object defining the operand. | |
1049 `mode' - the mode of `op'. | |
1050 `ival' - INTVAL(op), if op is a CONST_INT. | |
1051 `hval' - CONST_DOUBLE_HIGH(op), if op is an integer CONST_DOUBLE. | |
1052 `lval' - CONST_DOUBLE_LOW(op), if op is an integer CONST_DOUBLE. | |
1053 `rval' - CONST_DOUBLE_REAL_VALUE(op), if op is a floating-point | |
1054 CONST_DOUBLE. | |
1055 Do not use ival/hval/lval/rval if op is not the appropriate kind of | |
1056 RTL object. */ | |
1057 DEF_RTL_EXPR(DEFINE_CONSTRAINT, "define_constraint", "sse", RTX_EXTRA) | |
1058 DEF_RTL_EXPR(DEFINE_MEMORY_CONSTRAINT, "define_memory_constraint", "sse", RTX_EXTRA) | |
111 | 1059 DEF_RTL_EXPR(DEFINE_SPECIAL_MEMORY_CONSTRAINT, "define_special_memory_constraint", "sse", RTX_EXTRA) |
0 | 1060 DEF_RTL_EXPR(DEFINE_ADDRESS_CONSTRAINT, "define_address_constraint", "sse", RTX_EXTRA) |
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1061 |
0 | 1062 |
1063 /* Constructions for CPU pipeline description described by NDFAs. */ | |
1064 | |
1065 /* (define_cpu_unit string [string]) describes cpu functional | |
1066 units (separated by comma). | |
1067 | |
1068 1st operand: Names of cpu functional units. | |
1069 2nd operand: Name of automaton (see comments for DEFINE_AUTOMATON). | |
1070 | |
1071 All define_reservations, define_cpu_units, and | |
1072 define_query_cpu_units should have unique names which may not be | |
1073 "nothing". */ | |
1074 DEF_RTL_EXPR(DEFINE_CPU_UNIT, "define_cpu_unit", "sS", RTX_EXTRA) | |
1075 | |
1076 /* (define_query_cpu_unit string [string]) describes cpu functional | |
1077 units analogously to define_cpu_unit. The reservation of such | |
1078 units can be queried for automaton state. */ | |
1079 DEF_RTL_EXPR(DEFINE_QUERY_CPU_UNIT, "define_query_cpu_unit", "sS", RTX_EXTRA) | |
1080 | |
1081 /* (exclusion_set string string) means that each CPU functional unit | |
1082 in the first string can not be reserved simultaneously with any | |
1083 unit whose name is in the second string and vise versa. CPU units | |
1084 in the string are separated by commas. For example, it is useful | |
1085 for description CPU with fully pipelined floating point functional | |
1086 unit which can execute simultaneously only single floating point | |
1087 insns or only double floating point insns. All CPU functional | |
1088 units in a set should belong to the same automaton. */ | |
1089 DEF_RTL_EXPR(EXCLUSION_SET, "exclusion_set", "ss", RTX_EXTRA) | |
1090 | |
1091 /* (presence_set string string) means that each CPU functional unit in | |
1092 the first string can not be reserved unless at least one of pattern | |
1093 of units whose names are in the second string is reserved. This is | |
1094 an asymmetric relation. CPU units or unit patterns in the strings | |
1095 are separated by commas. Pattern is one unit name or unit names | |
1096 separated by white-spaces. | |
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1097 |
0 | 1098 For example, it is useful for description that slot1 is reserved |
1099 after slot0 reservation for a VLIW processor. We could describe it | |
1100 by the following construction | |
1101 | |
1102 (presence_set "slot1" "slot0") | |
1103 | |
1104 Or slot1 is reserved only after slot0 and unit b0 reservation. In | |
1105 this case we could write | |
1106 | |
1107 (presence_set "slot1" "slot0 b0") | |
1108 | |
1109 All CPU functional units in a set should belong to the same | |
1110 automaton. */ | |
1111 DEF_RTL_EXPR(PRESENCE_SET, "presence_set", "ss", RTX_EXTRA) | |
1112 | |
1113 /* (final_presence_set string string) is analogous to `presence_set'. | |
1114 The difference between them is when checking is done. When an | |
1115 instruction is issued in given automaton state reflecting all | |
1116 current and planned unit reservations, the automaton state is | |
1117 changed. The first state is a source state, the second one is a | |
1118 result state. Checking for `presence_set' is done on the source | |
1119 state reservation, checking for `final_presence_set' is done on the | |
1120 result reservation. This construction is useful to describe a | |
1121 reservation which is actually two subsequent reservations. For | |
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1122 example, if we use |
0 | 1123 |
1124 (presence_set "slot1" "slot0") | |
1125 | |
1126 the following insn will be never issued (because slot1 requires | |
1127 slot0 which is absent in the source state). | |
1128 | |
1129 (define_reservation "insn_and_nop" "slot0 + slot1") | |
1130 | |
1131 but it can be issued if we use analogous `final_presence_set'. */ | |
1132 DEF_RTL_EXPR(FINAL_PRESENCE_SET, "final_presence_set", "ss", RTX_EXTRA) | |
1133 | |
1134 /* (absence_set string string) means that each CPU functional unit in | |
1135 the first string can be reserved only if each pattern of units | |
1136 whose names are in the second string is not reserved. This is an | |
1137 asymmetric relation (actually exclusion set is analogous to this | |
1138 one but it is symmetric). CPU units or unit patterns in the string | |
1139 are separated by commas. Pattern is one unit name or unit names | |
1140 separated by white-spaces. | |
1141 | |
1142 For example, it is useful for description that slot0 can not be | |
1143 reserved after slot1 or slot2 reservation for a VLIW processor. We | |
1144 could describe it by the following construction | |
1145 | |
1146 (absence_set "slot2" "slot0, slot1") | |
1147 | |
1148 Or slot2 can not be reserved if slot0 and unit b0 are reserved or | |
1149 slot1 and unit b1 are reserved . In this case we could write | |
1150 | |
1151 (absence_set "slot2" "slot0 b0, slot1 b1") | |
1152 | |
1153 All CPU functional units in a set should to belong the same | |
1154 automaton. */ | |
1155 DEF_RTL_EXPR(ABSENCE_SET, "absence_set", "ss", RTX_EXTRA) | |
1156 | |
1157 /* (final_absence_set string string) is analogous to `absence_set' but | |
1158 checking is done on the result (state) reservation. See comments | |
1159 for `final_presence_set'. */ | |
1160 DEF_RTL_EXPR(FINAL_ABSENCE_SET, "final_absence_set", "ss", RTX_EXTRA) | |
1161 | |
1162 /* (define_bypass number out_insn_names in_insn_names) names bypass | |
1163 with given latency (the first number) from insns given by the first | |
1164 string (see define_insn_reservation) into insns given by the second | |
1165 string. Insn names in the strings are separated by commas. The | |
1166 third operand is optional name of function which is additional | |
1167 guard for the bypass. The function will get the two insns as | |
1168 parameters. If the function returns zero the bypass will be | |
1169 ignored for this case. Additional guard is necessary to recognize | |
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1170 complicated bypasses, e.g. when consumer is load address. If there |
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1171 are more one bypass with the same output and input insns, the |
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1172 chosen bypass is the first bypass with a guard in description whose |
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1173 guard function returns nonzero. If there is no such bypass, then |
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1174 bypass without the guard function is chosen. */ |
0 | 1175 DEF_RTL_EXPR(DEFINE_BYPASS, "define_bypass", "issS", RTX_EXTRA) |
1176 | |
1177 /* (define_automaton string) describes names of automata generated and | |
1178 used for pipeline hazards recognition. The names are separated by | |
1179 comma. Actually it is possibly to generate the single automaton | |
1180 but unfortunately it can be very large. If we use more one | |
1181 automata, the summary size of the automata usually is less than the | |
1182 single one. The automaton name is used in define_cpu_unit and | |
1183 define_query_cpu_unit. All automata should have unique names. */ | |
1184 DEF_RTL_EXPR(DEFINE_AUTOMATON, "define_automaton", "s", RTX_EXTRA) | |
1185 | |
1186 /* (automata_option string) describes option for generation of | |
1187 automata. Currently there are the following options: | |
1188 | |
1189 o "no-minimization" which makes no minimization of automata. This | |
1190 is only worth to do when we are debugging the description and | |
1191 need to look more accurately at reservations of states. | |
1192 | |
1193 o "time" which means printing additional time statistics about | |
1194 generation of automata. | |
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1195 |
0 | 1196 o "v" which means generation of file describing the result |
1197 automata. The file has suffix `.dfa' and can be used for the | |
1198 description verification and debugging. | |
1199 | |
1200 o "w" which means generation of warning instead of error for | |
1201 non-critical errors. | |
1202 | |
1203 o "ndfa" which makes nondeterministic finite state automata. | |
1204 | |
1205 o "progress" which means output of a progress bar showing how many | |
1206 states were generated so far for automaton being processed. */ | |
1207 DEF_RTL_EXPR(AUTOMATA_OPTION, "automata_option", "s", RTX_EXTRA) | |
1208 | |
1209 /* (define_reservation string string) names reservation (the first | |
1210 string) of cpu functional units (the 2nd string). Sometimes unit | |
1211 reservations for different insns contain common parts. In such | |
1212 case, you can describe common part and use its name (the 1st | |
1213 parameter) in regular expression in define_insn_reservation. All | |
1214 define_reservations, define_cpu_units, and define_query_cpu_units | |
1215 should have unique names which may not be "nothing". */ | |
1216 DEF_RTL_EXPR(DEFINE_RESERVATION, "define_reservation", "ss", RTX_EXTRA) | |
1217 | |
1218 /* (define_insn_reservation name default_latency condition regexpr) | |
1219 describes reservation of cpu functional units (the 3nd operand) for | |
1220 instruction which is selected by the condition (the 2nd parameter). | |
1221 The first parameter is used for output of debugging information. | |
1222 The reservations are described by a regular expression according | |
1223 the following syntax: | |
1224 | |
1225 regexp = regexp "," oneof | |
1226 | oneof | |
1227 | |
1228 oneof = oneof "|" allof | |
1229 | allof | |
1230 | |
1231 allof = allof "+" repeat | |
1232 | repeat | |
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1233 |
0 | 1234 repeat = element "*" number |
1235 | element | |
1236 | |
1237 element = cpu_function_unit_name | |
1238 | reservation_name | |
1239 | result_name | |
1240 | "nothing" | |
1241 | "(" regexp ")" | |
1242 | |
1243 1. "," is used for describing start of the next cycle in | |
1244 reservation. | |
1245 | |
1246 2. "|" is used for describing the reservation described by the | |
1247 first regular expression *or* the reservation described by the | |
1248 second regular expression *or* etc. | |
1249 | |
1250 3. "+" is used for describing the reservation described by the | |
1251 first regular expression *and* the reservation described by the | |
1252 second regular expression *and* etc. | |
1253 | |
1254 4. "*" is used for convenience and simply means sequence in | |
1255 which the regular expression are repeated NUMBER times with | |
1256 cycle advancing (see ","). | |
1257 | |
1258 5. cpu functional unit name which means its reservation. | |
1259 | |
1260 6. reservation name -- see define_reservation. | |
1261 | |
1262 7. string "nothing" means no units reservation. */ | |
1263 | |
1264 DEF_RTL_EXPR(DEFINE_INSN_RESERVATION, "define_insn_reservation", "sies", RTX_EXTRA) | |
1265 | |
1266 /* Expressions used for insn attributes. */ | |
1267 | |
1268 /* Definition of an insn attribute. | |
1269 1st operand: name of the attribute | |
1270 2nd operand: comma-separated list of possible attribute values | |
1271 3rd operand: expression for the default value of the attribute. */ | |
1272 DEF_RTL_EXPR(DEFINE_ATTR, "define_attr", "sse", RTX_EXTRA) | |
1273 | |
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1274 /* Definition of an insn attribute that uses an existing enumerated type. |
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1275 1st operand: name of the attribute |
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1276 2nd operand: the name of the enumerated type |
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1277 3rd operand: expression for the default value of the attribute. */ |
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1278 DEF_RTL_EXPR(DEFINE_ENUM_ATTR, "define_enum_attr", "sse", RTX_EXTRA) |
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1279 |
0 | 1280 /* Marker for the name of an attribute. */ |
1281 DEF_RTL_EXPR(ATTR, "attr", "s", RTX_EXTRA) | |
1282 | |
1283 /* For use in the last (optional) operand of DEFINE_INSN or DEFINE_PEEPHOLE and | |
1284 in DEFINE_ASM_INSN to specify an attribute to assign to insns matching that | |
1285 pattern. | |
1286 | |
1287 (set_attr "name" "value") is equivalent to | |
1288 (set (attr "name") (const_string "value")) */ | |
1289 DEF_RTL_EXPR(SET_ATTR, "set_attr", "ss", RTX_EXTRA) | |
1290 | |
1291 /* In the last operand of DEFINE_INSN and DEFINE_PEEPHOLE, this can be used to | |
1292 specify that attribute values are to be assigned according to the | |
1293 alternative matched. | |
1294 | |
1295 The following three expressions are equivalent: | |
1296 | |
1297 (set (attr "att") (cond [(eq_attrq "alternative" "1") (const_string "a1") | |
1298 (eq_attrq "alternative" "2") (const_string "a2")] | |
1299 (const_string "a3"))) | |
1300 (set_attr_alternative "att" [(const_string "a1") (const_string "a2") | |
1301 (const_string "a3")]) | |
1302 (set_attr "att" "a1,a2,a3") | |
1303 */ | |
1304 DEF_RTL_EXPR(SET_ATTR_ALTERNATIVE, "set_attr_alternative", "sE", RTX_EXTRA) | |
1305 | |
1306 /* A conditional expression true if the value of the specified attribute of | |
1307 the current insn equals the specified value. The first operand is the | |
1308 attribute name and the second is the comparison value. */ | |
1309 DEF_RTL_EXPR(EQ_ATTR, "eq_attr", "ss", RTX_EXTRA) | |
1310 | |
1311 /* A special case of the above representing a set of alternatives. The first | |
1312 operand is bitmap of the set, the second one is the default value. */ | |
131 | 1313 DEF_RTL_EXPR(EQ_ATTR_ALT, "eq_attr_alt", "ww", RTX_EXTRA) |
0 | 1314 |
1315 /* A conditional expression which is true if the specified flag is | |
1316 true for the insn being scheduled in reorg. | |
1317 | |
1318 genattr.c defines the following flags which can be tested by | |
111 | 1319 (attr_flag "foo") expressions in eligible_for_delay: forward, backward. */ |
0 | 1320 |
1321 DEF_RTL_EXPR (ATTR_FLAG, "attr_flag", "s", RTX_EXTRA) | |
1322 | |
1323 /* General conditional. The first operand is a vector composed of pairs of | |
1324 expressions. The first element of each pair is evaluated, in turn. | |
1325 The value of the conditional is the second expression of the first pair | |
1326 whose first expression evaluates nonzero. If none of the expressions is | |
1327 true, the second operand will be used as the value of the conditional. */ | |
1328 DEF_RTL_EXPR(COND, "cond", "Ee", RTX_EXTRA) | |
1329 | |
111 | 1330 /* Definition of a pattern substitution meta operation on a DEFINE_EXPAND |
1331 or a DEFINE_INSN. Automatically generates new instances of DEFINE_INSNs | |
1332 that match the substitution pattern. | |
1333 | |
1334 Operand: | |
1335 0: The name of the substitition template. | |
1336 1: Input template to match to see if a substitution is applicable. | |
1337 2: A C expression giving an additional condition for the generated | |
1338 new define_expand or define_insn. | |
1339 3: Output tempalate to generate via substitution. | |
1340 | |
1341 Within a DEFINE_SUBST template, the meaning of some RTL expressions is | |
1342 different from their usual interpretation: a MATCH_OPERAND matches any | |
1343 expression tree with matching machine mode or with VOIDmode. Likewise, | |
1344 MATCH_OP_DUP and MATCH_DUP match more liberally in a DEFINE_SUBST than | |
1345 in other RTL expressions. MATCH_OPERATOR matches all common operators | |
1346 but also UNSPEC, UNSPEC_VOLATILE, and MATCH_OPERATORS from the input | |
1347 DEFINE_EXPAND or DEFINE_INSN. */ | |
1348 DEF_RTL_EXPR(DEFINE_SUBST, "define_subst", "sEsE", RTX_EXTRA) | |
1349 | |
1350 /* Substitution attribute to apply a DEFINE_SUBST to a pattern. | |
1351 | |
1352 Operand: | |
1353 0: The name of the subst-attribute. | |
1354 1: The name of the DEFINE_SUBST to be applied for this attribute. | |
1355 2: String to substitute for the subst-attribute name in the pattern | |
1356 name, for the case that the DEFINE_SUBST is not applied (i.e. the | |
1357 unmodified version of the pattern). | |
1358 3: String to substitute for the subst-attribute name in the pattern | |
1359 name, for the case that the DEFINE_SUBST is applied to the patten. | |
1360 | |
1361 The use of DEFINE_SUBST and DEFINE_SUBST_ATTR is explained in the | |
1362 GCC internals manual, under "RTL Templates Transformations". */ | |
1363 DEF_RTL_EXPR(DEFINE_SUBST_ATTR, "define_subst_attr", "ssss", RTX_EXTRA) | |
1364 | |
0 | 1365 #endif /* GENERATOR_FILE */ |
1366 | |
1367 /* | |
1368 Local variables: | |
1369 mode:c | |
1370 End: | |
1371 */ |