Mercurial > hg > CbC > CbC_gcc
annotate gcc/regs.h @ 88:f214c1d5b862
merge 89
| author | Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp> |
|---|---|
| date | Tue, 20 Dec 2011 18:53:46 +0900 |
| parents | f6334be47118 |
| children | 04ced10e8804 |
| rev | line source |
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| 0 | 1 /* Define per-register tables for data flow info and register allocation. |
| 2 Copyright (C) 1987, 1993, 1994, 1995, 1996, 1997, 1998, | |
|
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3 1999, 2000, 2003, 2004, 2005, 2006, 2007, 2008, 2010 Free Software |
| 0 | 4 Foundation, Inc. |
| 5 | |
| 6 This file is part of GCC. | |
| 7 | |
| 8 GCC is free software; you can redistribute it and/or modify it under | |
| 9 the terms of the GNU General Public License as published by the Free | |
| 10 Software Foundation; either version 3, or (at your option) any later | |
| 11 version. | |
| 12 | |
| 13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
| 14 WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 16 for more details. | |
| 17 | |
| 18 You should have received a copy of the GNU General Public License | |
| 19 along with GCC; see the file COPYING3. If not see | |
| 20 <http://www.gnu.org/licenses/>. */ | |
| 21 | |
| 22 #ifndef GCC_REGS_H | |
| 23 #define GCC_REGS_H | |
| 24 | |
|
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25 #include "machmode.h" |
| 0 | 26 #include "hard-reg-set.h" |
| 27 | |
| 28 #define REG_BYTES(R) mode_size[(int) GET_MODE (R)] | |
| 29 | |
| 30 /* When you only have the mode of a pseudo register before it has a hard | |
| 31 register chosen for it, this reports the size of each hard register | |
| 32 a pseudo in such a mode would get allocated to. A target may | |
| 33 override this. */ | |
| 34 | |
| 35 #ifndef REGMODE_NATURAL_SIZE | |
| 36 #define REGMODE_NATURAL_SIZE(MODE) UNITS_PER_WORD | |
| 37 #endif | |
| 38 | |
| 39 /* Maximum register number used in this function, plus one. */ | |
| 40 | |
| 41 extern int max_regno; | |
| 42 | |
| 43 /* REG_N_REFS and REG_N_SETS are initialized by a call to | |
| 44 regstat_init_n_sets_and_refs from the current values of | |
| 45 DF_REG_DEF_COUNT and DF_REG_USE_COUNT. REG_N_REFS and REG_N_SETS | |
| 46 should only be used if a pass need to change these values in some | |
| 47 magical way or or the pass needs to have accurate values for these | |
| 48 and is not using incremental df scanning. | |
| 49 | |
| 50 At the end of a pass that uses REG_N_REFS and REG_N_SETS, a call | |
|
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51 should be made to regstat_free_n_sets_and_refs. |
| 0 | 52 |
| 53 Local alloc seems to play pretty loose with these values. | |
| 54 REG_N_REFS is set to 0 if the register is used in an asm. | |
| 55 Furthermore, local_alloc calls regclass to hack both REG_N_REFS and | |
| 56 REG_N_SETS for three address insns. Other passes seem to have | |
| 57 other special values. */ | |
| 58 | |
| 59 | |
| 60 | |
| 61 /* Structure to hold values for REG_N_SETS (i) and REG_N_REFS (i). */ | |
| 62 | |
| 63 struct regstat_n_sets_and_refs_t | |
| 64 { | |
| 65 int sets; /* # of times (REG n) is set */ | |
| 66 int refs; /* # of times (REG n) is used or set */ | |
| 67 }; | |
| 68 | |
| 69 extern struct regstat_n_sets_and_refs_t *regstat_n_sets_and_refs; | |
| 70 | |
| 71 /* Indexed by n, gives number of times (REG n) is used or set. */ | |
| 72 static inline int | |
| 73 REG_N_REFS(int regno) | |
| 74 { | |
| 75 return regstat_n_sets_and_refs[regno].refs; | |
| 76 } | |
| 77 | |
| 78 /* Indexed by n, gives number of times (REG n) is used or set. */ | |
| 79 #define SET_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs = V) | |
| 80 #define INC_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs += V) | |
| 81 | |
| 82 /* Indexed by n, gives number of times (REG n) is set. */ | |
| 83 static inline int | |
| 84 REG_N_SETS (int regno) | |
| 85 { | |
| 86 return regstat_n_sets_and_refs[regno].sets; | |
| 87 } | |
| 88 | |
| 89 /* Indexed by n, gives number of times (REG n) is set. */ | |
| 90 #define SET_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets = V) | |
| 91 #define INC_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets += V) | |
| 92 | |
| 93 | |
| 94 /* Functions defined in reg-stat.c. */ | |
| 95 extern void regstat_init_n_sets_and_refs (void); | |
| 96 extern void regstat_free_n_sets_and_refs (void); | |
| 97 extern void regstat_compute_ri (void); | |
| 98 extern void regstat_free_ri (void); | |
| 99 extern bitmap regstat_get_setjmp_crosses (void); | |
| 100 extern void regstat_compute_calls_crossed (void); | |
| 101 extern void regstat_free_calls_crossed (void); | |
| 102 | |
| 103 | |
| 104 /* Register information indexed by register number. This structure is | |
| 105 initialized by calling regstat_compute_ri and is destroyed by | |
| 106 calling regstat_free_ri. */ | |
| 107 struct reg_info_t | |
| 108 { | |
| 109 int freq; /* # estimated frequency (REG n) is used or set */ | |
| 110 int deaths; /* # of times (REG n) dies */ | |
| 111 int live_length; /* # of instructions (REG n) is live */ | |
| 112 int calls_crossed; /* # of calls (REG n) is live across */ | |
| 113 int freq_calls_crossed; /* # estimated frequency (REG n) crosses call */ | |
| 114 int throw_calls_crossed; /* # of calls that may throw (REG n) is live across */ | |
| 115 int basic_block; /* # of basic blocks (REG n) is used in */ | |
| 116 }; | |
| 117 | |
| 118 extern struct reg_info_t *reg_info_p; | |
| 119 | |
| 120 /* The number allocated elements of reg_info_p. */ | |
| 121 extern size_t reg_info_p_size; | |
| 122 | |
| 123 /* Estimate frequency of references to register N. */ | |
| 124 | |
| 125 #define REG_FREQ(N) (reg_info_p[N].freq) | |
| 126 | |
| 127 /* The weights for each insn varies from 0 to REG_FREQ_BASE. | |
| 128 This constant does not need to be high, as in infrequently executed | |
| 129 regions we want to count instructions equivalently to optimize for | |
| 130 size instead of speed. */ | |
| 131 #define REG_FREQ_MAX 1000 | |
| 132 | |
| 133 /* Compute register frequency from the BB frequency. When optimizing for size, | |
| 134 or profile driven feedback is available and the function is never executed, | |
| 135 frequency is always equivalent. Otherwise rescale the basic block | |
| 136 frequency. */ | |
| 137 #define REG_FREQ_FROM_BB(bb) (optimize_size \ | |
| 138 || (flag_branch_probabilities \ | |
| 139 && !ENTRY_BLOCK_PTR->count) \ | |
| 140 ? REG_FREQ_MAX \ | |
| 141 : ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\ | |
| 142 ? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\ | |
| 143 : 1) | |
| 144 | |
| 145 /* Indexed by N, gives number of insns in which register N dies. | |
| 146 Note that if register N is live around loops, it can die | |
| 147 in transitions between basic blocks, and that is not counted here. | |
| 148 So this is only a reliable indicator of how many regions of life there are | |
| 149 for registers that are contained in one basic block. */ | |
| 150 | |
| 151 #define REG_N_DEATHS(N) (reg_info_p[N].deaths) | |
| 152 | |
| 153 /* Get the number of consecutive words required to hold pseudo-reg N. */ | |
| 154 | |
| 155 #define PSEUDO_REGNO_SIZE(N) \ | |
| 156 ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1) \ | |
| 157 / UNITS_PER_WORD) | |
| 158 | |
| 159 /* Get the number of bytes required to hold pseudo-reg N. */ | |
| 160 | |
| 161 #define PSEUDO_REGNO_BYTES(N) \ | |
| 162 GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) | |
| 163 | |
| 164 /* Get the machine mode of pseudo-reg N. */ | |
| 165 | |
| 166 #define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N]) | |
| 167 | |
| 168 /* Indexed by N, gives number of CALL_INSNS across which (REG n) is live. */ | |
| 169 | |
| 170 #define REG_N_CALLS_CROSSED(N) (reg_info_p[N].calls_crossed) | |
| 171 #define REG_FREQ_CALLS_CROSSED(N) (reg_info_p[N].freq_calls_crossed) | |
| 172 | |
| 173 /* Indexed by N, gives number of CALL_INSNS that may throw, across which | |
| 174 (REG n) is live. */ | |
| 175 | |
| 176 #define REG_N_THROWING_CALLS_CROSSED(N) (reg_info_p[N].throw_calls_crossed) | |
| 177 | |
| 178 /* Total number of instructions at which (REG n) is live. The larger | |
| 179 this is, the less priority (REG n) gets for allocation in a hard | |
| 180 register (in global-alloc). This is set in df-problems.c whenever | |
| 181 register info is requested and remains valid for the rest of the | |
| 182 compilation of the function; it is used to control register | |
| 183 allocation. | |
| 184 | |
| 185 local-alloc.c may alter this number to change the priority. | |
| 186 | |
| 187 Negative values are special. | |
| 188 -1 is used to mark a pseudo reg which has a constant or memory equivalent | |
| 189 and is used infrequently enough that it should not get a hard register. | |
| 190 -2 is used to mark a pseudo reg for a parameter, when a frame pointer | |
| 191 is not required. global.c makes an allocno for this but does | |
| 192 not try to assign a hard register to it. */ | |
| 193 | |
| 194 #define REG_LIVE_LENGTH(N) (reg_info_p[N].live_length) | |
| 195 | |
| 196 /* Indexed by n, gives number of basic block that (REG n) is used in. | |
| 197 If the value is REG_BLOCK_GLOBAL (-1), | |
| 198 it means (REG n) is used in more than one basic block. | |
| 199 REG_BLOCK_UNKNOWN (0) means it hasn't been seen yet so we don't know. | |
| 200 This information remains valid for the rest of the compilation | |
| 201 of the current function; it is used to control register allocation. */ | |
| 202 | |
| 203 #define REG_BLOCK_UNKNOWN 0 | |
| 204 #define REG_BLOCK_GLOBAL -1 | |
| 205 | |
| 206 #define REG_BASIC_BLOCK(N) (reg_info_p[N].basic_block) | |
| 207 | |
| 208 /* Vector of substitutions of register numbers, | |
| 209 used to map pseudo regs into hardware regs. | |
| 210 | |
| 211 This can't be folded into reg_n_info without changing all of the | |
| 212 machine dependent directories, since the reload functions | |
| 213 in the machine dependent files access it. */ | |
| 214 | |
| 215 extern short *reg_renumber; | |
| 216 | |
| 217 /* Flag set by local-alloc or global-alloc if they decide to allocate | |
| 218 something in a call-clobbered register. */ | |
| 219 | |
| 220 extern int caller_save_needed; | |
| 221 | |
| 222 /* Predicate to decide whether to give a hard reg to a pseudo which | |
| 223 is referenced REFS times and would need to be saved and restored | |
| 224 around a call CALLS times. */ | |
| 225 | |
| 226 #ifndef CALLER_SAVE_PROFITABLE | |
| 227 #define CALLER_SAVE_PROFITABLE(REFS, CALLS) (4 * (CALLS) < (REFS)) | |
| 228 #endif | |
| 229 | |
| 230 /* Select a register mode required for caller save of hard regno REGNO. */ | |
| 231 #ifndef HARD_REGNO_CALLER_SAVE_MODE | |
| 232 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \ | |
| 233 choose_hard_reg_mode (REGNO, NREGS, false) | |
| 234 #endif | |
| 235 | |
| 236 /* Registers that get partially clobbered by a call in a given mode. | |
| 237 These must not be call used registers. */ | |
| 238 #ifndef HARD_REGNO_CALL_PART_CLOBBERED | |
| 239 #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0 | |
| 240 #endif | |
| 241 | |
| 242 typedef unsigned short move_table[N_REG_CLASSES]; | |
| 243 | |
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244 /* Target-dependent globals. */ |
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245 struct target_regs { |
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246 /* For each starting hard register, the number of consecutive hard |
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247 registers that a given machine mode occupies. */ |
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248 unsigned char x_hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE]; |
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249 |
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250 /* For each hard register, the widest mode object that it can contain. |
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251 This will be a MODE_INT mode if the register can hold integers. Otherwise |
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252 it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the |
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253 register. */ |
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254 enum machine_mode x_reg_raw_mode[FIRST_PSEUDO_REGISTER]; |
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255 |
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256 /* Vector indexed by machine mode saying whether there are regs of |
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257 that mode. */ |
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258 bool x_have_regs_of_mode[MAX_MACHINE_MODE]; |
| 0 | 259 |
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260 /* 1 if the corresponding class contains a register of the given mode. */ |
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261 char x_contains_reg_of_mode[N_REG_CLASSES][MAX_MACHINE_MODE]; |
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262 |
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263 /* Maximum cost of moving from a register in one class to a register |
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264 in another class. Based on TARGET_REGISTER_MOVE_COST. */ |
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265 move_table *x_move_cost[MAX_MACHINE_MODE]; |
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266 |
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267 /* Similar, but here we don't have to move if the first index is a |
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268 subset of the second so in that case the cost is zero. */ |
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269 move_table *x_may_move_in_cost[MAX_MACHINE_MODE]; |
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270 |
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271 /* Similar, but here we don't have to move if the first index is a |
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272 superset of the second so in that case the cost is zero. */ |
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273 move_table *x_may_move_out_cost[MAX_MACHINE_MODE]; |
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274 |
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275 /* Keep track of the last mode we initialized move costs for. */ |
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276 int x_last_mode_for_init_move_cost; |
| 0 | 277 |
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278 /* Record for each mode whether we can move a register directly to or |
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279 from an object of that mode in memory. If we can't, we won't try |
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280 to use that mode directly when accessing a field of that mode. */ |
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281 char x_direct_load[NUM_MACHINE_MODES]; |
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282 char x_direct_store[NUM_MACHINE_MODES]; |
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283 |
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284 /* Record for each mode whether we can float-extend from memory. */ |
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285 bool x_float_extend_from_mem[NUM_MACHINE_MODES][NUM_MACHINE_MODES]; |
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286 }; |
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287 |
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288 extern struct target_regs default_target_regs; |
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289 #if SWITCHABLE_TARGET |
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290 extern struct target_regs *this_target_regs; |
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291 #else |
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292 #define this_target_regs (&default_target_regs) |
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293 #endif |
| 0 | 294 |
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295 #define hard_regno_nregs \ |
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296 (this_target_regs->x_hard_regno_nregs) |
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297 #define reg_raw_mode \ |
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298 (this_target_regs->x_reg_raw_mode) |
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299 #define have_regs_of_mode \ |
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300 (this_target_regs->x_have_regs_of_mode) |
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301 #define contains_reg_of_mode \ |
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302 (this_target_regs->x_contains_reg_of_mode) |
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303 #define move_cost \ |
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304 (this_target_regs->x_move_cost) |
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305 #define may_move_in_cost \ |
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306 (this_target_regs->x_may_move_in_cost) |
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307 #define may_move_out_cost \ |
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308 (this_target_regs->x_may_move_out_cost) |
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309 #define direct_load \ |
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310 (this_target_regs->x_direct_load) |
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311 #define direct_store \ |
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312 (this_target_regs->x_direct_store) |
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313 #define float_extend_from_mem \ |
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314 (this_target_regs->x_float_extend_from_mem) |
| 0 | 315 |
| 316 /* Return an exclusive upper bound on the registers occupied by hard | |
| 317 register (reg:MODE REGNO). */ | |
| 318 | |
| 319 static inline unsigned int | |
| 320 end_hard_regno (enum machine_mode mode, unsigned int regno) | |
| 321 { | |
| 322 return regno + hard_regno_nregs[regno][(int) mode]; | |
| 323 } | |
| 324 | |
| 325 /* Likewise for hard register X. */ | |
| 326 | |
| 327 #define END_HARD_REGNO(X) end_hard_regno (GET_MODE (X), REGNO (X)) | |
| 328 | |
| 329 /* Likewise for hard or pseudo register X. */ | |
| 330 | |
| 331 #define END_REGNO(X) (HARD_REGISTER_P (X) ? END_HARD_REGNO (X) : REGNO (X) + 1) | |
| 332 | |
| 333 /* Add to REGS all the registers required to store a value of mode MODE | |
| 334 in register REGNO. */ | |
| 335 | |
| 336 static inline void | |
| 337 add_to_hard_reg_set (HARD_REG_SET *regs, enum machine_mode mode, | |
| 338 unsigned int regno) | |
| 339 { | |
| 340 unsigned int end_regno; | |
| 341 | |
| 342 end_regno = end_hard_regno (mode, regno); | |
| 343 do | |
| 344 SET_HARD_REG_BIT (*regs, regno); | |
| 345 while (++regno < end_regno); | |
| 346 } | |
| 347 | |
| 348 /* Likewise, but remove the registers. */ | |
| 349 | |
| 350 static inline void | |
| 351 remove_from_hard_reg_set (HARD_REG_SET *regs, enum machine_mode mode, | |
| 352 unsigned int regno) | |
| 353 { | |
| 354 unsigned int end_regno; | |
| 355 | |
| 356 end_regno = end_hard_regno (mode, regno); | |
| 357 do | |
| 358 CLEAR_HARD_REG_BIT (*regs, regno); | |
| 359 while (++regno < end_regno); | |
| 360 } | |
| 361 | |
| 362 /* Return true if REGS contains the whole of (reg:MODE REGNO). */ | |
| 363 | |
| 364 static inline bool | |
| 365 in_hard_reg_set_p (const HARD_REG_SET regs, enum machine_mode mode, | |
| 366 unsigned int regno) | |
| 367 { | |
| 368 unsigned int end_regno; | |
| 369 | |
| 370 if (!TEST_HARD_REG_BIT (regs, regno)) | |
| 371 return false; | |
| 372 | |
| 373 end_regno = end_hard_regno (mode, regno); | |
| 374 while (++regno < end_regno) | |
| 375 if (!TEST_HARD_REG_BIT (regs, regno)) | |
| 376 return false; | |
| 377 | |
| 378 return true; | |
| 379 } | |
| 380 | |
| 381 /* Return true if (reg:MODE REGNO) includes an element of REGS. */ | |
| 382 | |
| 383 static inline bool | |
| 384 overlaps_hard_reg_set_p (const HARD_REG_SET regs, enum machine_mode mode, | |
| 385 unsigned int regno) | |
| 386 { | |
| 387 unsigned int end_regno; | |
| 388 | |
| 389 if (TEST_HARD_REG_BIT (regs, regno)) | |
| 390 return true; | |
| 391 | |
| 392 end_regno = end_hard_regno (mode, regno); | |
| 393 while (++regno < end_regno) | |
| 394 if (TEST_HARD_REG_BIT (regs, regno)) | |
| 395 return true; | |
| 396 | |
| 397 return false; | |
| 398 } | |
| 399 | |
| 400 #endif /* GCC_REGS_H */ |