Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/mips/vxworks.h @ 67:f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
author | nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp> |
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date | Tue, 22 Mar 2011 17:18:12 +0900 |
parents | a06113de4d67 |
children | 04ced10e8804 |
rev | line source |
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67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1 /* Copyright (C) 1999, 2003, 2004, 2007, 2008, 2010, 2011 |
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
2 Free Software Foundation, Inc. |
0 | 3 |
4 This file is part of GCC. | |
5 | |
6 GCC is free software; you can redistribute it and/or modify | |
7 it under the terms of the GNU General Public License as published by | |
8 the Free Software Foundation; either version 3, or (at your option) | |
9 any later version. | |
10 | |
11 GCC is distributed in the hope that it will be useful, | |
12 but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 GNU General Public License for more details. | |
15 | |
16 You should have received a copy of the GNU General Public License | |
17 along with GCC; see the file COPYING3. If not see | |
18 <http://www.gnu.org/licenses/>. */ | |
19 | |
20 #undef TARGET_VERSION | |
21 #define TARGET_VERSION fprintf (stderr, " (MIPS, VxWorks syntax)"); | |
22 | |
23 #undef ASM_SPEC | |
24 #define ASM_SPEC "\ | |
25 %{!G:-G 0} %{G*} %(endian_spec) %{mips1} %{mips2} %{mips3} %{mips4} \ | |
26 %{mips32} %{mips32r2} %{mips64} \ | |
27 %{mips16:%{!mno-mips16:-mips16}} %{mno-mips16:-no-mips16} \ | |
28 %(subtarget_asm_optimizing_spec) \ | |
29 %(subtarget_asm_debugging_spec) \ | |
30 %{mabi=*} %{!mabi*: %(asm_abi_default_spec)} \ | |
31 %{mgp32} %{mgp64} %{march=*} %{mxgot:-xgot} \ | |
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
32 %{mtune=*} \ |
0 | 33 %(subtarget_asm_spec)" |
34 | |
35 #undef LINK_SPEC | |
36 #define LINK_SPEC "\ | |
37 %(endian_spec) \ | |
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
38 %{!G:-G 0} %{G*} %{mips1} %{mips2} %{mips3} %{mips4} %{mips32} %{mips64} " \ |
0 | 39 VXWORKS_LINK_SPEC |
40 | |
41 #undef LIB_SPEC | |
42 #define LIB_SPEC VXWORKS_LIB_SPEC | |
43 #undef STARTFILE_SPEC | |
44 #define STARTFILE_SPEC VXWORKS_STARTFILE_SPEC | |
45 #undef ENDFILE_SPEC | |
46 #define ENDFILE_SPEC VXWORKS_ENDFILE_SPEC | |
47 | |
48 #define TARGET_OS_CPP_BUILTINS() \ | |
49 do \ | |
50 { \ | |
51 if (TARGET_64BIT) \ | |
52 builtin_define ("CPU=MIPS64"); \ | |
53 else \ | |
54 builtin_define ("CPU=MIPS32"); \ | |
55 if (TARGET_BIG_ENDIAN) \ | |
56 builtin_define ("MIPSEB"); \ | |
57 else \ | |
58 builtin_define ("MIPSEL"); \ | |
59 if (TARGET_SOFT_FLOAT) \ | |
60 builtin_define ("SOFT_FLOAT"); \ | |
61 VXWORKS_OS_CPP_BUILTINS (); \ | |
62 } \ | |
63 while (0) | |
64 | |
65 #undef SUBTARGET_CPP_SPEC | |
66 #define SUBTARGET_CPP_SPEC VXWORKS_ADDITIONAL_CPP_SPEC | |
67 | |
68 /* No sdata. */ | |
69 #undef MIPS_DEFAULT_GVALUE | |
70 #define MIPS_DEFAULT_GVALUE 0 | |
71 | |
72 /* No _mcount profiling on VxWorks. */ | |
73 #undef FUNCTION_PROFILER | |
74 #define FUNCTION_PROFILER VXWORKS_FUNCTION_PROFILER | |
75 | |
76 #undef SUBTARGET_ASM_SPEC | |
77 #define SUBTARGET_ASM_SPEC "%{mrtp:%{fPIC|fpic:-mvxworks-pic}}" | |
78 | |
79 #undef SUBTARGET_OVERRIDE_OPTIONS | |
80 #define SUBTARGET_OVERRIDE_OPTIONS VXWORKS_OVERRIDE_OPTIONS | |
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
81 |
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
82 #undef DBX_REGISTER_NUMBER |