Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/score/score7.c @ 67:f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
| author | nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp> |
|---|---|
| date | Tue, 22 Mar 2011 17:18:12 +0900 |
| parents | b7f97abdc517 |
| children |
| rev | line source |
|---|---|
| 0 | 1 /* score7.c for Sunplus S+CORE processor |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
2 Copyright (C) 2005, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. |
| 0 | 3 Contributed by Sunnorth |
| 4 | |
| 5 This file is part of GCC. | |
| 6 | |
| 7 GCC is free software; you can redistribute it and/or modify it | |
| 8 under the terms of the GNU General Public License as published | |
| 9 by the Free Software Foundation; either version 3, or (at your | |
| 10 option) any later version. | |
| 11 | |
| 12 GCC is distributed in the hope that it will be useful, but WITHOUT | |
| 13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
| 14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
| 15 License for more details. | |
| 16 | |
| 17 You should have received a copy of the GNU General Public License | |
| 18 along with GCC; see the file COPYING3. If not see | |
| 19 <http://www.gnu.org/licenses/>. */ | |
| 20 | |
| 21 #include "config.h" | |
| 22 #include "system.h" | |
| 23 #include "coretypes.h" | |
| 24 #include "tm.h" | |
| 25 #include "rtl.h" | |
| 26 #include "regs.h" | |
| 27 #include "hard-reg-set.h" | |
| 28 #include "insn-config.h" | |
| 29 #include "conditions.h" | |
| 30 #include "insn-attr.h" | |
| 31 #include "recog.h" | |
|
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f6334be47118
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parents:
63
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changeset
|
32 #include "diagnostic-core.h" |
| 0 | 33 #include "output.h" |
| 34 #include "tree.h" | |
| 35 #include "function.h" | |
| 36 #include "expr.h" | |
| 37 #include "optabs.h" | |
| 38 #include "flags.h" | |
| 39 #include "reload.h" | |
| 40 #include "tm_p.h" | |
| 41 #include "ggc.h" | |
| 42 #include "gstab.h" | |
| 43 #include "hashtab.h" | |
| 44 #include "debug.h" | |
| 45 #include "target.h" | |
| 46 #include "target-def.h" | |
| 47 #include "integrate.h" | |
| 48 #include "langhooks.h" | |
| 49 #include "cfglayout.h" | |
| 50 #include "score7.h" | |
| 51 #include "df.h" | |
| 52 | |
| 53 #define BITSET_P(VALUE, BIT) (((VALUE) & (1L << (BIT))) != 0) | |
| 54 #define INS_BUF_SZ 128 | |
| 55 | |
| 56 extern enum reg_class score_char_to_class[256]; | |
| 57 | |
| 58 static int score7_sdata_max; | |
| 59 static char score7_ins[INS_BUF_SZ + 8]; | |
| 60 | |
| 61 /* Return true if SYMBOL is a SYMBOL_REF and OFFSET + SYMBOL points | |
| 62 to the same object as SYMBOL. */ | |
| 63 static int | |
| 64 score7_offset_within_object_p (rtx symbol, HOST_WIDE_INT offset) | |
| 65 { | |
| 66 if (GET_CODE (symbol) != SYMBOL_REF) | |
| 67 return 0; | |
| 68 | |
| 69 if (CONSTANT_POOL_ADDRESS_P (symbol) | |
| 70 && offset >= 0 | |
| 71 && offset < (int)GET_MODE_SIZE (get_pool_mode (symbol))) | |
| 72 return 1; | |
| 73 | |
| 74 if (SYMBOL_REF_DECL (symbol) != 0 | |
| 75 && offset >= 0 | |
| 76 && offset < int_size_in_bytes (TREE_TYPE (SYMBOL_REF_DECL (symbol)))) | |
| 77 return 1; | |
| 78 | |
| 79 return 0; | |
| 80 } | |
| 81 | |
| 82 /* Split X into a base and a constant offset, storing them in *BASE | |
| 83 and *OFFSET respectively. */ | |
| 84 static void | |
| 85 score7_split_const (rtx x, rtx *base, HOST_WIDE_INT *offset) | |
| 86 { | |
| 87 *offset = 0; | |
| 88 | |
| 89 if (GET_CODE (x) == CONST) | |
| 90 x = XEXP (x, 0); | |
| 91 | |
| 92 if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
| 93 { | |
| 94 *offset += INTVAL (XEXP (x, 1)); | |
| 95 x = XEXP (x, 0); | |
| 96 } | |
| 97 | |
| 98 *base = x; | |
| 99 } | |
| 100 | |
| 101 /* Classify symbol X, which must be a SYMBOL_REF or a LABEL_REF. */ | |
| 102 static enum score_symbol_type | |
| 103 score7_classify_symbol (rtx x) | |
| 104 { | |
| 105 if (GET_CODE (x) == LABEL_REF) | |
| 106 return SYMBOL_GENERAL; | |
| 107 | |
| 108 gcc_assert (GET_CODE (x) == SYMBOL_REF); | |
| 109 | |
| 110 if (CONSTANT_POOL_ADDRESS_P (x)) | |
| 111 { | |
| 112 if (GET_MODE_SIZE (get_pool_mode (x)) <= SCORE7_SDATA_MAX) | |
| 113 return SYMBOL_SMALL_DATA; | |
| 114 return SYMBOL_GENERAL; | |
| 115 } | |
| 116 if (SYMBOL_REF_SMALL_P (x)) | |
| 117 return SYMBOL_SMALL_DATA; | |
| 118 return SYMBOL_GENERAL; | |
| 119 } | |
| 120 | |
| 121 /* Return true if the current function must save REGNO. */ | |
| 122 static int | |
| 123 score7_save_reg_p (unsigned int regno) | |
| 124 { | |
| 125 /* Check call-saved registers. */ | |
| 126 if (df_regs_ever_live_p (regno) && !call_used_regs[regno]) | |
| 127 return 1; | |
| 128 | |
| 129 /* We need to save the old frame pointer before setting up a new one. */ | |
| 130 if (regno == HARD_FRAME_POINTER_REGNUM && frame_pointer_needed) | |
| 131 return 1; | |
| 132 | |
| 133 /* We need to save the incoming return address if it is ever clobbered | |
| 134 within the function. */ | |
| 135 if (regno == RA_REGNUM && df_regs_ever_live_p (regno)) | |
| 136 return 1; | |
| 137 | |
| 138 return 0; | |
| 139 } | |
| 140 | |
| 141 /* Return one word of double-word value OP, taking into account the fixed | |
| 142 endianness of certain registers. HIGH_P is true to select the high part, | |
| 143 false to select the low part. */ | |
| 144 static rtx | |
| 145 score7_subw (rtx op, int high_p) | |
| 146 { | |
| 147 unsigned int byte; | |
| 148 enum machine_mode mode = GET_MODE (op); | |
| 149 | |
| 150 if (mode == VOIDmode) | |
| 151 mode = DImode; | |
| 152 | |
| 153 byte = (TARGET_LITTLE_ENDIAN ? high_p : !high_p) ? UNITS_PER_WORD : 0; | |
| 154 | |
| 155 if (GET_CODE (op) == REG && REGNO (op) == HI_REGNUM) | |
| 156 return gen_rtx_REG (SImode, high_p ? HI_REGNUM : LO_REGNUM); | |
| 157 | |
| 158 if (GET_CODE (op) == MEM) | |
| 159 return adjust_address (op, SImode, byte); | |
| 160 | |
| 161 return simplify_gen_subreg (SImode, op, mode, byte); | |
| 162 } | |
| 163 | |
| 164 static struct score7_frame_info * | |
| 165 score7_cached_frame (void) | |
| 166 { | |
| 167 static struct score7_frame_info _frame_info; | |
| 168 return &_frame_info; | |
| 169 } | |
| 170 | |
| 171 /* Return the bytes needed to compute the frame pointer from the current | |
| 172 stack pointer. SIZE is the size (in bytes) of the local variables. */ | |
| 173 static struct score7_frame_info * | |
| 174 score7_compute_frame_size (HOST_WIDE_INT size) | |
| 175 { | |
| 176 unsigned int regno; | |
| 177 struct score7_frame_info *f = score7_cached_frame (); | |
| 178 | |
| 179 memset (f, 0, sizeof (struct score7_frame_info)); | |
| 180 f->gp_reg_size = 0; | |
| 181 f->mask = 0; | |
| 182 f->var_size = SCORE7_STACK_ALIGN (size); | |
| 183 f->args_size = crtl->outgoing_args_size; | |
| 184 f->cprestore_size = flag_pic ? UNITS_PER_WORD : 0; | |
| 185 if (f->var_size == 0 && current_function_is_leaf) | |
| 186 f->args_size = f->cprestore_size = 0; | |
| 187 | |
| 188 if (f->args_size == 0 && cfun->calls_alloca) | |
| 189 f->args_size = UNITS_PER_WORD; | |
| 190 | |
| 191 f->total_size = f->var_size + f->args_size + f->cprestore_size; | |
| 192 for (regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++) | |
| 193 { | |
| 194 if (score7_save_reg_p (regno)) | |
| 195 { | |
| 196 f->gp_reg_size += GET_MODE_SIZE (SImode); | |
| 197 f->mask |= 1 << (regno - GP_REG_FIRST); | |
| 198 } | |
| 199 } | |
| 200 | |
| 201 if (crtl->calls_eh_return) | |
| 202 { | |
| 203 unsigned int i; | |
| 204 for (i = 0;; ++i) | |
| 205 { | |
| 206 regno = EH_RETURN_DATA_REGNO (i); | |
| 207 if (regno == INVALID_REGNUM) | |
| 208 break; | |
| 209 f->gp_reg_size += GET_MODE_SIZE (SImode); | |
| 210 f->mask |= 1 << (regno - GP_REG_FIRST); | |
| 211 } | |
| 212 } | |
| 213 | |
| 214 f->total_size += f->gp_reg_size; | |
| 215 f->num_gp = f->gp_reg_size / UNITS_PER_WORD; | |
| 216 | |
| 217 if (f->mask) | |
| 218 { | |
| 219 HOST_WIDE_INT offset; | |
| 220 offset = (f->args_size + f->cprestore_size + f->var_size | |
| 221 + f->gp_reg_size - GET_MODE_SIZE (SImode)); | |
| 222 f->gp_sp_offset = offset; | |
| 223 } | |
| 224 else | |
| 225 f->gp_sp_offset = 0; | |
| 226 | |
| 227 return f; | |
| 228 } | |
| 229 | |
| 230 /* Return true if X is a valid base register for the given mode. | |
| 231 Allow only hard registers if STRICT. */ | |
| 232 static int | |
| 233 score7_valid_base_register_p (rtx x, int strict) | |
| 234 { | |
| 235 if (!strict && GET_CODE (x) == SUBREG) | |
| 236 x = SUBREG_REG (x); | |
| 237 | |
| 238 return (GET_CODE (x) == REG | |
| 239 && score7_regno_mode_ok_for_base_p (REGNO (x), strict)); | |
| 240 } | |
| 241 | |
| 242 /* Return true if X is a valid address for machine mode MODE. If it is, | |
| 243 fill in INFO appropriately. STRICT is true if we should only accept | |
| 244 hard base registers. */ | |
| 245 static int | |
| 246 score7_classify_address (struct score7_address_info *info, | |
| 247 enum machine_mode mode, rtx x, int strict) | |
| 248 { | |
| 249 info->code = GET_CODE (x); | |
| 250 | |
| 251 switch (info->code) | |
| 252 { | |
| 253 case REG: | |
| 254 case SUBREG: | |
| 255 info->type = SCORE7_ADD_REG; | |
| 256 info->reg = x; | |
| 257 info->offset = const0_rtx; | |
| 258 return score7_valid_base_register_p (info->reg, strict); | |
| 259 case PLUS: | |
| 260 info->type = SCORE7_ADD_REG; | |
| 261 info->reg = XEXP (x, 0); | |
| 262 info->offset = XEXP (x, 1); | |
| 263 return (score7_valid_base_register_p (info->reg, strict) | |
| 264 && GET_CODE (info->offset) == CONST_INT | |
| 265 && IMM_IN_RANGE (INTVAL (info->offset), 15, 1)); | |
| 266 case PRE_DEC: | |
| 267 case POST_DEC: | |
| 268 case PRE_INC: | |
| 269 case POST_INC: | |
| 270 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (SImode)) | |
| 271 return false; | |
| 272 info->type = SCORE7_ADD_REG; | |
| 273 info->reg = XEXP (x, 0); | |
| 274 info->offset = GEN_INT (GET_MODE_SIZE (mode)); | |
| 275 return score7_valid_base_register_p (info->reg, strict); | |
| 276 case CONST_INT: | |
| 277 info->type = SCORE7_ADD_CONST_INT; | |
| 278 return IMM_IN_RANGE (INTVAL (x), 15, 1); | |
| 279 case CONST: | |
| 280 case LABEL_REF: | |
| 281 case SYMBOL_REF: | |
| 282 info->type = SCORE7_ADD_SYMBOLIC; | |
| 283 return (score7_symbolic_constant_p (x, &info->symbol_type) | |
| 284 && (info->symbol_type == SYMBOL_GENERAL | |
| 285 || info->symbol_type == SYMBOL_SMALL_DATA)); | |
| 286 default: | |
| 287 return 0; | |
| 288 } | |
| 289 } | |
| 290 | |
| 291 bool | |
|
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f6334be47118
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nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
292 score7_return_in_memory (const_tree type, const_tree fndecl ATTRIBUTE_UNUSED) |
| 0 | 293 { |
| 294 return ((TYPE_MODE (type) == BLKmode) | |
| 295 || (int_size_in_bytes (type) > 2 * UNITS_PER_WORD) | |
| 296 || (int_size_in_bytes (type) == -1)); | |
| 297 } | |
| 298 | |
| 299 /* Return a legitimate address for REG + OFFSET. */ | |
| 300 static rtx | |
| 301 score7_add_offset (rtx reg, HOST_WIDE_INT offset) | |
| 302 { | |
| 303 if (!IMM_IN_RANGE (offset, 15, 1)) | |
| 304 { | |
| 305 reg = expand_simple_binop (GET_MODE (reg), PLUS, | |
| 306 gen_int_mode (offset & 0xffffc000, | |
| 307 GET_MODE (reg)), | |
| 308 reg, NULL, 0, OPTAB_WIDEN); | |
| 309 offset &= 0x3fff; | |
| 310 } | |
| 311 | |
| 312 return plus_constant (reg, offset); | |
| 313 } | |
| 314 | |
| 315 /* Implement TARGET_ASM_OUTPUT_MI_THUNK. Generate rtl rather than asm text | |
| 316 in order to avoid duplicating too much logic from elsewhere. */ | |
| 317 void | |
| 318 score7_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, | |
| 319 HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset, | |
| 320 tree function) | |
| 321 { | |
| 322 rtx this_rtx, temp1, insn, fnaddr; | |
| 323 | |
| 324 /* Pretend to be a post-reload pass while generating rtl. */ | |
| 325 reload_completed = 1; | |
| 326 | |
| 327 /* Mark the end of the (empty) prologue. */ | |
| 328 emit_note (NOTE_INSN_PROLOGUE_END); | |
| 329 | |
| 330 /* We need two temporary registers in some cases. */ | |
| 331 temp1 = gen_rtx_REG (Pmode, 8); | |
| 332 | |
| 333 /* Find out which register contains the "this" pointer. */ | |
| 334 if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function)) | |
| 335 this_rtx = gen_rtx_REG (Pmode, ARG_REG_FIRST + 1); | |
| 336 else | |
| 337 this_rtx = gen_rtx_REG (Pmode, ARG_REG_FIRST); | |
| 338 | |
| 339 /* Add DELTA to THIS_RTX. */ | |
| 340 if (delta != 0) | |
| 341 { | |
| 342 rtx offset = GEN_INT (delta); | |
|
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f6334be47118
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nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
343 if (!(delta >= -32768 && delta <= 32767)) |
| 0 | 344 { |
| 345 emit_move_insn (temp1, offset); | |
| 346 offset = temp1; | |
| 347 } | |
| 348 emit_insn (gen_add3_insn (this_rtx, this_rtx, offset)); | |
| 349 } | |
| 350 | |
| 351 /* If needed, add *(*THIS_RTX + VCALL_OFFSET) to THIS_RTX. */ | |
| 352 if (vcall_offset != 0) | |
| 353 { | |
| 354 rtx addr; | |
| 355 | |
| 356 /* Set TEMP1 to *THIS_RTX. */ | |
| 357 emit_move_insn (temp1, gen_rtx_MEM (Pmode, this_rtx)); | |
| 358 | |
| 359 /* Set ADDR to a legitimate address for *THIS_RTX + VCALL_OFFSET. */ | |
| 360 addr = score7_add_offset (temp1, vcall_offset); | |
| 361 | |
| 362 /* Load the offset and add it to THIS_RTX. */ | |
| 363 emit_move_insn (temp1, gen_rtx_MEM (Pmode, addr)); | |
| 364 emit_insn (gen_add3_insn (this_rtx, this_rtx, temp1)); | |
| 365 } | |
| 366 | |
| 367 /* Jump to the target function. */ | |
| 368 fnaddr = XEXP (DECL_RTL (function), 0); | |
| 369 insn = emit_call_insn (gen_sibcall_internal_score7 (fnaddr, const0_rtx)); | |
| 370 SIBLING_CALL_P (insn) = 1; | |
| 371 | |
| 372 /* Run just enough of rest_of_compilation. This sequence was | |
| 373 "borrowed" from alpha.c. */ | |
| 374 insn = get_insns (); | |
| 375 insn_locators_alloc (); | |
| 376 split_all_insns_noflow (); | |
| 377 shorten_branches (insn); | |
| 378 final_start_function (insn, file, 1); | |
| 379 final (insn, file, 1); | |
| 380 final_end_function (); | |
| 381 | |
| 382 /* Clean up the vars set above. Note that final_end_function resets | |
| 383 the global pointer for us. */ | |
| 384 reload_completed = 0; | |
| 385 } | |
| 386 | |
| 387 /* Copy VALUE to a register and return that register. If new psuedos | |
| 388 are allowed, copy it into a new register, otherwise use DEST. */ | |
| 389 static rtx | |
| 390 score7_force_temporary (rtx dest, rtx value) | |
| 391 { | |
| 392 if (can_create_pseudo_p ()) | |
| 393 return force_reg (Pmode, value); | |
| 394 else | |
| 395 { | |
| 396 emit_move_insn (copy_rtx (dest), value); | |
| 397 return dest; | |
| 398 } | |
| 399 } | |
| 400 | |
| 401 /* Return a LO_SUM expression for ADDR. TEMP is as for score_force_temporary | |
| 402 and is used to load the high part into a register. */ | |
| 403 static rtx | |
| 404 score7_split_symbol (rtx temp, rtx addr) | |
| 405 { | |
| 406 rtx high = score7_force_temporary (temp, | |
| 407 gen_rtx_HIGH (Pmode, copy_rtx (addr))); | |
| 408 return gen_rtx_LO_SUM (Pmode, high, addr); | |
| 409 } | |
| 410 | |
|
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411 /* This function is used to implement LEGITIMIZE_ADDRESS. If X can |
| 0 | 412 be legitimized in a way that the generic machinery might not expect, |
|
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413 return the new address. */ |
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414 rtx |
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415 score7_legitimize_address (rtx x) |
| 0 | 416 { |
| 417 enum score_symbol_type symbol_type; | |
| 418 | |
|
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419 if (score7_symbolic_constant_p (x, &symbol_type) |
| 0 | 420 && symbol_type == SYMBOL_GENERAL) |
|
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421 return score7_split_symbol (0, x); |
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422 |
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423 if (GET_CODE (x) == PLUS |
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424 && GET_CODE (XEXP (x, 1)) == CONST_INT) |
| 0 | 425 { |
|
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426 rtx reg = XEXP (x, 0); |
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427 if (!score7_valid_base_register_p (reg, 0)) |
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428 reg = copy_to_mode_reg (Pmode, reg); |
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429 return score7_add_offset (reg, INTVAL (XEXP (x, 1))); |
| 0 | 430 } |
| 431 | |
|
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432 return x; |
| 0 | 433 } |
| 434 | |
| 435 /* Fill INFO with information about a single argument. CUM is the | |
| 436 cumulative state for earlier arguments. MODE is the mode of this | |
| 437 argument and TYPE is its type (if known). NAMED is true if this | |
| 438 is a named (fixed) argument rather than a variable one. */ | |
| 439 static void | |
| 440 score7_classify_arg (const CUMULATIVE_ARGS *cum, enum machine_mode mode, | |
|
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parents:
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441 const_tree type, bool named, struct score7_arg_info *info) |
| 0 | 442 { |
| 443 int even_reg_p; | |
| 444 unsigned int num_words, max_regs; | |
| 445 | |
| 446 even_reg_p = 0; | |
| 447 if (GET_MODE_CLASS (mode) == MODE_INT | |
| 448 || GET_MODE_CLASS (mode) == MODE_FLOAT) | |
| 449 even_reg_p = (GET_MODE_SIZE (mode) > UNITS_PER_WORD); | |
| 450 else | |
| 451 if (type != NULL_TREE && TYPE_ALIGN (type) > BITS_PER_WORD && named) | |
| 452 even_reg_p = 1; | |
| 453 | |
| 454 if (TARGET_MUST_PASS_IN_STACK (mode, type)) | |
| 455 info->reg_offset = ARG_REG_NUM; | |
| 456 else | |
| 457 { | |
| 458 info->reg_offset = cum->num_gprs; | |
| 459 if (even_reg_p) | |
| 460 info->reg_offset += info->reg_offset & 1; | |
| 461 } | |
| 462 | |
| 463 if (mode == BLKmode) | |
| 464 info->num_bytes = int_size_in_bytes (type); | |
| 465 else | |
| 466 info->num_bytes = GET_MODE_SIZE (mode); | |
| 467 | |
| 468 num_words = (info->num_bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD; | |
| 469 max_regs = ARG_REG_NUM - info->reg_offset; | |
| 470 | |
| 471 /* Partition the argument between registers and stack. */ | |
| 472 info->reg_words = MIN (num_words, max_regs); | |
| 473 info->stack_words = num_words - info->reg_words; | |
| 474 | |
| 475 /* The alignment applied to registers is also applied to stack arguments. */ | |
| 476 if (info->stack_words) | |
| 477 { | |
| 478 info->stack_offset = cum->stack_words; | |
| 479 if (even_reg_p) | |
| 480 info->stack_offset += info->stack_offset & 1; | |
| 481 } | |
| 482 } | |
| 483 | |
| 484 /* Set up the stack and frame (if desired) for the function. */ | |
| 485 void | |
| 486 score7_function_prologue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED) | |
| 487 { | |
| 488 const char *fnname; | |
| 489 struct score7_frame_info *f = score7_cached_frame (); | |
| 490 HOST_WIDE_INT tsize = f->total_size; | |
| 491 | |
| 492 fnname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0); | |
| 493 if (!flag_inhibit_size_directive) | |
| 494 { | |
| 495 fputs ("\t.ent\t", file); | |
| 496 assemble_name (file, fnname); | |
| 497 fputs ("\n", file); | |
| 498 } | |
| 499 assemble_name (file, fnname); | |
| 500 fputs (":\n", file); | |
| 501 | |
| 502 if (!flag_inhibit_size_directive) | |
| 503 { | |
| 504 fprintf (file, | |
| 505 "\t.frame\t%s," HOST_WIDE_INT_PRINT_DEC ",%s, %d\t\t" | |
| 506 "# vars= " HOST_WIDE_INT_PRINT_DEC ", regs= %d" | |
| 507 ", args= " HOST_WIDE_INT_PRINT_DEC | |
| 508 ", gp= " HOST_WIDE_INT_PRINT_DEC "\n", | |
| 509 (reg_names[(frame_pointer_needed) | |
| 510 ? HARD_FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM]), | |
| 511 tsize, | |
| 512 reg_names[RA_REGNUM], | |
| 513 current_function_is_leaf ? 1 : 0, | |
| 514 f->var_size, | |
| 515 f->num_gp, | |
| 516 f->args_size, | |
| 517 f->cprestore_size); | |
| 518 | |
| 519 fprintf(file, "\t.mask\t0x%08x," HOST_WIDE_INT_PRINT_DEC "\n", | |
| 520 f->mask, | |
| 521 (f->gp_sp_offset - f->total_size)); | |
| 522 } | |
| 523 } | |
| 524 | |
| 525 /* Do any necessary cleanup after a function to restore stack, frame, | |
| 526 and regs. */ | |
| 527 void | |
| 528 score7_function_epilogue (FILE *file, | |
| 529 HOST_WIDE_INT size ATTRIBUTE_UNUSED) | |
| 530 { | |
| 531 if (!flag_inhibit_size_directive) | |
| 532 { | |
| 533 const char *fnname; | |
| 534 fnname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0); | |
| 535 fputs ("\t.end\t", file); | |
| 536 assemble_name (file, fnname); | |
| 537 fputs ("\n", file); | |
| 538 } | |
| 539 } | |
| 540 | |
| 541 /* Returns true if X contains a SYMBOL_REF. */ | |
| 542 static bool | |
| 543 score7_symbolic_expression_p (rtx x) | |
| 544 { | |
| 545 if (GET_CODE (x) == SYMBOL_REF) | |
| 546 return true; | |
| 547 | |
| 548 if (GET_CODE (x) == CONST) | |
| 549 return score7_symbolic_expression_p (XEXP (x, 0)); | |
| 550 | |
| 551 if (UNARY_P (x)) | |
| 552 return score7_symbolic_expression_p (XEXP (x, 0)); | |
| 553 | |
| 554 if (ARITHMETIC_P (x)) | |
| 555 return (score7_symbolic_expression_p (XEXP (x, 0)) | |
| 556 || score7_symbolic_expression_p (XEXP (x, 1))); | |
| 557 | |
| 558 return false; | |
| 559 } | |
| 560 | |
| 561 /* Choose the section to use for the constant rtx expression X that has | |
| 562 mode MODE. */ | |
| 563 section * | |
| 564 score7_select_rtx_section (enum machine_mode mode, rtx x, | |
| 565 unsigned HOST_WIDE_INT align) | |
| 566 { | |
| 567 if (GET_MODE_SIZE (mode) <= SCORE7_SDATA_MAX) | |
| 568 return get_named_section (0, ".sdata", 0); | |
| 569 else if (flag_pic && score7_symbolic_expression_p (x)) | |
| 570 return get_named_section (0, ".data.rel.ro", 3); | |
| 571 else | |
| 572 return mergeable_constant_section (mode, align, 0); | |
| 573 } | |
| 574 | |
| 575 /* Implement TARGET_IN_SMALL_DATA_P. */ | |
| 576 bool | |
|
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577 score7_in_small_data_p (const_tree decl) |
| 0 | 578 { |
| 579 HOST_WIDE_INT size; | |
| 580 | |
| 581 if (TREE_CODE (decl) == STRING_CST | |
| 582 || TREE_CODE (decl) == FUNCTION_DECL) | |
| 583 return false; | |
| 584 | |
| 585 if (TREE_CODE (decl) == VAR_DECL && DECL_SECTION_NAME (decl) != 0) | |
| 586 { | |
| 587 const char *name; | |
| 588 name = TREE_STRING_POINTER (DECL_SECTION_NAME (decl)); | |
| 589 if (strcmp (name, ".sdata") != 0 | |
| 590 && strcmp (name, ".sbss") != 0) | |
| 591 return true; | |
| 592 if (!DECL_EXTERNAL (decl)) | |
| 593 return false; | |
| 594 } | |
| 595 size = int_size_in_bytes (TREE_TYPE (decl)); | |
| 596 return (size > 0 && size <= SCORE7_SDATA_MAX); | |
| 597 } | |
| 598 | |
| 599 /* Implement TARGET_ASM_FILE_START. */ | |
| 600 void | |
| 601 score7_asm_file_start (void) | |
| 602 { | |
| 603 default_file_start (); | |
| 604 fprintf (asm_out_file, ASM_COMMENT_START | |
| 605 "GCC for S+core %s \n", SCORE_GCC_VERSION); | |
| 606 | |
| 607 if (flag_pic) | |
| 608 fprintf (asm_out_file, "\t.set pic\n"); | |
| 609 } | |
| 610 | |
| 611 /* Implement TARGET_ASM_FILE_END. When using assembler macros, emit | |
| 612 .externs for any small-data variables that turned out to be external. */ | |
| 613 void | |
| 614 score7_asm_file_end (void) | |
| 615 { | |
| 616 tree name_tree; | |
| 617 struct extern_list *p; | |
| 618 if (extern_head) | |
| 619 { | |
| 620 fputs ("\n", asm_out_file); | |
| 621 for (p = extern_head; p != 0; p = p->next) | |
| 622 { | |
| 623 name_tree = get_identifier (p->name); | |
| 624 if (!TREE_ASM_WRITTEN (name_tree) | |
| 625 && TREE_SYMBOL_REFERENCED (name_tree)) | |
| 626 { | |
| 627 TREE_ASM_WRITTEN (name_tree) = 1; | |
| 628 fputs ("\t.extern\t", asm_out_file); | |
| 629 assemble_name (asm_out_file, p->name); | |
| 630 fprintf (asm_out_file, ", %d\n", p->size); | |
| 631 } | |
| 632 } | |
| 633 } | |
| 634 } | |
| 635 | |
|
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636 /* Implement TARGET_OPTION_OVERRIDE hook. */ |
| 0 | 637 void |
|
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638 score7_option_override (void) |
| 0 | 639 { |
| 640 flag_pic = false; | |
|
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641 score7_sdata_max = SCORE7_DEFAULT_SDATA_MAX; |
| 0 | 642 |
| 643 } | |
| 644 | |
| 645 /* Implement REGNO_REG_CLASS macro. */ | |
| 646 int | |
| 647 score7_reg_class (int regno) | |
| 648 { | |
| 649 int c; | |
| 650 gcc_assert (regno >= 0 && regno < FIRST_PSEUDO_REGISTER); | |
| 651 | |
| 652 if (regno == FRAME_POINTER_REGNUM | |
| 653 || regno == ARG_POINTER_REGNUM) | |
| 654 return ALL_REGS; | |
| 655 | |
| 656 for (c = 0; c < N_REG_CLASSES; c++) | |
| 657 if (TEST_HARD_REG_BIT (reg_class_contents[c], regno)) | |
| 658 return c; | |
| 659 | |
| 660 return NO_REGS; | |
| 661 } | |
| 662 | |
| 663 /* Implement PREFERRED_RELOAD_CLASS macro. */ | |
| 664 enum reg_class | |
| 665 score7_preferred_reload_class (rtx x ATTRIBUTE_UNUSED, enum reg_class rclass) | |
| 666 { | |
| 667 if (reg_class_subset_p (G16_REGS, rclass)) | |
| 668 return G16_REGS; | |
| 669 if (reg_class_subset_p (G32_REGS, rclass)) | |
| 670 return G32_REGS; | |
| 671 return rclass; | |
| 672 } | |
| 673 | |
| 674 /* Implement SECONDARY_INPUT_RELOAD_CLASS | |
| 675 and SECONDARY_OUTPUT_RELOAD_CLASS macro. */ | |
| 676 enum reg_class | |
| 677 score7_secondary_reload_class (enum reg_class rclass, | |
| 678 enum machine_mode mode ATTRIBUTE_UNUSED, | |
| 679 rtx x) | |
| 680 { | |
| 681 int regno = -1; | |
| 682 if (GET_CODE (x) == REG || GET_CODE(x) == SUBREG) | |
| 683 regno = true_regnum (x); | |
| 684 | |
| 685 if (!GR_REG_CLASS_P (rclass)) | |
| 686 return GP_REG_P (regno) ? NO_REGS : G32_REGS; | |
| 687 return NO_REGS; | |
| 688 } | |
| 689 | |
| 690 | |
| 691 /* Return truth value on whether or not a given hard register | |
| 692 can support a given mode. */ | |
| 693 int | |
| 694 score7_hard_regno_mode_ok (unsigned int regno, enum machine_mode mode) | |
| 695 { | |
| 696 int size = GET_MODE_SIZE (mode); | |
| 697 enum mode_class mclass = GET_MODE_CLASS (mode); | |
| 698 | |
| 699 if (mclass == MODE_CC) | |
| 700 return regno == CC_REGNUM; | |
| 701 else if (regno == FRAME_POINTER_REGNUM | |
| 702 || regno == ARG_POINTER_REGNUM) | |
| 703 return mclass == MODE_INT; | |
| 704 else if (GP_REG_P (regno)) | |
| 705 /* ((regno <= (GP_REG_LAST- HARD_REGNO_NREGS (dummy, mode)) + 1) */ | |
| 706 return !(regno & 1) || (size <= UNITS_PER_WORD); | |
| 707 else if (CE_REG_P (regno)) | |
| 708 return (mclass == MODE_INT | |
| 709 && ((size <= UNITS_PER_WORD) | |
| 710 || (regno == CE_REG_FIRST && size == 2 * UNITS_PER_WORD))); | |
| 711 else | |
| 712 return (mclass == MODE_INT) && (size <= UNITS_PER_WORD); | |
| 713 } | |
| 714 | |
| 715 /* Implement INITIAL_ELIMINATION_OFFSET. FROM is either the frame | |
| 716 pointer or argument pointer. TO is either the stack pointer or | |
| 717 hard frame pointer. */ | |
| 718 HOST_WIDE_INT | |
| 719 score7_initial_elimination_offset (int from, | |
| 720 int to ATTRIBUTE_UNUSED) | |
| 721 { | |
| 722 struct score7_frame_info *f = score7_compute_frame_size (get_frame_size ()); | |
| 723 switch (from) | |
| 724 { | |
| 725 case ARG_POINTER_REGNUM: | |
| 726 return f->total_size; | |
| 727 case FRAME_POINTER_REGNUM: | |
| 728 return 0; | |
| 729 default: | |
| 730 gcc_unreachable (); | |
| 731 } | |
| 732 } | |
| 733 | |
|
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734 /* Implement TARGET_FUNCTION_ARG_ADVANCE hook. */ |
| 0 | 735 void |
| 736 score7_function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode, | |
|
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737 const_tree type, bool named) |
| 0 | 738 { |
| 739 struct score7_arg_info info; | |
| 740 score7_classify_arg (cum, mode, type, named, &info); | |
| 741 cum->num_gprs = info.reg_offset + info.reg_words; | |
| 742 if (info.stack_words > 0) | |
| 743 cum->stack_words = info.stack_offset + info.stack_words; | |
| 744 cum->arg_number++; | |
| 745 } | |
| 746 | |
| 747 /* Implement TARGET_ARG_PARTIAL_BYTES macro. */ | |
| 748 int | |
| 749 score7_arg_partial_bytes (CUMULATIVE_ARGS *cum, | |
| 750 enum machine_mode mode, tree type, bool named) | |
| 751 { | |
| 752 struct score7_arg_info info; | |
| 753 score7_classify_arg (cum, mode, type, named, &info); | |
| 754 return info.stack_words > 0 ? info.reg_words * UNITS_PER_WORD : 0; | |
| 755 } | |
| 756 | |
|
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757 /* Implement TARGET_FUNCTION_ARG hook. */ |
| 0 | 758 rtx |
| 759 score7_function_arg (const CUMULATIVE_ARGS *cum, enum machine_mode mode, | |
|
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760 const_tree type, bool named) |
| 0 | 761 { |
| 762 struct score7_arg_info info; | |
| 763 | |
| 764 if (mode == VOIDmode || !named) | |
| 765 return 0; | |
| 766 | |
| 767 score7_classify_arg (cum, mode, type, named, &info); | |
| 768 | |
| 769 if (info.reg_offset == ARG_REG_NUM) | |
| 770 return 0; | |
| 771 | |
| 772 if (!info.stack_words) | |
| 773 return gen_rtx_REG (mode, ARG_REG_FIRST + info.reg_offset); | |
| 774 else | |
| 775 { | |
| 776 rtx ret = gen_rtx_PARALLEL (mode, rtvec_alloc (info.reg_words)); | |
| 777 unsigned int i, part_offset = 0; | |
| 778 for (i = 0; i < info.reg_words; i++) | |
| 779 { | |
| 780 rtx reg; | |
| 781 reg = gen_rtx_REG (SImode, ARG_REG_FIRST + info.reg_offset + i); | |
| 782 XVECEXP (ret, 0, i) = gen_rtx_EXPR_LIST (SImode, reg, | |
| 783 GEN_INT (part_offset)); | |
| 784 part_offset += UNITS_PER_WORD; | |
| 785 } | |
| 786 return ret; | |
| 787 } | |
| 788 } | |
| 789 | |
| 790 /* Implement FUNCTION_VALUE and LIBCALL_VALUE. For normal calls, | |
| 791 VALTYPE is the return type and MODE is VOIDmode. For libcalls, | |
| 792 VALTYPE is null and MODE is the mode of the return value. */ | |
| 793 rtx | |
|
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794 score7_function_value (const_tree valtype, const_tree func, |
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795 enum machine_mode mode) |
| 0 | 796 { |
| 797 if (valtype) | |
| 798 { | |
| 799 int unsignedp; | |
| 800 mode = TYPE_MODE (valtype); | |
| 801 unsignedp = TYPE_UNSIGNED (valtype); | |
|
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802 mode = promote_function_mode (valtype, mode, &unsignedp, func, 1); |
| 0 | 803 } |
| 804 return gen_rtx_REG (mode, RT_REGNUM); | |
| 805 } | |
| 806 | |
|
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807 /* Implement TARGET_ASM_TRAMPOLINE_TEMPLATE. */ |
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808 |
| 0 | 809 void |
|
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810 score7_asm_trampoline_template (FILE *f) |
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811 { |
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812 fprintf (f, "\t.set r1\n"); |
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813 fprintf (f, "\tmv r31, r3\n"); |
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814 fprintf (f, "\tbl nextinsn\n"); |
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815 fprintf (f, "nextinsn:\n"); |
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816 fprintf (f, "\tlw r1, [r3, 6*4-8]\n"); |
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817 fprintf (f, "\tlw r23, [r3, 6*4-4]\n"); |
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818 fprintf (f, "\tmv r3, r31\n"); |
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819 fprintf (f, "\tbr! r1\n"); |
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820 fprintf (f, "\tnop!\n"); |
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821 fprintf (f, "\t.set nor1\n"); |
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822 } |
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823 |
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824 /* Implement TARGET_TRAMPOLINE_INIT. */ |
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825 void |
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826 score7_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) |
| 0 | 827 { |
| 828 #define CODE_SIZE (TRAMPOLINE_INSNS * UNITS_PER_WORD) | |
| 829 | |
|
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830 rtx fnaddr = XEXP (DECL_RTL (fndecl), 0); |
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831 rtx addr = XEXP (m_tramp, 0); |
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832 rtx mem; |
| 0 | 833 |
|
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834 emit_block_move (m_tramp, assemble_trampoline_template (), |
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835 GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL); |
| 0 | 836 |
|
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837 mem = adjust_address (m_tramp, SImode, CODE_SIZE); |
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838 emit_move_insn (mem, fnaddr); |
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839 mem = adjust_address (m_tramp, SImode, CODE_SIZE + GET_MODE_SIZE (SImode)); |
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840 emit_move_insn (mem, chain_value); |
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841 |
| 0 | 842 #undef CODE_SIZE |
| 843 } | |
| 844 | |
| 845 /* This function is used to implement REG_MODE_OK_FOR_BASE_P macro. */ | |
| 846 int | |
| 847 score7_regno_mode_ok_for_base_p (int regno, int strict) | |
| 848 { | |
| 849 if (regno >= FIRST_PSEUDO_REGISTER) | |
| 850 { | |
| 851 if (!strict) | |
| 852 return 1; | |
| 853 regno = reg_renumber[regno]; | |
| 854 } | |
| 855 if (regno == ARG_POINTER_REGNUM | |
| 856 || regno == FRAME_POINTER_REGNUM) | |
| 857 return 1; | |
| 858 return GP_REG_P (regno); | |
| 859 } | |
| 860 | |
|
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861 /* Implement TARGET_LEGITIMATE_ADDRESS_P macro. */ |
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862 bool |
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863 score7_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) |
| 0 | 864 { |
| 865 struct score7_address_info addr; | |
| 866 | |
| 867 return score7_classify_address (&addr, mode, x, strict); | |
| 868 } | |
| 869 | |
| 870 /* Return a number assessing the cost of moving a register in class | |
| 871 FROM to class TO. */ | |
| 872 int | |
| 873 score7_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, | |
| 874 enum reg_class from, enum reg_class to) | |
| 875 { | |
| 876 if (GR_REG_CLASS_P (from)) | |
| 877 { | |
| 878 if (GR_REG_CLASS_P (to)) | |
| 879 return 2; | |
| 880 else if (SP_REG_CLASS_P (to)) | |
| 881 return 4; | |
| 882 else if (CP_REG_CLASS_P (to)) | |
| 883 return 5; | |
| 884 else if (CE_REG_CLASS_P (to)) | |
| 885 return 6; | |
| 886 } | |
| 887 if (GR_REG_CLASS_P (to)) | |
| 888 { | |
| 889 if (GR_REG_CLASS_P (from)) | |
| 890 return 2; | |
| 891 else if (SP_REG_CLASS_P (from)) | |
| 892 return 4; | |
| 893 else if (CP_REG_CLASS_P (from)) | |
| 894 return 5; | |
| 895 else if (CE_REG_CLASS_P (from)) | |
| 896 return 6; | |
| 897 } | |
| 898 return 12; | |
| 899 } | |
| 900 | |
| 901 /* Return the number of instructions needed to load a symbol of the | |
| 902 given type into a register. */ | |
| 903 static int | |
| 904 score7_symbol_insns (enum score_symbol_type type) | |
| 905 { | |
| 906 switch (type) | |
| 907 { | |
| 908 case SYMBOL_GENERAL: | |
| 909 return 2; | |
| 910 | |
| 911 case SYMBOL_SMALL_DATA: | |
| 912 return 1; | |
| 913 } | |
| 914 | |
| 915 gcc_unreachable (); | |
| 916 } | |
| 917 | |
| 918 /* Return the number of instructions needed to load or store a value | |
| 919 of mode MODE at X. Return 0 if X isn't valid for MODE. */ | |
| 920 static int | |
| 921 score7_address_insns (rtx x, enum machine_mode mode) | |
| 922 { | |
| 923 struct score7_address_info addr; | |
| 924 int factor; | |
| 925 | |
| 926 if (mode == BLKmode) | |
| 927 factor = 1; | |
| 928 else | |
| 929 factor = (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD; | |
| 930 | |
| 931 if (score7_classify_address (&addr, mode, x, false)) | |
| 932 switch (addr.type) | |
| 933 { | |
| 934 case SCORE7_ADD_REG: | |
| 935 case SCORE7_ADD_CONST_INT: | |
| 936 return factor; | |
| 937 | |
| 938 case SCORE7_ADD_SYMBOLIC: | |
| 939 return factor * score7_symbol_insns (addr.symbol_type); | |
| 940 } | |
| 941 return 0; | |
| 942 } | |
| 943 | |
| 944 /* Implement TARGET_RTX_COSTS macro. */ | |
| 945 bool | |
| 946 score7_rtx_costs (rtx x, int code, int outer_code, int *total, | |
| 947 bool speed ATTRIBUTE_UNUSED) | |
| 948 { | |
| 949 enum machine_mode mode = GET_MODE (x); | |
| 950 | |
| 951 switch (code) | |
| 952 { | |
| 953 case CONST_INT: | |
| 954 if (outer_code == SET) | |
| 955 { | |
|
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956 if (((INTVAL (x) & 0xffff) == 0) |
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957 || (INTVAL (x) >= -32768 && INTVAL (x) <= 32767)) |
| 0 | 958 *total = COSTS_N_INSNS (1); |
| 959 else | |
| 960 *total = COSTS_N_INSNS (2); | |
| 961 } | |
| 962 else if (outer_code == PLUS || outer_code == MINUS) | |
| 963 { | |
|
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964 if (INTVAL (x) >= -8192 && INTVAL (x) <= 8191) |
| 0 | 965 *total = 0; |
|
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966 else if (((INTVAL (x) & 0xffff) == 0) |
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967 || (INTVAL (x) >= -32768 && INTVAL (x) <= 32767)) |
| 0 | 968 *total = 1; |
| 969 else | |
| 970 *total = COSTS_N_INSNS (2); | |
| 971 } | |
| 972 else if (outer_code == AND || outer_code == IOR) | |
| 973 { | |
|
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974 if (INTVAL (x) >= 0 && INTVAL (x) <= 16383) |
| 0 | 975 *total = 0; |
|
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976 else if (((INTVAL (x) & 0xffff) == 0) |
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977 || (INTVAL (x) >= 0 && INTVAL (x) <= 65535)) |
| 0 | 978 *total = 1; |
| 979 else | |
| 980 *total = COSTS_N_INSNS (2); | |
| 981 } | |
| 982 else | |
| 983 { | |
| 984 *total = 0; | |
| 985 } | |
| 986 return true; | |
| 987 | |
| 988 case CONST: | |
| 989 case SYMBOL_REF: | |
| 990 case LABEL_REF: | |
| 991 case CONST_DOUBLE: | |
| 992 *total = COSTS_N_INSNS (2); | |
| 993 return true; | |
| 994 | |
| 995 case MEM: | |
| 996 { | |
| 997 /* If the address is legitimate, return the number of | |
| 998 instructions it needs, otherwise use the default handling. */ | |
| 999 int n = score7_address_insns (XEXP (x, 0), GET_MODE (x)); | |
| 1000 if (n > 0) | |
| 1001 { | |
| 1002 *total = COSTS_N_INSNS (n + 1); | |
| 1003 return true; | |
| 1004 } | |
| 1005 return false; | |
| 1006 } | |
| 1007 | |
| 1008 case FFS: | |
| 1009 *total = COSTS_N_INSNS (6); | |
| 1010 return true; | |
| 1011 | |
| 1012 case NOT: | |
| 1013 *total = COSTS_N_INSNS (1); | |
| 1014 return true; | |
| 1015 | |
| 1016 case AND: | |
| 1017 case IOR: | |
| 1018 case XOR: | |
| 1019 if (mode == DImode) | |
| 1020 { | |
| 1021 *total = COSTS_N_INSNS (2); | |
| 1022 return true; | |
| 1023 } | |
| 1024 return false; | |
| 1025 | |
| 1026 case ASHIFT: | |
| 1027 case ASHIFTRT: | |
| 1028 case LSHIFTRT: | |
| 1029 if (mode == DImode) | |
| 1030 { | |
| 1031 *total = COSTS_N_INSNS ((GET_CODE (XEXP (x, 1)) == CONST_INT) | |
| 1032 ? 4 : 12); | |
| 1033 return true; | |
| 1034 } | |
| 1035 return false; | |
| 1036 | |
| 1037 case ABS: | |
| 1038 *total = COSTS_N_INSNS (4); | |
| 1039 return true; | |
| 1040 | |
| 1041 case PLUS: | |
| 1042 case MINUS: | |
| 1043 if (mode == DImode) | |
| 1044 { | |
| 1045 *total = COSTS_N_INSNS (4); | |
| 1046 return true; | |
| 1047 } | |
| 1048 *total = COSTS_N_INSNS (1); | |
| 1049 return true; | |
| 1050 | |
| 1051 case NEG: | |
| 1052 if (mode == DImode) | |
| 1053 { | |
| 1054 *total = COSTS_N_INSNS (4); | |
| 1055 return true; | |
| 1056 } | |
| 1057 return false; | |
| 1058 | |
| 1059 case MULT: | |
| 1060 *total = optimize_size ? COSTS_N_INSNS (2) : COSTS_N_INSNS (12); | |
| 1061 return true; | |
| 1062 | |
| 1063 case DIV: | |
| 1064 case MOD: | |
| 1065 case UDIV: | |
| 1066 case UMOD: | |
| 1067 *total = optimize_size ? COSTS_N_INSNS (2) : COSTS_N_INSNS (33); | |
| 1068 return true; | |
| 1069 | |
| 1070 case SIGN_EXTEND: | |
| 1071 case ZERO_EXTEND: | |
| 1072 switch (GET_MODE (XEXP (x, 0))) | |
| 1073 { | |
| 1074 case QImode: | |
| 1075 case HImode: | |
| 1076 if (GET_CODE (XEXP (x, 0)) == MEM) | |
| 1077 { | |
| 1078 *total = COSTS_N_INSNS (2); | |
| 1079 | |
| 1080 if (!TARGET_LITTLE_ENDIAN && | |
| 1081 side_effects_p (XEXP (XEXP (x, 0), 0))) | |
| 1082 *total = 100; | |
| 1083 } | |
| 1084 else | |
| 1085 *total = COSTS_N_INSNS (1); | |
| 1086 break; | |
| 1087 | |
| 1088 default: | |
| 1089 *total = COSTS_N_INSNS (1); | |
| 1090 break; | |
| 1091 } | |
| 1092 return true; | |
| 1093 | |
| 1094 default: | |
| 1095 return false; | |
| 1096 } | |
| 1097 } | |
| 1098 | |
| 1099 /* Implement TARGET_ADDRESS_COST macro. */ | |
| 1100 int | |
| 1101 score7_address_cost (rtx addr) | |
| 1102 { | |
| 1103 return score7_address_insns (addr, SImode); | |
| 1104 } | |
| 1105 | |
| 1106 /* Implement ASM_OUTPUT_EXTERNAL macro. */ | |
| 1107 int | |
| 1108 score7_output_external (FILE *file ATTRIBUTE_UNUSED, | |
| 1109 tree decl, const char *name) | |
| 1110 { | |
| 1111 register struct extern_list *p; | |
| 1112 | |
| 1113 if (score7_in_small_data_p (decl)) | |
| 1114 { | |
|
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|
1115 p = ggc_alloc_extern_list (); |
| 0 | 1116 p->next = extern_head; |
| 1117 p->name = name; | |
| 1118 p->size = int_size_in_bytes (TREE_TYPE (decl)); | |
| 1119 extern_head = p; | |
| 1120 } | |
| 1121 return 0; | |
| 1122 } | |
| 1123 | |
| 1124 /* Implement RETURN_ADDR_RTX. Note, we do not support moving | |
| 1125 back to a previous frame. */ | |
| 1126 rtx | |
| 1127 score7_return_addr (int count, rtx frame ATTRIBUTE_UNUSED) | |
| 1128 { | |
| 1129 if (count != 0) | |
| 1130 return const0_rtx; | |
| 1131 return get_hard_reg_initial_val (Pmode, RA_REGNUM); | |
| 1132 } | |
| 1133 | |
| 1134 /* Implement PRINT_OPERAND macro. */ | |
| 1135 /* Score-specific operand codes: | |
| 1136 '[' print .set nor1 directive | |
| 1137 ']' print .set r1 directive | |
| 1138 'U' print hi part of a CONST_INT rtx | |
| 1139 'E' print log2(v) | |
| 1140 'F' print log2(~v) | |
| 1141 'D' print SFmode const double | |
| 1142 'S' selectively print "!" if operand is 15bit instruction accessible | |
| 1143 'V' print "v!" if operand is 15bit instruction accessible, or "lfh!" | |
| 1144 'L' low part of DImode reg operand | |
| 1145 'H' high part of DImode reg operand | |
| 1146 'C' print part of opcode for a branch condition. */ | |
| 1147 void | |
| 1148 score7_print_operand (FILE *file, rtx op, int c) | |
| 1149 { | |
|
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|
1150 enum rtx_code code = UNKNOWN; |
| 0 | 1151 if (!PRINT_OPERAND_PUNCT_VALID_P (c)) |
| 1152 code = GET_CODE (op); | |
| 1153 | |
| 1154 if (c == '[') | |
| 1155 { | |
| 1156 fprintf (file, ".set r1\n"); | |
| 1157 } | |
| 1158 else if (c == ']') | |
| 1159 { | |
| 1160 fprintf (file, "\n\t.set nor1"); | |
| 1161 } | |
| 1162 else if (c == 'U') | |
| 1163 { | |
| 1164 gcc_assert (code == CONST_INT); | |
| 1165 fprintf (file, HOST_WIDE_INT_PRINT_HEX, | |
| 1166 (INTVAL (op) >> 16) & 0xffff); | |
| 1167 } | |
| 1168 else if (c == 'D') | |
| 1169 { | |
| 1170 if (GET_CODE (op) == CONST_DOUBLE) | |
| 1171 { | |
| 1172 rtx temp = gen_lowpart (SImode, op); | |
| 1173 gcc_assert (GET_MODE (op) == SFmode); | |
| 1174 fprintf (file, HOST_WIDE_INT_PRINT_HEX, INTVAL (temp) & 0xffffffff); | |
| 1175 } | |
| 1176 else | |
| 1177 output_addr_const (file, op); | |
| 1178 } | |
| 1179 else if (c == 'S') | |
| 1180 { | |
| 1181 gcc_assert (code == REG); | |
| 1182 if (G16_REG_P (REGNO (op))) | |
| 1183 fprintf (file, "!"); | |
| 1184 } | |
| 1185 else if (c == 'V') | |
| 1186 { | |
| 1187 gcc_assert (code == REG); | |
| 1188 fprintf (file, G16_REG_P (REGNO (op)) ? "v!" : "lfh!"); | |
| 1189 } | |
| 1190 else if (c == 'C') | |
| 1191 { | |
| 1192 enum machine_mode mode = GET_MODE (XEXP (op, 0)); | |
| 1193 | |
| 1194 switch (code) | |
| 1195 { | |
| 1196 case EQ: fputs ("eq", file); break; | |
| 1197 case NE: fputs ("ne", file); break; | |
| 1198 case GT: fputs ("gt", file); break; | |
| 1199 case GE: fputs (mode != CCmode ? "pl" : "ge", file); break; | |
| 1200 case LT: fputs (mode != CCmode ? "mi" : "lt", file); break; | |
| 1201 case LE: fputs ("le", file); break; | |
| 1202 case GTU: fputs ("gtu", file); break; | |
| 1203 case GEU: fputs ("cs", file); break; | |
| 1204 case LTU: fputs ("cc", file); break; | |
| 1205 case LEU: fputs ("leu", file); break; | |
| 1206 default: | |
| 1207 output_operand_lossage ("invalid operand for code: '%c'", code); | |
| 1208 } | |
| 1209 } | |
| 1210 else if (c == 'E') | |
| 1211 { | |
| 1212 unsigned HOST_WIDE_INT i; | |
| 1213 unsigned HOST_WIDE_INT pow2mask = 1; | |
| 1214 unsigned HOST_WIDE_INT val; | |
| 1215 | |
| 1216 val = INTVAL (op); | |
| 1217 for (i = 0; i < 32; i++) | |
| 1218 { | |
| 1219 if (val == pow2mask) | |
| 1220 break; | |
| 1221 pow2mask <<= 1; | |
| 1222 } | |
| 1223 gcc_assert (i < 32); | |
| 1224 fprintf (file, HOST_WIDE_INT_PRINT_HEX, i); | |
| 1225 } | |
| 1226 else if (c == 'F') | |
| 1227 { | |
| 1228 unsigned HOST_WIDE_INT i; | |
| 1229 unsigned HOST_WIDE_INT pow2mask = 1; | |
| 1230 unsigned HOST_WIDE_INT val; | |
| 1231 | |
| 1232 val = ~INTVAL (op); | |
| 1233 for (i = 0; i < 32; i++) | |
| 1234 { | |
| 1235 if (val == pow2mask) | |
| 1236 break; | |
| 1237 pow2mask <<= 1; | |
| 1238 } | |
| 1239 gcc_assert (i < 32); | |
| 1240 fprintf (file, HOST_WIDE_INT_PRINT_HEX, i); | |
| 1241 } | |
| 1242 else if (code == REG) | |
| 1243 { | |
| 1244 int regnum = REGNO (op); | |
| 1245 if ((c == 'H' && !WORDS_BIG_ENDIAN) | |
| 1246 || (c == 'L' && WORDS_BIG_ENDIAN)) | |
| 1247 regnum ++; | |
| 1248 fprintf (file, "%s", reg_names[regnum]); | |
| 1249 } | |
| 1250 else | |
| 1251 { | |
| 1252 switch (code) | |
| 1253 { | |
| 1254 case MEM: | |
| 1255 score7_print_operand_address (file, op); | |
| 1256 break; | |
| 1257 default: | |
| 1258 output_addr_const (file, op); | |
| 1259 } | |
| 1260 } | |
| 1261 } | |
| 1262 | |
| 1263 /* Implement PRINT_OPERAND_ADDRESS macro. */ | |
| 1264 void | |
| 1265 score7_print_operand_address (FILE *file, rtx x) | |
| 1266 { | |
| 1267 struct score7_address_info addr; | |
| 1268 enum rtx_code code = GET_CODE (x); | |
| 1269 enum machine_mode mode = GET_MODE (x); | |
| 1270 | |
| 1271 if (code == MEM) | |
| 1272 x = XEXP (x, 0); | |
| 1273 | |
| 1274 if (score7_classify_address (&addr, mode, x, true)) | |
| 1275 { | |
| 1276 switch (addr.type) | |
| 1277 { | |
| 1278 case SCORE7_ADD_REG: | |
| 1279 { | |
| 1280 switch (addr.code) | |
| 1281 { | |
| 1282 case PRE_DEC: | |
| 1283 fprintf (file, "[%s,-%ld]+", reg_names[REGNO (addr.reg)], | |
| 1284 INTVAL (addr.offset)); | |
| 1285 break; | |
| 1286 case POST_DEC: | |
| 1287 fprintf (file, "[%s]+,-%ld", reg_names[REGNO (addr.reg)], | |
| 1288 INTVAL (addr.offset)); | |
| 1289 break; | |
| 1290 case PRE_INC: | |
| 1291 fprintf (file, "[%s, %ld]+", reg_names[REGNO (addr.reg)], | |
| 1292 INTVAL (addr.offset)); | |
| 1293 break; | |
| 1294 case POST_INC: | |
| 1295 fprintf (file, "[%s]+, %ld", reg_names[REGNO (addr.reg)], | |
| 1296 INTVAL (addr.offset)); | |
| 1297 break; | |
| 1298 default: | |
| 1299 if (INTVAL(addr.offset) == 0) | |
| 1300 fprintf(file, "[%s]", reg_names[REGNO (addr.reg)]); | |
| 1301 else | |
| 1302 fprintf(file, "[%s, %ld]", reg_names[REGNO (addr.reg)], | |
| 1303 INTVAL(addr.offset)); | |
| 1304 break; | |
| 1305 } | |
| 1306 } | |
| 1307 return; | |
| 1308 case SCORE7_ADD_CONST_INT: | |
| 1309 case SCORE7_ADD_SYMBOLIC: | |
| 1310 output_addr_const (file, x); | |
| 1311 return; | |
| 1312 } | |
| 1313 } | |
| 1314 print_rtl (stderr, x); | |
| 1315 gcc_unreachable (); | |
| 1316 } | |
| 1317 | |
| 1318 /* Implement SELECT_CC_MODE macro. */ | |
| 1319 enum machine_mode | |
| 1320 score7_select_cc_mode (enum rtx_code op, rtx x, rtx y) | |
| 1321 { | |
| 1322 if ((op == EQ || op == NE || op == LT || op == GE) | |
| 1323 && y == const0_rtx | |
| 1324 && GET_MODE (x) == SImode) | |
| 1325 { | |
| 1326 switch (GET_CODE (x)) | |
| 1327 { | |
| 1328 case PLUS: | |
| 1329 case MINUS: | |
| 1330 case NEG: | |
| 1331 case AND: | |
| 1332 case IOR: | |
| 1333 case XOR: | |
| 1334 case NOT: | |
| 1335 case ASHIFT: | |
| 1336 case LSHIFTRT: | |
| 1337 case ASHIFTRT: | |
| 1338 return CC_NZmode; | |
| 1339 | |
| 1340 case SIGN_EXTEND: | |
| 1341 case ZERO_EXTEND: | |
| 1342 case ROTATE: | |
| 1343 case ROTATERT: | |
| 1344 return (op == LT || op == GE) ? CC_Nmode : CCmode; | |
| 1345 | |
| 1346 default: | |
| 1347 return CCmode; | |
| 1348 } | |
| 1349 } | |
| 1350 | |
| 1351 if ((op == EQ || op == NE) | |
| 1352 && (GET_CODE (y) == NEG) | |
| 1353 && register_operand (XEXP (y, 0), SImode) | |
| 1354 && register_operand (x, SImode)) | |
| 1355 { | |
| 1356 return CC_NZmode; | |
| 1357 } | |
| 1358 | |
| 1359 return CCmode; | |
| 1360 } | |
| 1361 | |
| 1362 /* Generate the prologue instructions for entry into a S+core function. */ | |
| 1363 void | |
| 1364 score7_prologue (void) | |
| 1365 { | |
| 1366 #define EMIT_PL(_rtx) RTX_FRAME_RELATED_P (_rtx) = 1 | |
| 1367 | |
| 1368 struct score7_frame_info *f = score7_compute_frame_size (get_frame_size ()); | |
| 1369 HOST_WIDE_INT size; | |
| 1370 int regno; | |
| 1371 | |
| 1372 size = f->total_size - f->gp_reg_size; | |
| 1373 | |
| 1374 if (flag_pic) | |
| 1375 emit_insn (gen_cpload_score7 ()); | |
| 1376 | |
| 1377 for (regno = (int) GP_REG_LAST; regno >= (int) GP_REG_FIRST; regno--) | |
| 1378 { | |
| 1379 if (BITSET_P (f->mask, regno - GP_REG_FIRST)) | |
| 1380 { | |
| 1381 rtx mem = gen_rtx_MEM (SImode, | |
| 1382 gen_rtx_PRE_DEC (SImode, stack_pointer_rtx)); | |
| 1383 rtx reg = gen_rtx_REG (SImode, regno); | |
| 1384 if (!crtl->calls_eh_return) | |
| 1385 MEM_READONLY_P (mem) = 1; | |
| 1386 EMIT_PL (emit_insn (gen_pushsi_score7 (mem, reg))); | |
| 1387 } | |
| 1388 } | |
| 1389 | |
| 1390 if (size > 0) | |
| 1391 { | |
| 1392 rtx insn; | |
| 1393 | |
|
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1394 if (size >= -32768 && size <= 32767) |
| 0 | 1395 EMIT_PL (emit_insn (gen_add3_insn (stack_pointer_rtx, |
| 1396 stack_pointer_rtx, | |
| 1397 GEN_INT (-size)))); | |
| 1398 else | |
| 1399 { | |
| 1400 EMIT_PL (emit_move_insn (gen_rtx_REG (Pmode, SCORE7_PROLOGUE_TEMP_REGNUM), | |
| 1401 GEN_INT (size))); | |
| 1402 EMIT_PL (emit_insn | |
| 1403 (gen_sub3_insn (stack_pointer_rtx, | |
| 1404 stack_pointer_rtx, | |
| 1405 gen_rtx_REG (Pmode, | |
| 1406 SCORE7_PROLOGUE_TEMP_REGNUM)))); | |
| 1407 } | |
| 1408 insn = get_last_insn (); | |
| 1409 REG_NOTES (insn) = | |
| 1410 alloc_EXPR_LIST (REG_FRAME_RELATED_EXPR, | |
| 1411 gen_rtx_SET (VOIDmode, stack_pointer_rtx, | |
| 1412 plus_constant (stack_pointer_rtx, | |
| 1413 -size)), | |
| 1414 REG_NOTES (insn)); | |
| 1415 } | |
| 1416 | |
| 1417 if (frame_pointer_needed) | |
| 1418 EMIT_PL (emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx)); | |
| 1419 | |
| 1420 if (flag_pic && f->cprestore_size) | |
| 1421 { | |
| 1422 if (frame_pointer_needed) | |
| 1423 emit_insn (gen_cprestore_use_fp_score7 (GEN_INT (size - f->cprestore_size))); | |
| 1424 else | |
| 1425 emit_insn (gen_cprestore_use_sp_score7 (GEN_INT (size - f->cprestore_size))); | |
| 1426 } | |
| 1427 | |
| 1428 #undef EMIT_PL | |
| 1429 } | |
| 1430 | |
| 1431 /* Generate the epilogue instructions in a S+core function. */ | |
| 1432 void | |
| 1433 score7_epilogue (int sibcall_p) | |
| 1434 { | |
| 1435 struct score7_frame_info *f = score7_compute_frame_size (get_frame_size ()); | |
| 1436 HOST_WIDE_INT size; | |
| 1437 int regno; | |
| 1438 rtx base; | |
| 1439 | |
| 1440 size = f->total_size - f->gp_reg_size; | |
| 1441 | |
| 1442 if (!frame_pointer_needed) | |
| 1443 base = stack_pointer_rtx; | |
| 1444 else | |
| 1445 base = hard_frame_pointer_rtx; | |
| 1446 | |
| 1447 if (size) | |
| 1448 { | |
|
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|
1449 if (size >= -32768 && size <= 32767) |
| 0 | 1450 emit_insn (gen_add3_insn (base, base, GEN_INT (size))); |
| 1451 else | |
| 1452 { | |
| 1453 emit_move_insn (gen_rtx_REG (Pmode, SCORE7_EPILOGUE_TEMP_REGNUM), | |
| 1454 GEN_INT (size)); | |
| 1455 emit_insn (gen_add3_insn (base, base, | |
| 1456 gen_rtx_REG (Pmode, | |
| 1457 SCORE7_EPILOGUE_TEMP_REGNUM))); | |
| 1458 } | |
| 1459 } | |
| 1460 | |
| 1461 if (base != stack_pointer_rtx) | |
| 1462 emit_move_insn (stack_pointer_rtx, base); | |
| 1463 | |
| 1464 if (crtl->calls_eh_return) | |
| 1465 emit_insn (gen_add3_insn (stack_pointer_rtx, | |
| 1466 stack_pointer_rtx, | |
| 1467 EH_RETURN_STACKADJ_RTX)); | |
| 1468 | |
| 1469 for (regno = (int) GP_REG_FIRST; regno <= (int) GP_REG_LAST; regno++) | |
| 1470 { | |
| 1471 if (BITSET_P (f->mask, regno - GP_REG_FIRST)) | |
| 1472 { | |
| 1473 rtx mem = gen_rtx_MEM (SImode, | |
| 1474 gen_rtx_POST_INC (SImode, stack_pointer_rtx)); | |
| 1475 rtx reg = gen_rtx_REG (SImode, regno); | |
| 1476 | |
| 1477 if (!crtl->calls_eh_return) | |
| 1478 MEM_READONLY_P (mem) = 1; | |
| 1479 | |
| 1480 emit_insn (gen_popsi_score7 (reg, mem)); | |
| 1481 } | |
| 1482 } | |
| 1483 | |
| 1484 if (!sibcall_p) | |
| 1485 emit_jump_insn (gen_return_internal_score7 (gen_rtx_REG (Pmode, RA_REGNUM))); | |
| 1486 } | |
| 1487 | |
| 1488 /* Return true if X is a symbolic constant that can be calculated in | |
| 1489 the same way as a bare symbol. If it is, store the type of the | |
| 1490 symbol in *SYMBOL_TYPE. */ | |
| 1491 int | |
| 1492 score7_symbolic_constant_p (rtx x, enum score_symbol_type *symbol_type) | |
| 1493 { | |
| 1494 HOST_WIDE_INT offset; | |
| 1495 | |
| 1496 score7_split_const (x, &x, &offset); | |
| 1497 if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == LABEL_REF) | |
| 1498 *symbol_type = score7_classify_symbol (x); | |
| 1499 else | |
| 1500 return 0; | |
| 1501 | |
| 1502 if (offset == 0) | |
| 1503 return 1; | |
| 1504 | |
| 1505 /* if offset > 15bit, must reload */ | |
| 1506 if (!IMM_IN_RANGE (offset, 15, 1)) | |
| 1507 return 0; | |
| 1508 | |
| 1509 switch (*symbol_type) | |
| 1510 { | |
| 1511 case SYMBOL_GENERAL: | |
| 1512 return 1; | |
| 1513 case SYMBOL_SMALL_DATA: | |
| 1514 return score7_offset_within_object_p (x, offset); | |
| 1515 } | |
| 1516 gcc_unreachable (); | |
| 1517 } | |
| 1518 | |
| 1519 void | |
| 1520 score7_movsicc (rtx *ops) | |
| 1521 { | |
| 1522 enum machine_mode mode; | |
| 1523 | |
| 1524 mode = score7_select_cc_mode (GET_CODE (ops[1]), ops[2], ops[3]); | |
| 1525 emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_REG (mode, CC_REGNUM), | |
|
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1526 gen_rtx_COMPARE (mode, XEXP (ops[1], 0), |
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1527 XEXP (ops[1], 1)))); |
| 0 | 1528 } |
| 1529 | |
| 1530 /* Call and sibcall pattern all need call this function. */ | |
| 1531 void | |
| 1532 score7_call (rtx *ops, bool sib) | |
| 1533 { | |
| 1534 rtx addr = XEXP (ops[0], 0); | |
| 1535 if (!call_insn_operand (addr, VOIDmode)) | |
| 1536 { | |
| 1537 rtx oaddr = addr; | |
| 1538 addr = gen_reg_rtx (Pmode); | |
| 1539 gen_move_insn (addr, oaddr); | |
| 1540 } | |
| 1541 | |
| 1542 if (sib) | |
| 1543 emit_call_insn (gen_sibcall_internal_score7 (addr, ops[1])); | |
| 1544 else | |
| 1545 emit_call_insn (gen_call_internal_score7 (addr, ops[1])); | |
| 1546 } | |
| 1547 | |
| 1548 /* Call value and sibcall value pattern all need call this function. */ | |
| 1549 void | |
| 1550 score7_call_value (rtx *ops, bool sib) | |
| 1551 { | |
| 1552 rtx result = ops[0]; | |
| 1553 rtx addr = XEXP (ops[1], 0); | |
| 1554 rtx arg = ops[2]; | |
| 1555 | |
| 1556 if (!call_insn_operand (addr, VOIDmode)) | |
| 1557 { | |
| 1558 rtx oaddr = addr; | |
| 1559 addr = gen_reg_rtx (Pmode); | |
| 1560 gen_move_insn (addr, oaddr); | |
| 1561 } | |
| 1562 | |
| 1563 if (sib) | |
| 1564 emit_call_insn (gen_sibcall_value_internal_score7 (result, addr, arg)); | |
| 1565 else | |
| 1566 emit_call_insn (gen_call_value_internal_score7 (result, addr, arg)); | |
| 1567 } | |
| 1568 | |
| 1569 /* Machine Split */ | |
| 1570 void | |
| 1571 score7_movdi (rtx *ops) | |
| 1572 { | |
| 1573 rtx dst = ops[0]; | |
| 1574 rtx src = ops[1]; | |
| 1575 rtx dst0 = score7_subw (dst, 0); | |
| 1576 rtx dst1 = score7_subw (dst, 1); | |
| 1577 rtx src0 = score7_subw (src, 0); | |
| 1578 rtx src1 = score7_subw (src, 1); | |
| 1579 | |
| 1580 if (GET_CODE (dst0) == REG && reg_overlap_mentioned_p (dst0, src)) | |
| 1581 { | |
| 1582 emit_move_insn (dst1, src1); | |
| 1583 emit_move_insn (dst0, src0); | |
| 1584 } | |
| 1585 else | |
| 1586 { | |
| 1587 emit_move_insn (dst0, src0); | |
| 1588 emit_move_insn (dst1, src1); | |
| 1589 } | |
| 1590 } | |
| 1591 | |
| 1592 void | |
| 1593 score7_zero_extract_andi (rtx *ops) | |
| 1594 { | |
| 1595 if (INTVAL (ops[1]) == 1 && const_uimm5 (ops[2], SImode)) | |
| 1596 emit_insn (gen_zero_extract_bittst_score7 (ops[0], ops[2])); | |
| 1597 else | |
| 1598 { | |
| 1599 unsigned HOST_WIDE_INT mask; | |
| 1600 mask = (0xffffffffU & ((1U << INTVAL (ops[1])) - 1U)); | |
| 1601 mask = mask << INTVAL (ops[2]); | |
| 1602 emit_insn (gen_andsi3_cmp_score7 (ops[3], ops[0], | |
| 1603 gen_int_mode (mask, SImode))); | |
| 1604 } | |
| 1605 } | |
| 1606 | |
| 1607 /* Check addr could be present as PRE/POST mode. */ | |
| 1608 static bool | |
| 1609 score7_pindex_mem (rtx addr) | |
| 1610 { | |
| 1611 if (GET_CODE (addr) == MEM) | |
| 1612 { | |
| 1613 switch (GET_CODE (XEXP (addr, 0))) | |
| 1614 { | |
| 1615 case PRE_DEC: | |
| 1616 case POST_DEC: | |
| 1617 case PRE_INC: | |
| 1618 case POST_INC: | |
| 1619 return true; | |
| 1620 default: | |
| 1621 break; | |
| 1622 } | |
| 1623 } | |
| 1624 return false; | |
| 1625 } | |
| 1626 | |
| 1627 /* Output asm code for ld/sw insn. */ | |
| 1628 static int | |
| 1629 score7_pr_addr_post (rtx *ops, int idata, int iaddr, char *ip, enum score_mem_unit unit) | |
| 1630 { | |
| 1631 struct score7_address_info ai; | |
| 1632 | |
| 1633 gcc_assert (GET_CODE (ops[idata]) == REG); | |
| 1634 gcc_assert (score7_classify_address (&ai, SImode, XEXP (ops[iaddr], 0), true)); | |
| 1635 | |
| 1636 if (!score7_pindex_mem (ops[iaddr]) | |
| 1637 && ai.type == SCORE7_ADD_REG | |
| 1638 && GET_CODE (ai.offset) == CONST_INT | |
| 1639 && G16_REG_P (REGNO (ops[idata])) | |
| 1640 && G16_REG_P (REGNO (ai.reg))) | |
| 1641 { | |
| 1642 if (INTVAL (ai.offset) == 0) | |
| 1643 { | |
| 1644 ops[iaddr] = ai.reg; | |
| 1645 return snprintf (ip, INS_BUF_SZ, | |
| 1646 "!\t%%%d, [%%%d]", idata, iaddr); | |
| 1647 } | |
| 1648 if (REGNO (ai.reg) == HARD_FRAME_POINTER_REGNUM) | |
| 1649 { | |
| 1650 HOST_WIDE_INT offset = INTVAL (ai.offset); | |
| 1651 if (SCORE_ALIGN_UNIT (offset, unit) | |
|
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nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
1652 && (((offset >> unit) >= 0) && ((offset >> unit) <= 31))) |
| 0 | 1653 { |
| 1654 ops[iaddr] = ai.offset; | |
| 1655 return snprintf (ip, INS_BUF_SZ, | |
| 1656 "p!\t%%%d, %%c%d", idata, iaddr); | |
| 1657 } | |
| 1658 } | |
| 1659 } | |
| 1660 return snprintf (ip, INS_BUF_SZ, "\t%%%d, %%a%d", idata, iaddr); | |
| 1661 } | |
| 1662 | |
| 1663 /* Output asm insn for load. */ | |
| 1664 const char * | |
| 1665 score7_linsn (rtx *ops, enum score_mem_unit unit, bool sign) | |
| 1666 { | |
| 1667 const char *pre_ins[] = | |
| 1668 {"lbu", "lhu", "lw", "??", "lb", "lh", "lw", "??"}; | |
| 1669 char *ip; | |
| 1670 | |
| 1671 strcpy (score7_ins, pre_ins[(sign ? 4 : 0) + unit]); | |
| 1672 ip = score7_ins + strlen (score7_ins); | |
| 1673 | |
| 1674 if ((!sign && unit != SCORE_HWORD) | |
| 1675 || (sign && unit != SCORE_BYTE)) | |
| 1676 score7_pr_addr_post (ops, 0, 1, ip, unit); | |
| 1677 else | |
| 1678 snprintf (ip, INS_BUF_SZ, "\t%%0, %%a1"); | |
| 1679 | |
| 1680 return score7_ins; | |
| 1681 } | |
| 1682 | |
| 1683 /* Output asm insn for store. */ | |
| 1684 const char * | |
| 1685 score7_sinsn (rtx *ops, enum score_mem_unit unit) | |
| 1686 { | |
| 1687 const char *pre_ins[] = {"sb", "sh", "sw"}; | |
| 1688 char *ip; | |
| 1689 | |
| 1690 strcpy (score7_ins, pre_ins[unit]); | |
| 1691 ip = score7_ins + strlen (score7_ins); | |
| 1692 score7_pr_addr_post (ops, 1, 0, ip, unit); | |
| 1693 return score7_ins; | |
| 1694 } | |
| 1695 | |
| 1696 /* Output asm insn for load immediate. */ | |
| 1697 const char * | |
| 1698 score7_limm (rtx *ops) | |
| 1699 { | |
| 1700 HOST_WIDE_INT v; | |
| 1701 | |
| 1702 gcc_assert (GET_CODE (ops[0]) == REG); | |
| 1703 gcc_assert (GET_CODE (ops[1]) == CONST_INT); | |
| 1704 | |
| 1705 v = INTVAL (ops[1]); | |
| 1706 if (G16_REG_P (REGNO (ops[0])) && IMM_IN_RANGE (v, 8, 0)) | |
| 1707 return "ldiu!\t%0, %c1"; | |
| 1708 else if (IMM_IN_RANGE (v, 16, 1)) | |
| 1709 return "ldi\t%0, %c1"; | |
| 1710 else if ((v & 0xffff) == 0) | |
| 1711 return "ldis\t%0, %U1"; | |
| 1712 else | |
| 1713 return "li\t%0, %c1"; | |
| 1714 } | |
| 1715 | |
| 1716 /* Output asm insn for move. */ | |
| 1717 const char * | |
| 1718 score7_move (rtx *ops) | |
| 1719 { | |
| 1720 gcc_assert (GET_CODE (ops[0]) == REG); | |
| 1721 gcc_assert (GET_CODE (ops[1]) == REG); | |
| 1722 | |
| 1723 if (G16_REG_P (REGNO (ops[0]))) | |
| 1724 { | |
| 1725 if (G16_REG_P (REGNO (ops[1]))) | |
| 1726 return "mv!\t%0, %1"; | |
| 1727 else | |
| 1728 return "mlfh!\t%0, %1"; | |
| 1729 } | |
| 1730 else if (G16_REG_P (REGNO (ops[1]))) | |
| 1731 return "mhfl!\t%0, %1"; | |
| 1732 else | |
| 1733 return "mv\t%0, %1"; | |
| 1734 } | |
| 1735 | |
| 1736 /* Generate add insn. */ | |
| 1737 const char * | |
| 1738 score7_select_add_imm (rtx *ops, bool set_cc) | |
| 1739 { | |
| 1740 HOST_WIDE_INT v = INTVAL (ops[2]); | |
| 1741 | |
| 1742 gcc_assert (GET_CODE (ops[2]) == CONST_INT); | |
| 1743 gcc_assert (REGNO (ops[0]) == REGNO (ops[1])); | |
| 1744 | |
| 1745 if (set_cc && G16_REG_P (REGNO (ops[0]))) | |
| 1746 { | |
| 1747 if (v > 0 && IMM_IS_POW_OF_2 ((unsigned HOST_WIDE_INT) v, 0, 15)) | |
| 1748 { | |
| 1749 ops[2] = GEN_INT (ffs (v) - 1); | |
| 1750 return "addei!\t%0, %c2"; | |
| 1751 } | |
| 1752 | |
| 1753 if (v < 0 && IMM_IS_POW_OF_2 ((unsigned HOST_WIDE_INT) (-v), 0, 15)) | |
| 1754 { | |
| 1755 ops[2] = GEN_INT (ffs (-v) - 1); | |
| 1756 return "subei!\t%0, %c2"; | |
| 1757 } | |
| 1758 } | |
| 1759 | |
| 1760 if (set_cc) | |
| 1761 return "addi.c\t%0, %c2"; | |
| 1762 else | |
| 1763 return "addi\t%0, %c2"; | |
| 1764 } | |
| 1765 | |
| 1766 /* Output arith insn. */ | |
| 1767 const char * | |
| 1768 score7_select (rtx *ops, const char *inst_pre, | |
| 1769 bool commu, const char *letter, bool set_cc) | |
| 1770 { | |
| 1771 gcc_assert (GET_CODE (ops[0]) == REG); | |
| 1772 gcc_assert (GET_CODE (ops[1]) == REG); | |
| 1773 | |
| 1774 if (set_cc && G16_REG_P (REGNO (ops[0])) | |
| 1775 && (GET_CODE (ops[2]) == REG ? G16_REG_P (REGNO (ops[2])) : 1) | |
| 1776 && REGNO (ops[0]) == REGNO (ops[1])) | |
| 1777 { | |
| 1778 snprintf (score7_ins, INS_BUF_SZ, "%s!\t%%0, %%%s2", inst_pre, letter); | |
| 1779 return score7_ins; | |
| 1780 } | |
| 1781 | |
| 1782 if (commu && set_cc && G16_REG_P (REGNO (ops[0])) | |
| 1783 && G16_REG_P (REGNO (ops[1])) | |
| 1784 && REGNO (ops[0]) == REGNO (ops[2])) | |
| 1785 { | |
| 1786 gcc_assert (GET_CODE (ops[2]) == REG); | |
| 1787 snprintf (score7_ins, INS_BUF_SZ, "%s!\t%%0, %%%s1", inst_pre, letter); | |
| 1788 return score7_ins; | |
| 1789 } | |
| 1790 | |
| 1791 if (set_cc) | |
| 1792 snprintf (score7_ins, INS_BUF_SZ, "%s.c\t%%0, %%1, %%%s2", inst_pre, letter); | |
| 1793 else | |
| 1794 snprintf (score7_ins, INS_BUF_SZ, "%s\t%%0, %%1, %%%s2", inst_pre, letter); | |
| 1795 return score7_ins; | |
| 1796 } | |
| 1797 |