Mercurial > hg > CbC > CbC_gcc
annotate gcc/reg-stack.c @ 67:f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
| author | nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp> |
|---|---|
| date | Tue, 22 Mar 2011 17:18:12 +0900 |
| parents | b7f97abdc517 |
| children | 04ced10e8804 |
| rev | line source |
|---|---|
| 0 | 1 /* Register to Stack convert for GNU compiler. |
| 2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, | |
|
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f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
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parents:
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diff
changeset
|
3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010 |
| 0 | 4 Free Software Foundation, Inc. |
| 5 | |
| 6 This file is part of GCC. | |
| 7 | |
| 8 GCC is free software; you can redistribute it and/or modify it | |
| 9 under the terms of the GNU General Public License as published by | |
| 10 the Free Software Foundation; either version 3, or (at your option) | |
| 11 any later version. | |
| 12 | |
| 13 GCC is distributed in the hope that it will be useful, but WITHOUT | |
| 14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
| 15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
| 16 License for more details. | |
| 17 | |
| 18 You should have received a copy of the GNU General Public License | |
| 19 along with GCC; see the file COPYING3. If not see | |
| 20 <http://www.gnu.org/licenses/>. */ | |
| 21 | |
| 22 /* This pass converts stack-like registers from the "flat register | |
| 23 file" model that gcc uses, to a stack convention that the 387 uses. | |
| 24 | |
| 25 * The form of the input: | |
| 26 | |
| 27 On input, the function consists of insn that have had their | |
| 28 registers fully allocated to a set of "virtual" registers. Note that | |
| 29 the word "virtual" is used differently here than elsewhere in gcc: for | |
| 30 each virtual stack reg, there is a hard reg, but the mapping between | |
| 31 them is not known until this pass is run. On output, hard register | |
| 32 numbers have been substituted, and various pop and exchange insns have | |
| 33 been emitted. The hard register numbers and the virtual register | |
| 34 numbers completely overlap - before this pass, all stack register | |
| 35 numbers are virtual, and afterward they are all hard. | |
| 36 | |
| 37 The virtual registers can be manipulated normally by gcc, and their | |
| 38 semantics are the same as for normal registers. After the hard | |
| 39 register numbers are substituted, the semantics of an insn containing | |
| 40 stack-like regs are not the same as for an insn with normal regs: for | |
| 41 instance, it is not safe to delete an insn that appears to be a no-op | |
| 42 move. In general, no insn containing hard regs should be changed | |
| 43 after this pass is done. | |
| 44 | |
| 45 * The form of the output: | |
| 46 | |
| 47 After this pass, hard register numbers represent the distance from | |
| 48 the current top of stack to the desired register. A reference to | |
| 49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, | |
| 50 represents the register just below that, and so forth. Also, REG_DEAD | |
| 51 notes indicate whether or not a stack register should be popped. | |
| 52 | |
| 53 A "swap" insn looks like a parallel of two patterns, where each | |
| 54 pattern is a SET: one sets A to B, the other B to A. | |
| 55 | |
| 56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG | |
| 57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, | |
| 58 will replace the existing stack top, not push a new value. | |
| 59 | |
| 60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose | |
| 61 SET_SRC is REG or MEM. | |
| 62 | |
| 63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG | |
| 64 appears ambiguous. As a special case, the presence of a REG_DEAD note | |
| 65 for FIRST_STACK_REG differentiates between a load insn and a pop. | |
| 66 | |
| 67 If a REG_DEAD is present, the insn represents a "pop" that discards | |
| 68 the top of the register stack. If there is no REG_DEAD note, then the | |
| 69 insn represents a "dup" or a push of the current top of stack onto the | |
| 70 stack. | |
| 71 | |
| 72 * Methodology: | |
| 73 | |
| 74 Existing REG_DEAD and REG_UNUSED notes for stack registers are | |
| 75 deleted and recreated from scratch. REG_DEAD is never created for a | |
| 76 SET_DEST, only REG_UNUSED. | |
| 77 | |
| 78 * asm_operands: | |
| 79 | |
| 80 There are several rules on the usage of stack-like regs in | |
| 81 asm_operands insns. These rules apply only to the operands that are | |
| 82 stack-like regs: | |
| 83 | |
| 84 1. Given a set of input regs that die in an asm_operands, it is | |
| 85 necessary to know which are implicitly popped by the asm, and | |
| 86 which must be explicitly popped by gcc. | |
| 87 | |
| 88 An input reg that is implicitly popped by the asm must be | |
| 89 explicitly clobbered, unless it is constrained to match an | |
| 90 output operand. | |
| 91 | |
| 92 2. For any input reg that is implicitly popped by an asm, it is | |
| 93 necessary to know how to adjust the stack to compensate for the pop. | |
| 94 If any non-popped input is closer to the top of the reg-stack than | |
| 95 the implicitly popped reg, it would not be possible to know what the | |
| 96 stack looked like - it's not clear how the rest of the stack "slides | |
| 97 up". | |
| 98 | |
| 99 All implicitly popped input regs must be closer to the top of | |
| 100 the reg-stack than any input that is not implicitly popped. | |
| 101 | |
| 102 3. It is possible that if an input dies in an insn, reload might | |
| 103 use the input reg for an output reload. Consider this example: | |
| 104 | |
| 105 asm ("foo" : "=t" (a) : "f" (b)); | |
| 106 | |
| 107 This asm says that input B is not popped by the asm, and that | |
| 108 the asm pushes a result onto the reg-stack, i.e., the stack is one | |
| 109 deeper after the asm than it was before. But, it is possible that | |
| 110 reload will think that it can use the same reg for both the input and | |
| 111 the output, if input B dies in this insn. | |
| 112 | |
| 113 If any input operand uses the "f" constraint, all output reg | |
| 114 constraints must use the "&" earlyclobber. | |
| 115 | |
| 116 The asm above would be written as | |
| 117 | |
| 118 asm ("foo" : "=&t" (a) : "f" (b)); | |
| 119 | |
| 120 4. Some operands need to be in particular places on the stack. All | |
| 121 output operands fall in this category - there is no other way to | |
| 122 know which regs the outputs appear in unless the user indicates | |
| 123 this in the constraints. | |
| 124 | |
| 125 Output operands must specifically indicate which reg an output | |
| 126 appears in after an asm. "=f" is not allowed: the operand | |
| 127 constraints must select a class with a single reg. | |
| 128 | |
| 129 5. Output operands may not be "inserted" between existing stack regs. | |
| 130 Since no 387 opcode uses a read/write operand, all output operands | |
| 131 are dead before the asm_operands, and are pushed by the asm_operands. | |
| 132 It makes no sense to push anywhere but the top of the reg-stack. | |
| 133 | |
| 134 Output operands must start at the top of the reg-stack: output | |
| 135 operands may not "skip" a reg. | |
| 136 | |
| 137 6. Some asm statements may need extra stack space for internal | |
| 138 calculations. This can be guaranteed by clobbering stack registers | |
| 139 unrelated to the inputs and outputs. | |
| 140 | |
| 141 Here are a couple of reasonable asms to want to write. This asm | |
| 142 takes one input, which is internally popped, and produces two outputs. | |
| 143 | |
| 144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); | |
| 145 | |
| 146 This asm takes two inputs, which are popped by the fyl2xp1 opcode, | |
| 147 and replaces them with one output. The user must code the "st(1)" | |
| 148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs. | |
| 149 | |
| 150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); | |
| 151 | |
| 152 */ | |
| 153 | |
| 154 #include "config.h" | |
| 155 #include "system.h" | |
| 156 #include "coretypes.h" | |
| 157 #include "tm.h" | |
| 158 #include "tree.h" | |
|
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f6334be47118
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nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
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changeset
|
159 #include "rtl-error.h" |
| 0 | 160 #include "tm_p.h" |
| 161 #include "function.h" | |
| 162 #include "insn-config.h" | |
| 163 #include "regs.h" | |
| 164 #include "hard-reg-set.h" | |
| 165 #include "flags.h" | |
| 166 #include "recog.h" | |
| 167 #include "output.h" | |
| 168 #include "basic-block.h" | |
| 169 #include "cfglayout.h" | |
| 170 #include "reload.h" | |
| 171 #include "ggc.h" | |
| 172 #include "timevar.h" | |
| 173 #include "tree-pass.h" | |
| 174 #include "target.h" | |
| 175 #include "df.h" | |
| 176 #include "vecprim.h" | |
|
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f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
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177 #include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */ |
| 0 | 178 |
| 179 #ifdef STACK_REGS | |
| 180 | |
| 181 /* We use this array to cache info about insns, because otherwise we | |
| 182 spend too much time in stack_regs_mentioned_p. | |
| 183 | |
| 184 Indexed by insn UIDs. A value of zero is uninitialized, one indicates | |
| 185 the insn uses stack registers, two indicates the insn does not use | |
| 186 stack registers. */ | |
| 187 static VEC(char,heap) *stack_regs_mentioned_data; | |
| 188 | |
| 189 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) | |
| 190 | |
| 191 int regstack_completed = 0; | |
| 192 | |
| 193 /* This is the basic stack record. TOP is an index into REG[] such | |
| 194 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. | |
| 195 | |
| 196 If TOP is -2, REG[] is not yet initialized. Stack initialization | |
| 197 consists of placing each live reg in array `reg' and setting `top' | |
| 198 appropriately. | |
| 199 | |
| 200 REG_SET indicates which registers are live. */ | |
| 201 | |
| 202 typedef struct stack_def | |
| 203 { | |
| 204 int top; /* index to top stack element */ | |
| 205 HARD_REG_SET reg_set; /* set of live registers */ | |
| 206 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */ | |
| 207 } *stack; | |
| 208 | |
| 209 /* This is used to carry information about basic blocks. It is | |
| 210 attached to the AUX field of the standard CFG block. */ | |
| 211 | |
| 212 typedef struct block_info_def | |
| 213 { | |
| 214 struct stack_def stack_in; /* Input stack configuration. */ | |
| 215 struct stack_def stack_out; /* Output stack configuration. */ | |
| 216 HARD_REG_SET out_reg_set; /* Stack regs live on output. */ | |
| 217 int done; /* True if block already converted. */ | |
| 218 int predecessors; /* Number of predecessors that need | |
| 219 to be visited. */ | |
| 220 } *block_info; | |
| 221 | |
| 222 #define BLOCK_INFO(B) ((block_info) (B)->aux) | |
| 223 | |
| 224 /* Passed to change_stack to indicate where to emit insns. */ | |
| 225 enum emit_where | |
| 226 { | |
| 227 EMIT_AFTER, | |
| 228 EMIT_BEFORE | |
| 229 }; | |
| 230 | |
| 231 /* The block we're currently working on. */ | |
| 232 static basic_block current_block; | |
| 233 | |
| 234 /* In the current_block, whether we're processing the first register | |
| 235 stack or call instruction, i.e. the regstack is currently the | |
| 236 same as BLOCK_INFO(current_block)->stack_in. */ | |
| 237 static bool starting_stack_p; | |
| 238 | |
| 239 /* This is the register file for all register after conversion. */ | |
| 240 static rtx | |
| 241 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; | |
| 242 | |
| 243 #define FP_MODE_REG(regno,mode) \ | |
| 244 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)]) | |
| 245 | |
| 246 /* Used to initialize uninitialized registers. */ | |
| 247 static rtx not_a_num; | |
| 248 | |
| 249 /* Forward declarations */ | |
| 250 | |
| 251 static int stack_regs_mentioned_p (const_rtx pat); | |
| 252 static void pop_stack (stack, int); | |
| 253 static rtx *get_true_reg (rtx *); | |
| 254 | |
| 255 static int check_asm_stack_operands (rtx); | |
|
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256 static void get_asm_operands_in_out (rtx, int *, int *); |
| 0 | 257 static rtx stack_result (tree); |
| 258 static void replace_reg (rtx *, int); | |
| 259 static void remove_regno_note (rtx, enum reg_note, unsigned int); | |
| 260 static int get_hard_regnum (stack, rtx); | |
| 261 static rtx emit_pop_insn (rtx, stack, rtx, enum emit_where); | |
| 262 static void swap_to_top(rtx, stack, rtx, rtx); | |
| 263 static bool move_for_stack_reg (rtx, stack, rtx); | |
| 264 static bool move_nan_for_stack_reg (rtx, stack, rtx); | |
| 265 static int swap_rtx_condition_1 (rtx); | |
| 266 static int swap_rtx_condition (rtx); | |
| 267 static void compare_for_stack_reg (rtx, stack, rtx); | |
| 268 static bool subst_stack_regs_pat (rtx, stack, rtx); | |
| 269 static void subst_asm_stack_regs (rtx, stack); | |
| 270 static bool subst_stack_regs (rtx, stack); | |
| 271 static void change_stack (rtx, stack, stack, enum emit_where); | |
| 272 static void print_stack (FILE *, stack); | |
| 273 static rtx next_flags_user (rtx); | |
| 274 | |
| 275 /* Return nonzero if any stack register is mentioned somewhere within PAT. */ | |
| 276 | |
| 277 static int | |
| 278 stack_regs_mentioned_p (const_rtx pat) | |
| 279 { | |
| 280 const char *fmt; | |
| 281 int i; | |
| 282 | |
| 283 if (STACK_REG_P (pat)) | |
| 284 return 1; | |
| 285 | |
| 286 fmt = GET_RTX_FORMAT (GET_CODE (pat)); | |
| 287 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) | |
| 288 { | |
| 289 if (fmt[i] == 'E') | |
| 290 { | |
| 291 int j; | |
| 292 | |
| 293 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) | |
| 294 if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) | |
| 295 return 1; | |
| 296 } | |
| 297 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) | |
| 298 return 1; | |
| 299 } | |
| 300 | |
| 301 return 0; | |
| 302 } | |
| 303 | |
| 304 /* Return nonzero if INSN mentions stacked registers, else return zero. */ | |
| 305 | |
| 306 int | |
| 307 stack_regs_mentioned (const_rtx insn) | |
| 308 { | |
| 309 unsigned int uid, max; | |
| 310 int test; | |
| 311 | |
| 312 if (! INSN_P (insn) || !stack_regs_mentioned_data) | |
| 313 return 0; | |
| 314 | |
| 315 uid = INSN_UID (insn); | |
| 316 max = VEC_length (char, stack_regs_mentioned_data); | |
| 317 if (uid >= max) | |
| 318 { | |
| 319 /* Allocate some extra size to avoid too many reallocs, but | |
| 320 do not grow too quickly. */ | |
| 321 max = uid + uid / 20 + 1; | |
| 322 VEC_safe_grow_cleared (char, heap, stack_regs_mentioned_data, max); | |
| 323 } | |
| 324 | |
| 325 test = VEC_index (char, stack_regs_mentioned_data, uid); | |
| 326 if (test == 0) | |
| 327 { | |
| 328 /* This insn has yet to be examined. Do so now. */ | |
| 329 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2; | |
| 330 VEC_replace (char, stack_regs_mentioned_data, uid, test); | |
| 331 } | |
| 332 | |
| 333 return test == 1; | |
| 334 } | |
| 335 | |
| 336 static rtx ix86_flags_rtx; | |
| 337 | |
| 338 static rtx | |
| 339 next_flags_user (rtx insn) | |
| 340 { | |
| 341 /* Search forward looking for the first use of this value. | |
| 342 Stop at block boundaries. */ | |
| 343 | |
| 344 while (insn != BB_END (current_block)) | |
| 345 { | |
| 346 insn = NEXT_INSN (insn); | |
| 347 | |
| 348 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn))) | |
| 349 return insn; | |
| 350 | |
| 351 if (CALL_P (insn)) | |
| 352 return NULL_RTX; | |
| 353 } | |
| 354 return NULL_RTX; | |
| 355 } | |
| 356 | |
| 357 /* Reorganize the stack into ascending numbers, before this insn. */ | |
| 358 | |
| 359 static void | |
| 360 straighten_stack (rtx insn, stack regstack) | |
| 361 { | |
| 362 struct stack_def temp_stack; | |
| 363 int top; | |
| 364 | |
| 365 /* If there is only a single register on the stack, then the stack is | |
| 366 already in increasing order and no reorganization is needed. | |
| 367 | |
| 368 Similarly if the stack is empty. */ | |
| 369 if (regstack->top <= 0) | |
| 370 return; | |
| 371 | |
| 372 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set); | |
| 373 | |
| 374 for (top = temp_stack.top = regstack->top; top >= 0; top--) | |
| 375 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; | |
| 376 | |
| 377 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); | |
| 378 } | |
| 379 | |
| 380 /* Pop a register from the stack. */ | |
| 381 | |
| 382 static void | |
| 383 pop_stack (stack regstack, int regno) | |
| 384 { | |
| 385 int top = regstack->top; | |
| 386 | |
| 387 CLEAR_HARD_REG_BIT (regstack->reg_set, regno); | |
| 388 regstack->top--; | |
| 389 /* If regno was not at the top of stack then adjust stack. */ | |
| 390 if (regstack->reg [top] != regno) | |
| 391 { | |
| 392 int i; | |
| 393 for (i = regstack->top; i >= 0; i--) | |
| 394 if (regstack->reg [i] == regno) | |
| 395 { | |
| 396 int j; | |
| 397 for (j = i; j < top; j++) | |
| 398 regstack->reg [j] = regstack->reg [j + 1]; | |
| 399 break; | |
| 400 } | |
| 401 } | |
| 402 } | |
| 403 | |
| 404 /* Return a pointer to the REG expression within PAT. If PAT is not a | |
| 405 REG, possible enclosed by a conversion rtx, return the inner part of | |
| 406 PAT that stopped the search. */ | |
| 407 | |
| 408 static rtx * | |
| 409 get_true_reg (rtx *pat) | |
| 410 { | |
| 411 for (;;) | |
| 412 switch (GET_CODE (*pat)) | |
| 413 { | |
| 414 case SUBREG: | |
| 415 /* Eliminate FP subregister accesses in favor of the | |
| 416 actual FP register in use. */ | |
| 417 { | |
| 418 rtx subreg; | |
| 419 if (FP_REG_P (subreg = SUBREG_REG (*pat))) | |
| 420 { | |
| 421 int regno_off = subreg_regno_offset (REGNO (subreg), | |
| 422 GET_MODE (subreg), | |
| 423 SUBREG_BYTE (*pat), | |
| 424 GET_MODE (*pat)); | |
| 425 *pat = FP_MODE_REG (REGNO (subreg) + regno_off, | |
| 426 GET_MODE (subreg)); | |
| 427 return pat; | |
| 428 } | |
| 429 } | |
| 430 case FLOAT: | |
| 431 case FIX: | |
| 432 case FLOAT_EXTEND: | |
| 433 pat = & XEXP (*pat, 0); | |
| 434 break; | |
| 435 | |
| 436 case UNSPEC: | |
| 437 if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP) | |
| 438 pat = & XVECEXP (*pat, 0, 0); | |
| 439 return pat; | |
| 440 | |
| 441 case FLOAT_TRUNCATE: | |
| 442 if (!flag_unsafe_math_optimizations) | |
| 443 return pat; | |
| 444 pat = & XEXP (*pat, 0); | |
| 445 break; | |
| 446 | |
| 447 default: | |
| 448 return pat; | |
| 449 } | |
| 450 } | |
| 451 | |
| 452 /* Set if we find any malformed asms in a block. */ | |
| 453 static bool any_malformed_asm; | |
| 454 | |
| 455 /* There are many rules that an asm statement for stack-like regs must | |
| 456 follow. Those rules are explained at the top of this file: the rule | |
| 457 numbers below refer to that explanation. */ | |
| 458 | |
| 459 static int | |
| 460 check_asm_stack_operands (rtx insn) | |
| 461 { | |
| 462 int i; | |
| 463 int n_clobbers; | |
| 464 int malformed_asm = 0; | |
| 465 rtx body = PATTERN (insn); | |
| 466 | |
| 467 char reg_used_as_output[FIRST_PSEUDO_REGISTER]; | |
| 468 char implicitly_dies[FIRST_PSEUDO_REGISTER]; | |
| 469 int alt; | |
| 470 | |
| 471 rtx *clobber_reg = 0; | |
| 472 int n_inputs, n_outputs; | |
| 473 | |
| 474 /* Find out what the constraints require. If no constraint | |
| 475 alternative matches, this asm is malformed. */ | |
| 476 extract_insn (insn); | |
| 477 constrain_operands (1); | |
| 478 alt = which_alternative; | |
| 479 | |
| 480 preprocess_constraints (); | |
| 481 | |
|
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
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482 get_asm_operands_in_out (body, &n_outputs, &n_inputs); |
| 0 | 483 |
| 484 if (alt < 0) | |
| 485 { | |
| 486 malformed_asm = 1; | |
| 487 /* Avoid further trouble with this insn. */ | |
| 488 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); | |
| 489 return 0; | |
| 490 } | |
| 491 | |
| 492 /* Strip SUBREGs here to make the following code simpler. */ | |
| 493 for (i = 0; i < recog_data.n_operands; i++) | |
| 494 if (GET_CODE (recog_data.operand[i]) == SUBREG | |
| 495 && REG_P (SUBREG_REG (recog_data.operand[i]))) | |
| 496 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); | |
| 497 | |
| 498 /* Set up CLOBBER_REG. */ | |
| 499 | |
| 500 n_clobbers = 0; | |
| 501 | |
| 502 if (GET_CODE (body) == PARALLEL) | |
| 503 { | |
| 504 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0)); | |
| 505 | |
| 506 for (i = 0; i < XVECLEN (body, 0); i++) | |
| 507 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) | |
| 508 { | |
| 509 rtx clobber = XVECEXP (body, 0, i); | |
| 510 rtx reg = XEXP (clobber, 0); | |
| 511 | |
| 512 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) | |
| 513 reg = SUBREG_REG (reg); | |
| 514 | |
| 515 if (STACK_REG_P (reg)) | |
| 516 { | |
| 517 clobber_reg[n_clobbers] = reg; | |
| 518 n_clobbers++; | |
| 519 } | |
| 520 } | |
| 521 } | |
| 522 | |
| 523 /* Enforce rule #4: Output operands must specifically indicate which | |
| 524 reg an output appears in after an asm. "=f" is not allowed: the | |
| 525 operand constraints must select a class with a single reg. | |
| 526 | |
| 527 Also enforce rule #5: Output operands must start at the top of | |
| 528 the reg-stack: output operands may not "skip" a reg. */ | |
| 529 | |
| 530 memset (reg_used_as_output, 0, sizeof (reg_used_as_output)); | |
| 531 for (i = 0; i < n_outputs; i++) | |
| 532 if (STACK_REG_P (recog_data.operand[i])) | |
| 533 { | |
| 534 if (reg_class_size[(int) recog_op_alt[i][alt].cl] != 1) | |
| 535 { | |
| 536 error_for_asm (insn, "output constraint %d must specify a single register", i); | |
| 537 malformed_asm = 1; | |
| 538 } | |
| 539 else | |
| 540 { | |
| 541 int j; | |
| 542 | |
| 543 for (j = 0; j < n_clobbers; j++) | |
| 544 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j])) | |
| 545 { | |
| 546 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber", | |
| 547 i, reg_names [REGNO (clobber_reg[j])]); | |
| 548 malformed_asm = 1; | |
| 549 break; | |
| 550 } | |
| 551 if (j == n_clobbers) | |
| 552 reg_used_as_output[REGNO (recog_data.operand[i])] = 1; | |
| 553 } | |
| 554 } | |
| 555 | |
| 556 | |
| 557 /* Search for first non-popped reg. */ | |
| 558 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) | |
| 559 if (! reg_used_as_output[i]) | |
| 560 break; | |
| 561 | |
| 562 /* If there are any other popped regs, that's an error. */ | |
| 563 for (; i < LAST_STACK_REG + 1; i++) | |
| 564 if (reg_used_as_output[i]) | |
| 565 break; | |
| 566 | |
| 567 if (i != LAST_STACK_REG + 1) | |
| 568 { | |
| 569 error_for_asm (insn, "output regs must be grouped at top of stack"); | |
| 570 malformed_asm = 1; | |
| 571 } | |
| 572 | |
| 573 /* Enforce rule #2: All implicitly popped input regs must be closer | |
| 574 to the top of the reg-stack than any input that is not implicitly | |
| 575 popped. */ | |
| 576 | |
| 577 memset (implicitly_dies, 0, sizeof (implicitly_dies)); | |
| 578 for (i = n_outputs; i < n_outputs + n_inputs; i++) | |
| 579 if (STACK_REG_P (recog_data.operand[i])) | |
| 580 { | |
| 581 /* An input reg is implicitly popped if it is tied to an | |
| 582 output, or if there is a CLOBBER for it. */ | |
| 583 int j; | |
| 584 | |
| 585 for (j = 0; j < n_clobbers; j++) | |
| 586 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) | |
| 587 break; | |
| 588 | |
| 589 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) | |
| 590 implicitly_dies[REGNO (recog_data.operand[i])] = 1; | |
| 591 } | |
| 592 | |
| 593 /* Search for first non-popped reg. */ | |
| 594 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) | |
| 595 if (! implicitly_dies[i]) | |
| 596 break; | |
| 597 | |
| 598 /* If there are any other popped regs, that's an error. */ | |
| 599 for (; i < LAST_STACK_REG + 1; i++) | |
| 600 if (implicitly_dies[i]) | |
| 601 break; | |
| 602 | |
| 603 if (i != LAST_STACK_REG + 1) | |
| 604 { | |
| 605 error_for_asm (insn, | |
| 606 "implicitly popped regs must be grouped at top of stack"); | |
| 607 malformed_asm = 1; | |
| 608 } | |
| 609 | |
| 610 /* Enforce rule #3: If any input operand uses the "f" constraint, all | |
| 611 output constraints must use the "&" earlyclobber. | |
| 612 | |
| 613 ??? Detect this more deterministically by having constrain_asm_operands | |
| 614 record any earlyclobber. */ | |
| 615 | |
| 616 for (i = n_outputs; i < n_outputs + n_inputs; i++) | |
| 617 if (recog_op_alt[i][alt].matches == -1) | |
| 618 { | |
| 619 int j; | |
| 620 | |
| 621 for (j = 0; j < n_outputs; j++) | |
| 622 if (operands_match_p (recog_data.operand[j], recog_data.operand[i])) | |
| 623 { | |
| 624 error_for_asm (insn, | |
| 625 "output operand %d must use %<&%> constraint", j); | |
| 626 malformed_asm = 1; | |
| 627 } | |
| 628 } | |
| 629 | |
| 630 if (malformed_asm) | |
| 631 { | |
| 632 /* Avoid further trouble with this insn. */ | |
| 633 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); | |
| 634 any_malformed_asm = true; | |
| 635 return 0; | |
| 636 } | |
| 637 | |
| 638 return 1; | |
| 639 } | |
| 640 | |
| 641 /* Calculate the number of inputs and outputs in BODY, an | |
| 642 asm_operands. N_OPERANDS is the total number of operands, and | |
| 643 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are | |
| 644 placed. */ | |
| 645 | |
|
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646 static void |
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647 get_asm_operands_in_out (rtx body, int *pout, int *pin) |
| 0 | 648 { |
|
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649 rtx asmop = extract_asm_operands (body); |
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650 |
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651 *pin = ASM_OPERANDS_INPUT_LENGTH (asmop); |
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652 *pout = (recog_data.n_operands |
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653 - ASM_OPERANDS_INPUT_LENGTH (asmop) |
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654 - ASM_OPERANDS_LABEL_LENGTH (asmop)); |
| 0 | 655 } |
| 656 | |
| 657 /* If current function returns its result in an fp stack register, | |
| 658 return the REG. Otherwise, return 0. */ | |
| 659 | |
| 660 static rtx | |
| 661 stack_result (tree decl) | |
| 662 { | |
| 663 rtx result; | |
| 664 | |
| 665 /* If the value is supposed to be returned in memory, then clearly | |
| 666 it is not returned in a stack register. */ | |
| 667 if (aggregate_value_p (DECL_RESULT (decl), decl)) | |
| 668 return 0; | |
| 669 | |
| 670 result = DECL_RTL_IF_SET (DECL_RESULT (decl)); | |
| 671 if (result != 0) | |
| 672 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)), | |
| 673 decl, true); | |
| 674 | |
| 675 return result != 0 && STACK_REG_P (result) ? result : 0; | |
| 676 } | |
| 677 | |
| 678 | |
| 679 /* | |
| 680 * This section deals with stack register substitution, and forms the second | |
| 681 * pass over the RTL. | |
| 682 */ | |
| 683 | |
| 684 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for | |
| 685 the desired hard REGNO. */ | |
| 686 | |
| 687 static void | |
| 688 replace_reg (rtx *reg, int regno) | |
| 689 { | |
| 690 gcc_assert (IN_RANGE (regno, FIRST_STACK_REG, LAST_STACK_REG)); | |
| 691 gcc_assert (STACK_REG_P (*reg)); | |
| 692 | |
| 693 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg)) | |
| 694 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT); | |
| 695 | |
| 696 *reg = FP_MODE_REG (regno, GET_MODE (*reg)); | |
| 697 } | |
| 698 | |
| 699 /* Remove a note of type NOTE, which must be found, for register | |
| 700 number REGNO from INSN. Remove only one such note. */ | |
| 701 | |
| 702 static void | |
| 703 remove_regno_note (rtx insn, enum reg_note note, unsigned int regno) | |
| 704 { | |
| 705 rtx *note_link, this_rtx; | |
| 706 | |
| 707 note_link = ®_NOTES (insn); | |
| 708 for (this_rtx = *note_link; this_rtx; this_rtx = XEXP (this_rtx, 1)) | |
| 709 if (REG_NOTE_KIND (this_rtx) == note | |
| 710 && REG_P (XEXP (this_rtx, 0)) && REGNO (XEXP (this_rtx, 0)) == regno) | |
| 711 { | |
| 712 *note_link = XEXP (this_rtx, 1); | |
| 713 return; | |
| 714 } | |
| 715 else | |
| 716 note_link = &XEXP (this_rtx, 1); | |
| 717 | |
| 718 gcc_unreachable (); | |
| 719 } | |
| 720 | |
| 721 /* Find the hard register number of virtual register REG in REGSTACK. | |
| 722 The hard register number is relative to the top of the stack. -1 is | |
| 723 returned if the register is not found. */ | |
| 724 | |
| 725 static int | |
| 726 get_hard_regnum (stack regstack, rtx reg) | |
| 727 { | |
| 728 int i; | |
| 729 | |
| 730 gcc_assert (STACK_REG_P (reg)); | |
| 731 | |
| 732 for (i = regstack->top; i >= 0; i--) | |
| 733 if (regstack->reg[i] == REGNO (reg)) | |
| 734 break; | |
| 735 | |
| 736 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; | |
| 737 } | |
| 738 | |
| 739 /* Emit an insn to pop virtual register REG before or after INSN. | |
| 740 REGSTACK is the stack state after INSN and is updated to reflect this | |
| 741 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn | |
| 742 is represented as a SET whose destination is the register to be popped | |
| 743 and source is the top of stack. A death note for the top of stack | |
| 744 cases the movdf pattern to pop. */ | |
| 745 | |
| 746 static rtx | |
| 747 emit_pop_insn (rtx insn, stack regstack, rtx reg, enum emit_where where) | |
| 748 { | |
| 749 rtx pop_insn, pop_rtx; | |
| 750 int hard_regno; | |
| 751 | |
| 752 /* For complex types take care to pop both halves. These may survive in | |
| 753 CLOBBER and USE expressions. */ | |
| 754 if (COMPLEX_MODE_P (GET_MODE (reg))) | |
| 755 { | |
| 756 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode); | |
| 757 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode); | |
| 758 | |
| 759 pop_insn = NULL_RTX; | |
| 760 if (get_hard_regnum (regstack, reg1) >= 0) | |
| 761 pop_insn = emit_pop_insn (insn, regstack, reg1, where); | |
| 762 if (get_hard_regnum (regstack, reg2) >= 0) | |
| 763 pop_insn = emit_pop_insn (insn, regstack, reg2, where); | |
| 764 gcc_assert (pop_insn); | |
| 765 return pop_insn; | |
| 766 } | |
| 767 | |
| 768 hard_regno = get_hard_regnum (regstack, reg); | |
| 769 | |
| 770 gcc_assert (hard_regno >= FIRST_STACK_REG); | |
| 771 | |
| 772 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode), | |
| 773 FP_MODE_REG (FIRST_STACK_REG, DFmode)); | |
| 774 | |
| 775 if (where == EMIT_AFTER) | |
| 776 pop_insn = emit_insn_after (pop_rtx, insn); | |
| 777 else | |
| 778 pop_insn = emit_insn_before (pop_rtx, insn); | |
| 779 | |
| 780 add_reg_note (pop_insn, REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode)); | |
| 781 | |
| 782 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] | |
| 783 = regstack->reg[regstack->top]; | |
| 784 regstack->top -= 1; | |
| 785 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); | |
| 786 | |
| 787 return pop_insn; | |
| 788 } | |
| 789 | |
| 790 /* Emit an insn before or after INSN to swap virtual register REG with | |
| 791 the top of stack. REGSTACK is the stack state before the swap, and | |
| 792 is updated to reflect the swap. A swap insn is represented as a | |
| 793 PARALLEL of two patterns: each pattern moves one reg to the other. | |
| 794 | |
| 795 If REG is already at the top of the stack, no insn is emitted. */ | |
| 796 | |
| 797 static void | |
| 798 emit_swap_insn (rtx insn, stack regstack, rtx reg) | |
| 799 { | |
| 800 int hard_regno; | |
| 801 rtx swap_rtx; | |
| 802 int tmp, other_reg; /* swap regno temps */ | |
| 803 rtx i1; /* the stack-reg insn prior to INSN */ | |
| 804 rtx i1set = NULL_RTX; /* the SET rtx within I1 */ | |
| 805 | |
| 806 hard_regno = get_hard_regnum (regstack, reg); | |
| 807 | |
| 808 if (hard_regno == FIRST_STACK_REG) | |
| 809 return; | |
| 810 if (hard_regno == -1) | |
| 811 { | |
| 812 /* Something failed if the register wasn't on the stack. If we had | |
| 813 malformed asms, we zapped the instruction itself, but that didn't | |
| 814 produce the same pattern of register sets as before. To prevent | |
| 815 further failure, adjust REGSTACK to include REG at TOP. */ | |
| 816 gcc_assert (any_malformed_asm); | |
| 817 regstack->reg[++regstack->top] = REGNO (reg); | |
| 818 return; | |
| 819 } | |
| 820 gcc_assert (hard_regno >= FIRST_STACK_REG); | |
| 821 | |
| 822 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); | |
| 823 | |
| 824 tmp = regstack->reg[other_reg]; | |
| 825 regstack->reg[other_reg] = regstack->reg[regstack->top]; | |
| 826 regstack->reg[regstack->top] = tmp; | |
| 827 | |
| 828 /* Find the previous insn involving stack regs, but don't pass a | |
| 829 block boundary. */ | |
| 830 i1 = NULL; | |
| 831 if (current_block && insn != BB_HEAD (current_block)) | |
| 832 { | |
| 833 rtx tmp = PREV_INSN (insn); | |
| 834 rtx limit = PREV_INSN (BB_HEAD (current_block)); | |
| 835 while (tmp != limit) | |
| 836 { | |
| 837 if (LABEL_P (tmp) | |
| 838 || CALL_P (tmp) | |
| 839 || NOTE_INSN_BASIC_BLOCK_P (tmp) | |
| 840 || (NONJUMP_INSN_P (tmp) | |
| 841 && stack_regs_mentioned (tmp))) | |
| 842 { | |
| 843 i1 = tmp; | |
| 844 break; | |
| 845 } | |
| 846 tmp = PREV_INSN (tmp); | |
| 847 } | |
| 848 } | |
| 849 | |
| 850 if (i1 != NULL_RTX | |
| 851 && (i1set = single_set (i1)) != NULL_RTX) | |
| 852 { | |
| 853 rtx i1src = *get_true_reg (&SET_SRC (i1set)); | |
| 854 rtx i1dest = *get_true_reg (&SET_DEST (i1set)); | |
| 855 | |
| 856 /* If the previous register stack push was from the reg we are to | |
| 857 swap with, omit the swap. */ | |
| 858 | |
| 859 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG | |
| 860 && REG_P (i1src) | |
| 861 && REGNO (i1src) == (unsigned) hard_regno - 1 | |
| 862 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) | |
| 863 return; | |
| 864 | |
| 865 /* If the previous insn wrote to the reg we are to swap with, | |
| 866 omit the swap. */ | |
| 867 | |
| 868 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno | |
| 869 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG | |
| 870 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) | |
| 871 return; | |
| 872 } | |
| 873 | |
| 874 /* Avoid emitting the swap if this is the first register stack insn | |
| 875 of the current_block. Instead update the current_block's stack_in | |
| 876 and let compensate edges take care of this for us. */ | |
| 877 if (current_block && starting_stack_p) | |
| 878 { | |
| 879 BLOCK_INFO (current_block)->stack_in = *regstack; | |
| 880 starting_stack_p = false; | |
| 881 return; | |
| 882 } | |
| 883 | |
| 884 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode), | |
| 885 FP_MODE_REG (FIRST_STACK_REG, XFmode)); | |
| 886 | |
| 887 if (i1) | |
| 888 emit_insn_after (swap_rtx, i1); | |
| 889 else if (current_block) | |
| 890 emit_insn_before (swap_rtx, BB_HEAD (current_block)); | |
| 891 else | |
| 892 emit_insn_before (swap_rtx, insn); | |
| 893 } | |
| 894 | |
| 895 /* Emit an insns before INSN to swap virtual register SRC1 with | |
| 896 the top of stack and virtual register SRC2 with second stack | |
| 897 slot. REGSTACK is the stack state before the swaps, and | |
| 898 is updated to reflect the swaps. A swap insn is represented as a | |
| 899 PARALLEL of two patterns: each pattern moves one reg to the other. | |
| 900 | |
| 901 If SRC1 and/or SRC2 are already at the right place, no swap insn | |
| 902 is emitted. */ | |
| 903 | |
| 904 static void | |
| 905 swap_to_top (rtx insn, stack regstack, rtx src1, rtx src2) | |
| 906 { | |
| 907 struct stack_def temp_stack; | |
| 908 int regno, j, k, temp; | |
| 909 | |
| 910 temp_stack = *regstack; | |
| 911 | |
| 912 /* Place operand 1 at the top of stack. */ | |
| 913 regno = get_hard_regnum (&temp_stack, src1); | |
| 914 gcc_assert (regno >= 0); | |
| 915 if (regno != FIRST_STACK_REG) | |
| 916 { | |
| 917 k = temp_stack.top - (regno - FIRST_STACK_REG); | |
| 918 j = temp_stack.top; | |
| 919 | |
| 920 temp = temp_stack.reg[k]; | |
| 921 temp_stack.reg[k] = temp_stack.reg[j]; | |
| 922 temp_stack.reg[j] = temp; | |
| 923 } | |
| 924 | |
| 925 /* Place operand 2 next on the stack. */ | |
| 926 regno = get_hard_regnum (&temp_stack, src2); | |
| 927 gcc_assert (regno >= 0); | |
| 928 if (regno != FIRST_STACK_REG + 1) | |
| 929 { | |
| 930 k = temp_stack.top - (regno - FIRST_STACK_REG); | |
| 931 j = temp_stack.top - 1; | |
| 932 | |
| 933 temp = temp_stack.reg[k]; | |
| 934 temp_stack.reg[k] = temp_stack.reg[j]; | |
| 935 temp_stack.reg[j] = temp; | |
| 936 } | |
| 937 | |
| 938 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); | |
| 939 } | |
| 940 | |
| 941 /* Handle a move to or from a stack register in PAT, which is in INSN. | |
| 942 REGSTACK is the current stack. Return whether a control flow insn | |
| 943 was deleted in the process. */ | |
| 944 | |
| 945 static bool | |
| 946 move_for_stack_reg (rtx insn, stack regstack, rtx pat) | |
| 947 { | |
| 948 rtx *psrc = get_true_reg (&SET_SRC (pat)); | |
| 949 rtx *pdest = get_true_reg (&SET_DEST (pat)); | |
| 950 rtx src, dest; | |
| 951 rtx note; | |
| 952 bool control_flow_insn_deleted = false; | |
| 953 | |
| 954 src = *psrc; dest = *pdest; | |
| 955 | |
| 956 if (STACK_REG_P (src) && STACK_REG_P (dest)) | |
| 957 { | |
| 958 /* Write from one stack reg to another. If SRC dies here, then | |
| 959 just change the register mapping and delete the insn. */ | |
| 960 | |
| 961 note = find_regno_note (insn, REG_DEAD, REGNO (src)); | |
| 962 if (note) | |
| 963 { | |
| 964 int i; | |
| 965 | |
| 966 /* If this is a no-op move, there must not be a REG_DEAD note. */ | |
| 967 gcc_assert (REGNO (src) != REGNO (dest)); | |
| 968 | |
| 969 for (i = regstack->top; i >= 0; i--) | |
| 970 if (regstack->reg[i] == REGNO (src)) | |
| 971 break; | |
| 972 | |
| 973 /* The destination must be dead, or life analysis is borked. */ | |
| 974 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); | |
| 975 | |
| 976 /* If the source is not live, this is yet another case of | |
| 977 uninitialized variables. Load up a NaN instead. */ | |
| 978 if (i < 0) | |
| 979 return move_nan_for_stack_reg (insn, regstack, dest); | |
| 980 | |
| 981 /* It is possible that the dest is unused after this insn. | |
| 982 If so, just pop the src. */ | |
| 983 | |
| 984 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) | |
| 985 emit_pop_insn (insn, regstack, src, EMIT_AFTER); | |
| 986 else | |
| 987 { | |
| 988 regstack->reg[i] = REGNO (dest); | |
| 989 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); | |
| 990 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); | |
| 991 } | |
| 992 | |
| 993 control_flow_insn_deleted |= control_flow_insn_p (insn); | |
| 994 delete_insn (insn); | |
| 995 return control_flow_insn_deleted; | |
| 996 } | |
| 997 | |
| 998 /* The source reg does not die. */ | |
| 999 | |
| 1000 /* If this appears to be a no-op move, delete it, or else it | |
| 1001 will confuse the machine description output patterns. But if | |
| 1002 it is REG_UNUSED, we must pop the reg now, as per-insn processing | |
| 1003 for REG_UNUSED will not work for deleted insns. */ | |
| 1004 | |
| 1005 if (REGNO (src) == REGNO (dest)) | |
| 1006 { | |
| 1007 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) | |
| 1008 emit_pop_insn (insn, regstack, dest, EMIT_AFTER); | |
| 1009 | |
| 1010 control_flow_insn_deleted |= control_flow_insn_p (insn); | |
| 1011 delete_insn (insn); | |
| 1012 return control_flow_insn_deleted; | |
| 1013 } | |
| 1014 | |
| 1015 /* The destination ought to be dead. */ | |
| 1016 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); | |
| 1017 | |
| 1018 replace_reg (psrc, get_hard_regnum (regstack, src)); | |
| 1019 | |
| 1020 regstack->reg[++regstack->top] = REGNO (dest); | |
| 1021 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); | |
| 1022 replace_reg (pdest, FIRST_STACK_REG); | |
| 1023 } | |
| 1024 else if (STACK_REG_P (src)) | |
| 1025 { | |
| 1026 /* Save from a stack reg to MEM, or possibly integer reg. Since | |
| 1027 only top of stack may be saved, emit an exchange first if | |
| 1028 needs be. */ | |
| 1029 | |
| 1030 emit_swap_insn (insn, regstack, src); | |
| 1031 | |
| 1032 note = find_regno_note (insn, REG_DEAD, REGNO (src)); | |
| 1033 if (note) | |
| 1034 { | |
| 1035 replace_reg (&XEXP (note, 0), FIRST_STACK_REG); | |
| 1036 regstack->top--; | |
| 1037 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); | |
| 1038 } | |
| 1039 else if ((GET_MODE (src) == XFmode) | |
| 1040 && regstack->top < REG_STACK_SIZE - 1) | |
| 1041 { | |
| 1042 /* A 387 cannot write an XFmode value to a MEM without | |
| 1043 clobbering the source reg. The output code can handle | |
| 1044 this by reading back the value from the MEM. | |
| 1045 But it is more efficient to use a temp register if one is | |
| 1046 available. Push the source value here if the register | |
| 1047 stack is not full, and then write the value to memory via | |
| 1048 a pop. */ | |
| 1049 rtx push_rtx; | |
| 1050 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src)); | |
| 1051 | |
| 1052 push_rtx = gen_movxf (top_stack_reg, top_stack_reg); | |
| 1053 emit_insn_before (push_rtx, insn); | |
| 1054 add_reg_note (insn, REG_DEAD, top_stack_reg); | |
| 1055 } | |
| 1056 | |
| 1057 replace_reg (psrc, FIRST_STACK_REG); | |
| 1058 } | |
| 1059 else | |
| 1060 { | |
| 1061 rtx pat = PATTERN (insn); | |
| 1062 | |
| 1063 gcc_assert (STACK_REG_P (dest)); | |
| 1064 | |
| 1065 /* Load from MEM, or possibly integer REG or constant, into the | |
| 1066 stack regs. The actual target is always the top of the | |
| 1067 stack. The stack mapping is changed to reflect that DEST is | |
| 1068 now at top of stack. */ | |
| 1069 | |
| 1070 /* The destination ought to be dead. However, there is a | |
| 1071 special case with i387 UNSPEC_TAN, where destination is live | |
| 1072 (an argument to fptan) but inherent load of 1.0 is modelled | |
| 1073 as a load from a constant. */ | |
| 1074 if (GET_CODE (pat) == PARALLEL | |
| 1075 && XVECLEN (pat, 0) == 2 | |
| 1076 && GET_CODE (XVECEXP (pat, 0, 1)) == SET | |
| 1077 && GET_CODE (SET_SRC (XVECEXP (pat, 0, 1))) == UNSPEC | |
| 1078 && XINT (SET_SRC (XVECEXP (pat, 0, 1)), 1) == UNSPEC_TAN) | |
| 1079 emit_swap_insn (insn, regstack, dest); | |
| 1080 else | |
| 1081 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG); | |
| 1082 | |
| 1083 gcc_assert (regstack->top < REG_STACK_SIZE); | |
| 1084 | |
| 1085 regstack->reg[++regstack->top] = REGNO (dest); | |
| 1086 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); | |
| 1087 replace_reg (pdest, FIRST_STACK_REG); | |
| 1088 } | |
| 1089 | |
| 1090 return control_flow_insn_deleted; | |
| 1091 } | |
| 1092 | |
| 1093 /* A helper function which replaces INSN with a pattern that loads up | |
| 1094 a NaN into DEST, then invokes move_for_stack_reg. */ | |
| 1095 | |
| 1096 static bool | |
| 1097 move_nan_for_stack_reg (rtx insn, stack regstack, rtx dest) | |
| 1098 { | |
| 1099 rtx pat; | |
| 1100 | |
| 1101 dest = FP_MODE_REG (REGNO (dest), SFmode); | |
| 1102 pat = gen_rtx_SET (VOIDmode, dest, not_a_num); | |
| 1103 PATTERN (insn) = pat; | |
| 1104 INSN_CODE (insn) = -1; | |
| 1105 | |
| 1106 return move_for_stack_reg (insn, regstack, pat); | |
| 1107 } | |
| 1108 | |
| 1109 /* Swap the condition on a branch, if there is one. Return true if we | |
| 1110 found a condition to swap. False if the condition was not used as | |
| 1111 such. */ | |
| 1112 | |
| 1113 static int | |
| 1114 swap_rtx_condition_1 (rtx pat) | |
| 1115 { | |
| 1116 const char *fmt; | |
| 1117 int i, r = 0; | |
| 1118 | |
| 1119 if (COMPARISON_P (pat)) | |
| 1120 { | |
| 1121 PUT_CODE (pat, swap_condition (GET_CODE (pat))); | |
| 1122 r = 1; | |
| 1123 } | |
| 1124 else | |
| 1125 { | |
| 1126 fmt = GET_RTX_FORMAT (GET_CODE (pat)); | |
| 1127 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) | |
| 1128 { | |
| 1129 if (fmt[i] == 'E') | |
| 1130 { | |
| 1131 int j; | |
| 1132 | |
| 1133 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) | |
| 1134 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j)); | |
| 1135 } | |
| 1136 else if (fmt[i] == 'e') | |
| 1137 r |= swap_rtx_condition_1 (XEXP (pat, i)); | |
| 1138 } | |
| 1139 } | |
| 1140 | |
| 1141 return r; | |
| 1142 } | |
| 1143 | |
| 1144 static int | |
| 1145 swap_rtx_condition (rtx insn) | |
| 1146 { | |
| 1147 rtx pat = PATTERN (insn); | |
| 1148 | |
| 1149 /* We're looking for a single set to cc0 or an HImode temporary. */ | |
| 1150 | |
| 1151 if (GET_CODE (pat) == SET | |
| 1152 && REG_P (SET_DEST (pat)) | |
| 1153 && REGNO (SET_DEST (pat)) == FLAGS_REG) | |
| 1154 { | |
| 1155 insn = next_flags_user (insn); | |
| 1156 if (insn == NULL_RTX) | |
| 1157 return 0; | |
| 1158 pat = PATTERN (insn); | |
| 1159 } | |
| 1160 | |
| 1161 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything | |
| 1162 with the cc value right now. We may be able to search for one | |
| 1163 though. */ | |
| 1164 | |
| 1165 if (GET_CODE (pat) == SET | |
| 1166 && GET_CODE (SET_SRC (pat)) == UNSPEC | |
| 1167 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW) | |
| 1168 { | |
| 1169 rtx dest = SET_DEST (pat); | |
| 1170 | |
| 1171 /* Search forward looking for the first use of this value. | |
| 1172 Stop at block boundaries. */ | |
| 1173 while (insn != BB_END (current_block)) | |
| 1174 { | |
| 1175 insn = NEXT_INSN (insn); | |
| 1176 if (INSN_P (insn) && reg_mentioned_p (dest, insn)) | |
| 1177 break; | |
| 1178 if (CALL_P (insn)) | |
| 1179 return 0; | |
| 1180 } | |
| 1181 | |
| 1182 /* We haven't found it. */ | |
| 1183 if (insn == BB_END (current_block)) | |
| 1184 return 0; | |
| 1185 | |
| 1186 /* So we've found the insn using this value. If it is anything | |
| 1187 other than sahf or the value does not die (meaning we'd have | |
| 1188 to search further), then we must give up. */ | |
| 1189 pat = PATTERN (insn); | |
| 1190 if (GET_CODE (pat) != SET | |
| 1191 || GET_CODE (SET_SRC (pat)) != UNSPEC | |
| 1192 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF | |
| 1193 || ! dead_or_set_p (insn, dest)) | |
| 1194 return 0; | |
| 1195 | |
| 1196 /* Now we are prepared to handle this as a normal cc0 setter. */ | |
| 1197 insn = next_flags_user (insn); | |
| 1198 if (insn == NULL_RTX) | |
| 1199 return 0; | |
| 1200 pat = PATTERN (insn); | |
| 1201 } | |
| 1202 | |
| 1203 if (swap_rtx_condition_1 (pat)) | |
| 1204 { | |
| 1205 int fail = 0; | |
| 1206 INSN_CODE (insn) = -1; | |
| 1207 if (recog_memoized (insn) == -1) | |
| 1208 fail = 1; | |
| 1209 /* In case the flags don't die here, recurse to try fix | |
| 1210 following user too. */ | |
| 1211 else if (! dead_or_set_p (insn, ix86_flags_rtx)) | |
| 1212 { | |
| 1213 insn = next_flags_user (insn); | |
| 1214 if (!insn || !swap_rtx_condition (insn)) | |
| 1215 fail = 1; | |
| 1216 } | |
| 1217 if (fail) | |
| 1218 { | |
| 1219 swap_rtx_condition_1 (pat); | |
| 1220 return 0; | |
| 1221 } | |
| 1222 return 1; | |
| 1223 } | |
| 1224 return 0; | |
| 1225 } | |
| 1226 | |
| 1227 /* Handle a comparison. Special care needs to be taken to avoid | |
| 1228 causing comparisons that a 387 cannot do correctly, such as EQ. | |
| 1229 | |
| 1230 Also, a pop insn may need to be emitted. The 387 does have an | |
| 1231 `fcompp' insn that can pop two regs, but it is sometimes too expensive | |
| 1232 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to | |
| 1233 set up. */ | |
| 1234 | |
| 1235 static void | |
| 1236 compare_for_stack_reg (rtx insn, stack regstack, rtx pat_src) | |
| 1237 { | |
| 1238 rtx *src1, *src2; | |
| 1239 rtx src1_note, src2_note; | |
| 1240 | |
| 1241 src1 = get_true_reg (&XEXP (pat_src, 0)); | |
| 1242 src2 = get_true_reg (&XEXP (pat_src, 1)); | |
| 1243 | |
| 1244 /* ??? If fxch turns out to be cheaper than fstp, give priority to | |
| 1245 registers that die in this insn - move those to stack top first. */ | |
| 1246 if ((! STACK_REG_P (*src1) | |
| 1247 || (STACK_REG_P (*src2) | |
| 1248 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) | |
| 1249 && swap_rtx_condition (insn)) | |
| 1250 { | |
| 1251 rtx temp; | |
| 1252 temp = XEXP (pat_src, 0); | |
| 1253 XEXP (pat_src, 0) = XEXP (pat_src, 1); | |
| 1254 XEXP (pat_src, 1) = temp; | |
| 1255 | |
| 1256 src1 = get_true_reg (&XEXP (pat_src, 0)); | |
| 1257 src2 = get_true_reg (&XEXP (pat_src, 1)); | |
| 1258 | |
| 1259 INSN_CODE (insn) = -1; | |
| 1260 } | |
| 1261 | |
| 1262 /* We will fix any death note later. */ | |
| 1263 | |
| 1264 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
| 1265 | |
| 1266 if (STACK_REG_P (*src2)) | |
| 1267 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
| 1268 else | |
| 1269 src2_note = NULL_RTX; | |
| 1270 | |
| 1271 emit_swap_insn (insn, regstack, *src1); | |
| 1272 | |
| 1273 replace_reg (src1, FIRST_STACK_REG); | |
| 1274 | |
| 1275 if (STACK_REG_P (*src2)) | |
| 1276 replace_reg (src2, get_hard_regnum (regstack, *src2)); | |
| 1277 | |
| 1278 if (src1_note) | |
| 1279 { | |
| 1280 pop_stack (regstack, REGNO (XEXP (src1_note, 0))); | |
| 1281 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
| 1282 } | |
| 1283 | |
| 1284 /* If the second operand dies, handle that. But if the operands are | |
| 1285 the same stack register, don't bother, because only one death is | |
| 1286 needed, and it was just handled. */ | |
| 1287 | |
| 1288 if (src2_note | |
| 1289 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) | |
| 1290 && REGNO (*src1) == REGNO (*src2))) | |
| 1291 { | |
| 1292 /* As a special case, two regs may die in this insn if src2 is | |
| 1293 next to top of stack and the top of stack also dies. Since | |
| 1294 we have already popped src1, "next to top of stack" is really | |
| 1295 at top (FIRST_STACK_REG) now. */ | |
| 1296 | |
| 1297 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG | |
| 1298 && src1_note) | |
| 1299 { | |
| 1300 pop_stack (regstack, REGNO (XEXP (src2_note, 0))); | |
| 1301 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); | |
| 1302 } | |
| 1303 else | |
| 1304 { | |
| 1305 /* The 386 can only represent death of the first operand in | |
| 1306 the case handled above. In all other cases, emit a separate | |
| 1307 pop and remove the death note from here. */ | |
| 1308 | |
| 1309 /* link_cc0_insns (insn); */ | |
| 1310 | |
| 1311 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); | |
| 1312 | |
| 1313 emit_pop_insn (insn, regstack, XEXP (src2_note, 0), | |
| 1314 EMIT_AFTER); | |
| 1315 } | |
| 1316 } | |
| 1317 } | |
| 1318 | |
|
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1319 /* Substitute new registers in LOC, which is part of a debug insn. |
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1320 REGSTACK is the current register layout. */ |
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1321 |
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1322 static int |
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1323 subst_stack_regs_in_debug_insn (rtx *loc, void *data) |
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1324 { |
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1325 rtx *tloc = get_true_reg (loc); |
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1326 stack regstack = (stack)data; |
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1327 int hard_regno; |
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1328 |
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1329 if (!STACK_REG_P (*tloc)) |
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1330 return 0; |
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1331 |
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1332 if (tloc != loc) |
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1333 return 0; |
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1334 |
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1335 hard_regno = get_hard_regnum (regstack, *loc); |
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1336 gcc_assert (hard_regno >= FIRST_STACK_REG); |
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1337 |
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1338 replace_reg (loc, hard_regno); |
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1339 |
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1340 return -1; |
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1341 } |
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1342 |
| 0 | 1343 /* Substitute new registers in PAT, which is part of INSN. REGSTACK |
| 1344 is the current register layout. Return whether a control flow insn | |
| 1345 was deleted in the process. */ | |
| 1346 | |
| 1347 static bool | |
| 1348 subst_stack_regs_pat (rtx insn, stack regstack, rtx pat) | |
| 1349 { | |
| 1350 rtx *dest, *src; | |
| 1351 bool control_flow_insn_deleted = false; | |
| 1352 | |
| 1353 switch (GET_CODE (pat)) | |
| 1354 { | |
| 1355 case USE: | |
| 1356 /* Deaths in USE insns can happen in non optimizing compilation. | |
| 1357 Handle them by popping the dying register. */ | |
| 1358 src = get_true_reg (&XEXP (pat, 0)); | |
| 1359 if (STACK_REG_P (*src) | |
| 1360 && find_regno_note (insn, REG_DEAD, REGNO (*src))) | |
| 1361 { | |
| 1362 /* USEs are ignored for liveness information so USEs of dead | |
| 1363 register might happen. */ | |
| 1364 if (TEST_HARD_REG_BIT (regstack->reg_set, REGNO (*src))) | |
| 1365 emit_pop_insn (insn, regstack, *src, EMIT_AFTER); | |
| 1366 return control_flow_insn_deleted; | |
| 1367 } | |
| 1368 /* Uninitialized USE might happen for functions returning uninitialized | |
| 1369 value. We will properly initialize the USE on the edge to EXIT_BLOCK, | |
| 1370 so it is safe to ignore the use here. This is consistent with behavior | |
|
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1371 of dataflow analyzer that ignores USE too. (This also imply that |
| 0 | 1372 forcibly initializing the register to NaN here would lead to ICE later, |
| 1373 since the REG_DEAD notes are not issued.) */ | |
| 1374 break; | |
| 1375 | |
|
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1376 case VAR_LOCATION: |
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1377 gcc_unreachable (); |
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1378 |
| 0 | 1379 case CLOBBER: |
| 1380 { | |
| 1381 rtx note; | |
| 1382 | |
| 1383 dest = get_true_reg (&XEXP (pat, 0)); | |
| 1384 if (STACK_REG_P (*dest)) | |
| 1385 { | |
| 1386 note = find_reg_note (insn, REG_DEAD, *dest); | |
| 1387 | |
| 1388 if (pat != PATTERN (insn)) | |
| 1389 { | |
|
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1390 /* The fix_truncdi_1 pattern wants to be able to |
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1391 allocate its own scratch register. It does this by |
|
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1392 clobbering an fp reg so that it is assured of an |
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1393 empty reg-stack register. If the register is live, |
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1394 kill it now. Remove the DEAD/UNUSED note so we |
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1395 don't try to kill it later too. |
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1396 |
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1397 In reality the UNUSED note can be absent in some |
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1398 complicated cases when the register is reused for |
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1399 partially set variable. */ |
| 0 | 1400 |
| 1401 if (note) | |
| 1402 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE); | |
| 1403 else | |
|
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1404 note = find_reg_note (insn, REG_UNUSED, *dest); |
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1405 if (note) |
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|
1406 remove_note (insn, note); |
| 0 | 1407 replace_reg (dest, FIRST_STACK_REG + 1); |
| 1408 } | |
| 1409 else | |
| 1410 { | |
| 1411 /* A top-level clobber with no REG_DEAD, and no hard-regnum | |
| 1412 indicates an uninitialized value. Because reload removed | |
| 1413 all other clobbers, this must be due to a function | |
| 1414 returning without a value. Load up a NaN. */ | |
| 1415 | |
| 1416 if (!note) | |
| 1417 { | |
| 1418 rtx t = *dest; | |
| 1419 if (COMPLEX_MODE_P (GET_MODE (t))) | |
| 1420 { | |
| 1421 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode); | |
| 1422 if (get_hard_regnum (regstack, u) == -1) | |
| 1423 { | |
| 1424 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u); | |
| 1425 rtx insn2 = emit_insn_before (pat2, insn); | |
| 1426 control_flow_insn_deleted | |
| 1427 |= move_nan_for_stack_reg (insn2, regstack, u); | |
| 1428 } | |
| 1429 } | |
| 1430 if (get_hard_regnum (regstack, t) == -1) | |
| 1431 control_flow_insn_deleted | |
| 1432 |= move_nan_for_stack_reg (insn, regstack, t); | |
| 1433 } | |
| 1434 } | |
| 1435 } | |
| 1436 break; | |
| 1437 } | |
| 1438 | |
| 1439 case SET: | |
| 1440 { | |
| 1441 rtx *src1 = (rtx *) 0, *src2; | |
| 1442 rtx src1_note, src2_note; | |
| 1443 rtx pat_src; | |
| 1444 | |
| 1445 dest = get_true_reg (&SET_DEST (pat)); | |
| 1446 src = get_true_reg (&SET_SRC (pat)); | |
| 1447 pat_src = SET_SRC (pat); | |
| 1448 | |
| 1449 /* See if this is a `movM' pattern, and handle elsewhere if so. */ | |
| 1450 if (STACK_REG_P (*src) | |
| 1451 || (STACK_REG_P (*dest) | |
| 1452 && (REG_P (*src) || MEM_P (*src) | |
| 1453 || GET_CODE (*src) == CONST_DOUBLE))) | |
| 1454 { | |
| 1455 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); | |
| 1456 break; | |
| 1457 } | |
| 1458 | |
| 1459 switch (GET_CODE (pat_src)) | |
| 1460 { | |
| 1461 case COMPARE: | |
| 1462 compare_for_stack_reg (insn, regstack, pat_src); | |
| 1463 break; | |
| 1464 | |
| 1465 case CALL: | |
| 1466 { | |
| 1467 int count; | |
| 1468 for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)]; | |
| 1469 --count >= 0;) | |
| 1470 { | |
| 1471 regstack->reg[++regstack->top] = REGNO (*dest) + count; | |
| 1472 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); | |
| 1473 } | |
| 1474 } | |
| 1475 replace_reg (dest, FIRST_STACK_REG); | |
| 1476 break; | |
| 1477 | |
| 1478 case REG: | |
| 1479 /* This is a `tstM2' case. */ | |
| 1480 gcc_assert (*dest == cc0_rtx); | |
| 1481 src1 = src; | |
| 1482 | |
| 1483 /* Fall through. */ | |
| 1484 | |
| 1485 case FLOAT_TRUNCATE: | |
| 1486 case SQRT: | |
| 1487 case ABS: | |
| 1488 case NEG: | |
| 1489 /* These insns only operate on the top of the stack. DEST might | |
| 1490 be cc0_rtx if we're processing a tstM pattern. Also, it's | |
| 1491 possible that the tstM case results in a REG_DEAD note on the | |
| 1492 source. */ | |
| 1493 | |
| 1494 if (src1 == 0) | |
| 1495 src1 = get_true_reg (&XEXP (pat_src, 0)); | |
| 1496 | |
| 1497 emit_swap_insn (insn, regstack, *src1); | |
| 1498 | |
| 1499 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
| 1500 | |
| 1501 if (STACK_REG_P (*dest)) | |
| 1502 replace_reg (dest, FIRST_STACK_REG); | |
| 1503 | |
| 1504 if (src1_note) | |
| 1505 { | |
| 1506 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
| 1507 regstack->top--; | |
| 1508 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); | |
| 1509 } | |
| 1510 | |
| 1511 replace_reg (src1, FIRST_STACK_REG); | |
| 1512 break; | |
| 1513 | |
| 1514 case MINUS: | |
| 1515 case DIV: | |
| 1516 /* On i386, reversed forms of subM3 and divM3 exist for | |
| 1517 MODE_FLOAT, so the same code that works for addM3 and mulM3 | |
| 1518 can be used. */ | |
| 1519 case MULT: | |
| 1520 case PLUS: | |
| 1521 /* These insns can accept the top of stack as a destination | |
| 1522 from a stack reg or mem, or can use the top of stack as a | |
| 1523 source and some other stack register (possibly top of stack) | |
| 1524 as a destination. */ | |
| 1525 | |
| 1526 src1 = get_true_reg (&XEXP (pat_src, 0)); | |
| 1527 src2 = get_true_reg (&XEXP (pat_src, 1)); | |
| 1528 | |
| 1529 /* We will fix any death note later. */ | |
| 1530 | |
| 1531 if (STACK_REG_P (*src1)) | |
| 1532 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
| 1533 else | |
| 1534 src1_note = NULL_RTX; | |
| 1535 if (STACK_REG_P (*src2)) | |
| 1536 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
| 1537 else | |
| 1538 src2_note = NULL_RTX; | |
| 1539 | |
| 1540 /* If either operand is not a stack register, then the dest | |
| 1541 must be top of stack. */ | |
| 1542 | |
| 1543 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) | |
| 1544 emit_swap_insn (insn, regstack, *dest); | |
| 1545 else | |
| 1546 { | |
| 1547 /* Both operands are REG. If neither operand is already | |
| 1548 at the top of stack, choose to make the one that is the | |
| 1549 dest the new top of stack. */ | |
| 1550 | |
| 1551 int src1_hard_regnum, src2_hard_regnum; | |
| 1552 | |
| 1553 src1_hard_regnum = get_hard_regnum (regstack, *src1); | |
| 1554 src2_hard_regnum = get_hard_regnum (regstack, *src2); | |
| 1555 | |
| 1556 /* If the source is not live, this is yet another case of | |
| 1557 uninitialized variables. Load up a NaN instead. */ | |
| 1558 if (src1_hard_regnum == -1) | |
| 1559 { | |
| 1560 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src1); | |
| 1561 rtx insn2 = emit_insn_before (pat2, insn); | |
| 1562 control_flow_insn_deleted | |
| 1563 |= move_nan_for_stack_reg (insn2, regstack, *src1); | |
| 1564 } | |
| 1565 if (src2_hard_regnum == -1) | |
| 1566 { | |
| 1567 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src2); | |
| 1568 rtx insn2 = emit_insn_before (pat2, insn); | |
| 1569 control_flow_insn_deleted | |
| 1570 |= move_nan_for_stack_reg (insn2, regstack, *src2); | |
| 1571 } | |
| 1572 | |
| 1573 if (src1_hard_regnum != FIRST_STACK_REG | |
| 1574 && src2_hard_regnum != FIRST_STACK_REG) | |
| 1575 emit_swap_insn (insn, regstack, *dest); | |
| 1576 } | |
| 1577 | |
| 1578 if (STACK_REG_P (*src1)) | |
| 1579 replace_reg (src1, get_hard_regnum (regstack, *src1)); | |
| 1580 if (STACK_REG_P (*src2)) | |
| 1581 replace_reg (src2, get_hard_regnum (regstack, *src2)); | |
| 1582 | |
| 1583 if (src1_note) | |
| 1584 { | |
| 1585 rtx src1_reg = XEXP (src1_note, 0); | |
| 1586 | |
| 1587 /* If the register that dies is at the top of stack, then | |
| 1588 the destination is somewhere else - merely substitute it. | |
| 1589 But if the reg that dies is not at top of stack, then | |
| 1590 move the top of stack to the dead reg, as though we had | |
| 1591 done the insn and then a store-with-pop. */ | |
| 1592 | |
| 1593 if (REGNO (src1_reg) == regstack->reg[regstack->top]) | |
| 1594 { | |
| 1595 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
| 1596 replace_reg (dest, get_hard_regnum (regstack, *dest)); | |
| 1597 } | |
| 1598 else | |
| 1599 { | |
| 1600 int regno = get_hard_regnum (regstack, src1_reg); | |
| 1601 | |
| 1602 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
| 1603 replace_reg (dest, regno); | |
| 1604 | |
| 1605 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] | |
| 1606 = regstack->reg[regstack->top]; | |
| 1607 } | |
| 1608 | |
| 1609 CLEAR_HARD_REG_BIT (regstack->reg_set, | |
| 1610 REGNO (XEXP (src1_note, 0))); | |
| 1611 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
| 1612 regstack->top--; | |
| 1613 } | |
| 1614 else if (src2_note) | |
| 1615 { | |
| 1616 rtx src2_reg = XEXP (src2_note, 0); | |
| 1617 if (REGNO (src2_reg) == regstack->reg[regstack->top]) | |
| 1618 { | |
| 1619 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
| 1620 replace_reg (dest, get_hard_regnum (regstack, *dest)); | |
| 1621 } | |
| 1622 else | |
| 1623 { | |
| 1624 int regno = get_hard_regnum (regstack, src2_reg); | |
| 1625 | |
| 1626 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
| 1627 replace_reg (dest, regno); | |
| 1628 | |
| 1629 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] | |
| 1630 = regstack->reg[regstack->top]; | |
| 1631 } | |
| 1632 | |
| 1633 CLEAR_HARD_REG_BIT (regstack->reg_set, | |
| 1634 REGNO (XEXP (src2_note, 0))); | |
| 1635 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); | |
| 1636 regstack->top--; | |
| 1637 } | |
| 1638 else | |
| 1639 { | |
| 1640 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
| 1641 replace_reg (dest, get_hard_regnum (regstack, *dest)); | |
| 1642 } | |
| 1643 | |
| 1644 /* Keep operand 1 matching with destination. */ | |
| 1645 if (COMMUTATIVE_ARITH_P (pat_src) | |
| 1646 && REG_P (*src1) && REG_P (*src2) | |
| 1647 && REGNO (*src1) != REGNO (*dest)) | |
| 1648 { | |
| 1649 int tmp = REGNO (*src1); | |
| 1650 replace_reg (src1, REGNO (*src2)); | |
| 1651 replace_reg (src2, tmp); | |
| 1652 } | |
| 1653 break; | |
| 1654 | |
| 1655 case UNSPEC: | |
| 1656 switch (XINT (pat_src, 1)) | |
| 1657 { | |
| 1658 case UNSPEC_FIST: | |
| 1659 | |
| 1660 case UNSPEC_FIST_FLOOR: | |
| 1661 case UNSPEC_FIST_CEIL: | |
| 1662 | |
| 1663 /* These insns only operate on the top of the stack. */ | |
| 1664 | |
| 1665 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
| 1666 emit_swap_insn (insn, regstack, *src1); | |
| 1667 | |
| 1668 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
| 1669 | |
| 1670 if (STACK_REG_P (*dest)) | |
| 1671 replace_reg (dest, FIRST_STACK_REG); | |
| 1672 | |
| 1673 if (src1_note) | |
| 1674 { | |
| 1675 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
| 1676 regstack->top--; | |
| 1677 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); | |
| 1678 } | |
| 1679 | |
| 1680 replace_reg (src1, FIRST_STACK_REG); | |
| 1681 break; | |
| 1682 | |
| 1683 case UNSPEC_FXAM: | |
| 1684 | |
| 1685 /* This insn only operate on the top of the stack. */ | |
| 1686 | |
| 1687 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
| 1688 emit_swap_insn (insn, regstack, *src1); | |
| 1689 | |
| 1690 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
| 1691 | |
| 1692 replace_reg (src1, FIRST_STACK_REG); | |
| 1693 | |
| 1694 if (src1_note) | |
| 1695 { | |
| 1696 remove_regno_note (insn, REG_DEAD, | |
| 1697 REGNO (XEXP (src1_note, 0))); | |
| 1698 emit_pop_insn (insn, regstack, XEXP (src1_note, 0), | |
| 1699 EMIT_AFTER); | |
| 1700 } | |
| 1701 | |
| 1702 break; | |
| 1703 | |
| 1704 case UNSPEC_SIN: | |
| 1705 case UNSPEC_COS: | |
| 1706 case UNSPEC_FRNDINT: | |
| 1707 case UNSPEC_F2XM1: | |
| 1708 | |
| 1709 case UNSPEC_FRNDINT_FLOOR: | |
| 1710 case UNSPEC_FRNDINT_CEIL: | |
| 1711 case UNSPEC_FRNDINT_TRUNC: | |
| 1712 case UNSPEC_FRNDINT_MASK_PM: | |
| 1713 | |
| 1714 /* Above insns operate on the top of the stack. */ | |
| 1715 | |
| 1716 case UNSPEC_SINCOS_COS: | |
| 1717 case UNSPEC_XTRACT_FRACT: | |
| 1718 | |
| 1719 /* Above insns operate on the top two stack slots, | |
| 1720 first part of one input, double output insn. */ | |
| 1721 | |
| 1722 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
| 1723 | |
| 1724 emit_swap_insn (insn, regstack, *src1); | |
| 1725 | |
| 1726 /* Input should never die, it is replaced with output. */ | |
| 1727 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
| 1728 gcc_assert (!src1_note); | |
| 1729 | |
| 1730 if (STACK_REG_P (*dest)) | |
| 1731 replace_reg (dest, FIRST_STACK_REG); | |
| 1732 | |
| 1733 replace_reg (src1, FIRST_STACK_REG); | |
| 1734 break; | |
| 1735 | |
| 1736 case UNSPEC_SINCOS_SIN: | |
| 1737 case UNSPEC_XTRACT_EXP: | |
| 1738 | |
| 1739 /* These insns operate on the top two stack slots, | |
| 1740 second part of one input, double output insn. */ | |
| 1741 | |
| 1742 regstack->top++; | |
| 1743 /* FALLTHRU */ | |
| 1744 | |
| 1745 case UNSPEC_TAN: | |
| 1746 | |
| 1747 /* For UNSPEC_TAN, regstack->top is already increased | |
| 1748 by inherent load of constant 1.0. */ | |
| 1749 | |
| 1750 /* Output value is generated in the second stack slot. | |
| 1751 Move current value from second slot to the top. */ | |
| 1752 regstack->reg[regstack->top] | |
| 1753 = regstack->reg[regstack->top - 1]; | |
| 1754 | |
| 1755 gcc_assert (STACK_REG_P (*dest)); | |
| 1756 | |
| 1757 regstack->reg[regstack->top - 1] = REGNO (*dest); | |
| 1758 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
| 1759 replace_reg (dest, FIRST_STACK_REG + 1); | |
| 1760 | |
| 1761 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
| 1762 | |
| 1763 replace_reg (src1, FIRST_STACK_REG); | |
| 1764 break; | |
| 1765 | |
| 1766 case UNSPEC_FPATAN: | |
| 1767 case UNSPEC_FYL2X: | |
| 1768 case UNSPEC_FYL2XP1: | |
| 1769 /* These insns operate on the top two stack slots. */ | |
| 1770 | |
| 1771 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
| 1772 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); | |
| 1773 | |
| 1774 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
| 1775 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
| 1776 | |
| 1777 swap_to_top (insn, regstack, *src1, *src2); | |
| 1778 | |
| 1779 replace_reg (src1, FIRST_STACK_REG); | |
| 1780 replace_reg (src2, FIRST_STACK_REG + 1); | |
| 1781 | |
| 1782 if (src1_note) | |
| 1783 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
| 1784 if (src2_note) | |
| 1785 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); | |
| 1786 | |
| 1787 /* Pop both input operands from the stack. */ | |
| 1788 CLEAR_HARD_REG_BIT (regstack->reg_set, | |
| 1789 regstack->reg[regstack->top]); | |
| 1790 CLEAR_HARD_REG_BIT (regstack->reg_set, | |
| 1791 regstack->reg[regstack->top - 1]); | |
| 1792 regstack->top -= 2; | |
| 1793 | |
| 1794 /* Push the result back onto the stack. */ | |
| 1795 regstack->reg[++regstack->top] = REGNO (*dest); | |
| 1796 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
| 1797 replace_reg (dest, FIRST_STACK_REG); | |
| 1798 break; | |
| 1799 | |
| 1800 case UNSPEC_FSCALE_FRACT: | |
| 1801 case UNSPEC_FPREM_F: | |
| 1802 case UNSPEC_FPREM1_F: | |
| 1803 /* These insns operate on the top two stack slots, | |
| 1804 first part of double input, double output insn. */ | |
| 1805 | |
| 1806 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
| 1807 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); | |
| 1808 | |
| 1809 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
| 1810 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
| 1811 | |
| 1812 /* Inputs should never die, they are | |
| 1813 replaced with outputs. */ | |
| 1814 gcc_assert (!src1_note); | |
| 1815 gcc_assert (!src2_note); | |
| 1816 | |
| 1817 swap_to_top (insn, regstack, *src1, *src2); | |
| 1818 | |
| 1819 /* Push the result back onto stack. Empty stack slot | |
| 1820 will be filled in second part of insn. */ | |
| 1821 if (STACK_REG_P (*dest)) | |
| 1822 { | |
| 1823 regstack->reg[regstack->top] = REGNO (*dest); | |
| 1824 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
| 1825 replace_reg (dest, FIRST_STACK_REG); | |
| 1826 } | |
| 1827 | |
| 1828 replace_reg (src1, FIRST_STACK_REG); | |
| 1829 replace_reg (src2, FIRST_STACK_REG + 1); | |
| 1830 break; | |
| 1831 | |
| 1832 case UNSPEC_FSCALE_EXP: | |
| 1833 case UNSPEC_FPREM_U: | |
| 1834 case UNSPEC_FPREM1_U: | |
| 1835 /* These insns operate on the top two stack slots, | |
| 1836 second part of double input, double output insn. */ | |
| 1837 | |
| 1838 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
| 1839 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); | |
| 1840 | |
| 1841 /* Push the result back onto stack. Fill empty slot from | |
| 1842 first part of insn and fix top of stack pointer. */ | |
| 1843 if (STACK_REG_P (*dest)) | |
| 1844 { | |
| 1845 regstack->reg[regstack->top - 1] = REGNO (*dest); | |
| 1846 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
| 1847 replace_reg (dest, FIRST_STACK_REG + 1); | |
| 1848 } | |
| 1849 | |
| 1850 replace_reg (src1, FIRST_STACK_REG); | |
| 1851 replace_reg (src2, FIRST_STACK_REG + 1); | |
| 1852 break; | |
| 1853 | |
| 1854 case UNSPEC_C2_FLAG: | |
| 1855 /* This insn operates on the top two stack slots, | |
| 1856 third part of C2 setting double input insn. */ | |
| 1857 | |
| 1858 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); | |
| 1859 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); | |
| 1860 | |
| 1861 replace_reg (src1, FIRST_STACK_REG); | |
| 1862 replace_reg (src2, FIRST_STACK_REG + 1); | |
| 1863 break; | |
| 1864 | |
| 1865 case UNSPEC_SAHF: | |
| 1866 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF) | |
| 1867 The combination matches the PPRO fcomi instruction. */ | |
| 1868 | |
| 1869 pat_src = XVECEXP (pat_src, 0, 0); | |
| 1870 gcc_assert (GET_CODE (pat_src) == UNSPEC); | |
| 1871 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW); | |
| 1872 /* Fall through. */ | |
| 1873 | |
| 1874 case UNSPEC_FNSTSW: | |
| 1875 /* Combined fcomp+fnstsw generated for doing well with | |
| 1876 CSE. When optimizing this would have been broken | |
| 1877 up before now. */ | |
| 1878 | |
| 1879 pat_src = XVECEXP (pat_src, 0, 0); | |
| 1880 gcc_assert (GET_CODE (pat_src) == COMPARE); | |
| 1881 | |
| 1882 compare_for_stack_reg (insn, regstack, pat_src); | |
| 1883 break; | |
| 1884 | |
| 1885 default: | |
| 1886 gcc_unreachable (); | |
| 1887 } | |
| 1888 break; | |
| 1889 | |
| 1890 case IF_THEN_ELSE: | |
| 1891 /* This insn requires the top of stack to be the destination. */ | |
| 1892 | |
| 1893 src1 = get_true_reg (&XEXP (pat_src, 1)); | |
| 1894 src2 = get_true_reg (&XEXP (pat_src, 2)); | |
| 1895 | |
| 1896 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
| 1897 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
| 1898 | |
| 1899 /* If the comparison operator is an FP comparison operator, | |
| 1900 it is handled correctly by compare_for_stack_reg () who | |
| 1901 will move the destination to the top of stack. But if the | |
| 1902 comparison operator is not an FP comparison operator, we | |
| 1903 have to handle it here. */ | |
| 1904 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG | |
| 1905 && REGNO (*dest) != regstack->reg[regstack->top]) | |
| 1906 { | |
| 1907 /* In case one of operands is the top of stack and the operands | |
| 1908 dies, it is safe to make it the destination operand by | |
| 1909 reversing the direction of cmove and avoid fxch. */ | |
| 1910 if ((REGNO (*src1) == regstack->reg[regstack->top] | |
| 1911 && src1_note) | |
| 1912 || (REGNO (*src2) == regstack->reg[regstack->top] | |
| 1913 && src2_note)) | |
| 1914 { | |
| 1915 int idx1 = (get_hard_regnum (regstack, *src1) | |
| 1916 - FIRST_STACK_REG); | |
| 1917 int idx2 = (get_hard_regnum (regstack, *src2) | |
| 1918 - FIRST_STACK_REG); | |
| 1919 | |
| 1920 /* Make reg-stack believe that the operands are already | |
| 1921 swapped on the stack */ | |
| 1922 regstack->reg[regstack->top - idx1] = REGNO (*src2); | |
| 1923 regstack->reg[regstack->top - idx2] = REGNO (*src1); | |
| 1924 | |
| 1925 /* Reverse condition to compensate the operand swap. | |
| 1926 i386 do have comparison always reversible. */ | |
| 1927 PUT_CODE (XEXP (pat_src, 0), | |
| 1928 reversed_comparison_code (XEXP (pat_src, 0), insn)); | |
| 1929 } | |
| 1930 else | |
| 1931 emit_swap_insn (insn, regstack, *dest); | |
| 1932 } | |
| 1933 | |
| 1934 { | |
| 1935 rtx src_note [3]; | |
| 1936 int i; | |
| 1937 | |
| 1938 src_note[0] = 0; | |
| 1939 src_note[1] = src1_note; | |
| 1940 src_note[2] = src2_note; | |
| 1941 | |
| 1942 if (STACK_REG_P (*src1)) | |
| 1943 replace_reg (src1, get_hard_regnum (regstack, *src1)); | |
| 1944 if (STACK_REG_P (*src2)) | |
| 1945 replace_reg (src2, get_hard_regnum (regstack, *src2)); | |
| 1946 | |
| 1947 for (i = 1; i <= 2; i++) | |
| 1948 if (src_note [i]) | |
| 1949 { | |
| 1950 int regno = REGNO (XEXP (src_note[i], 0)); | |
| 1951 | |
| 1952 /* If the register that dies is not at the top of | |
| 1953 stack, then move the top of stack to the dead reg. | |
| 1954 Top of stack should never die, as it is the | |
| 1955 destination. */ | |
| 1956 gcc_assert (regno != regstack->reg[regstack->top]); | |
| 1957 remove_regno_note (insn, REG_DEAD, regno); | |
| 1958 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0), | |
| 1959 EMIT_AFTER); | |
| 1960 } | |
| 1961 } | |
| 1962 | |
| 1963 /* Make dest the top of stack. Add dest to regstack if | |
| 1964 not present. */ | |
| 1965 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG) | |
| 1966 regstack->reg[++regstack->top] = REGNO (*dest); | |
| 1967 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
| 1968 replace_reg (dest, FIRST_STACK_REG); | |
| 1969 break; | |
| 1970 | |
| 1971 default: | |
| 1972 gcc_unreachable (); | |
| 1973 } | |
| 1974 break; | |
| 1975 } | |
| 1976 | |
| 1977 default: | |
| 1978 break; | |
| 1979 } | |
| 1980 | |
| 1981 return control_flow_insn_deleted; | |
| 1982 } | |
| 1983 | |
| 1984 /* Substitute hard regnums for any stack regs in INSN, which has | |
| 1985 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info | |
| 1986 before the insn, and is updated with changes made here. | |
| 1987 | |
| 1988 There are several requirements and assumptions about the use of | |
| 1989 stack-like regs in asm statements. These rules are enforced by | |
| 1990 record_asm_stack_regs; see comments there for details. Any | |
| 1991 asm_operands left in the RTL at this point may be assume to meet the | |
| 1992 requirements, since record_asm_stack_regs removes any problem asm. */ | |
| 1993 | |
| 1994 static void | |
| 1995 subst_asm_stack_regs (rtx insn, stack regstack) | |
| 1996 { | |
| 1997 rtx body = PATTERN (insn); | |
| 1998 int alt; | |
| 1999 | |
| 2000 rtx *note_reg; /* Array of note contents */ | |
| 2001 rtx **note_loc; /* Address of REG field of each note */ | |
| 2002 enum reg_note *note_kind; /* The type of each note */ | |
| 2003 | |
| 2004 rtx *clobber_reg = 0; | |
| 2005 rtx **clobber_loc = 0; | |
| 2006 | |
| 2007 struct stack_def temp_stack; | |
| 2008 int n_notes; | |
| 2009 int n_clobbers; | |
| 2010 rtx note; | |
| 2011 int i; | |
| 2012 int n_inputs, n_outputs; | |
| 2013 | |
| 2014 if (! check_asm_stack_operands (insn)) | |
| 2015 return; | |
| 2016 | |
| 2017 /* Find out what the constraints required. If no constraint | |
| 2018 alternative matches, that is a compiler bug: we should have caught | |
| 2019 such an insn in check_asm_stack_operands. */ | |
| 2020 extract_insn (insn); | |
| 2021 constrain_operands (1); | |
| 2022 alt = which_alternative; | |
| 2023 | |
| 2024 preprocess_constraints (); | |
| 2025 | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
19
diff
changeset
|
2026 get_asm_operands_in_out (body, &n_outputs, &n_inputs); |
| 0 | 2027 |
| 2028 gcc_assert (alt >= 0); | |
| 2029 | |
| 2030 /* Strip SUBREGs here to make the following code simpler. */ | |
| 2031 for (i = 0; i < recog_data.n_operands; i++) | |
| 2032 if (GET_CODE (recog_data.operand[i]) == SUBREG | |
| 2033 && REG_P (SUBREG_REG (recog_data.operand[i]))) | |
| 2034 { | |
| 2035 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]); | |
| 2036 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); | |
| 2037 } | |
| 2038 | |
| 2039 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ | |
| 2040 | |
| 2041 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
| 2042 i++; | |
| 2043 | |
| 2044 note_reg = XALLOCAVEC (rtx, i); | |
| 2045 note_loc = XALLOCAVEC (rtx *, i); | |
| 2046 note_kind = XALLOCAVEC (enum reg_note, i); | |
| 2047 | |
| 2048 n_notes = 0; | |
| 2049 for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
| 2050 { | |
| 2051 rtx reg = XEXP (note, 0); | |
| 2052 rtx *loc = & XEXP (note, 0); | |
| 2053 | |
| 2054 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) | |
| 2055 { | |
| 2056 loc = & SUBREG_REG (reg); | |
| 2057 reg = SUBREG_REG (reg); | |
| 2058 } | |
| 2059 | |
| 2060 if (STACK_REG_P (reg) | |
| 2061 && (REG_NOTE_KIND (note) == REG_DEAD | |
| 2062 || REG_NOTE_KIND (note) == REG_UNUSED)) | |
| 2063 { | |
| 2064 note_reg[n_notes] = reg; | |
| 2065 note_loc[n_notes] = loc; | |
| 2066 note_kind[n_notes] = REG_NOTE_KIND (note); | |
| 2067 n_notes++; | |
| 2068 } | |
| 2069 } | |
| 2070 | |
| 2071 /* Set up CLOBBER_REG and CLOBBER_LOC. */ | |
| 2072 | |
| 2073 n_clobbers = 0; | |
| 2074 | |
| 2075 if (GET_CODE (body) == PARALLEL) | |
| 2076 { | |
| 2077 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0)); | |
| 2078 clobber_loc = XALLOCAVEC (rtx *, XVECLEN (body, 0)); | |
| 2079 | |
| 2080 for (i = 0; i < XVECLEN (body, 0); i++) | |
| 2081 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) | |
| 2082 { | |
| 2083 rtx clobber = XVECEXP (body, 0, i); | |
| 2084 rtx reg = XEXP (clobber, 0); | |
| 2085 rtx *loc = & XEXP (clobber, 0); | |
| 2086 | |
| 2087 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) | |
| 2088 { | |
| 2089 loc = & SUBREG_REG (reg); | |
| 2090 reg = SUBREG_REG (reg); | |
| 2091 } | |
| 2092 | |
| 2093 if (STACK_REG_P (reg)) | |
| 2094 { | |
| 2095 clobber_reg[n_clobbers] = reg; | |
| 2096 clobber_loc[n_clobbers] = loc; | |
| 2097 n_clobbers++; | |
| 2098 } | |
| 2099 } | |
| 2100 } | |
| 2101 | |
| 2102 temp_stack = *regstack; | |
| 2103 | |
| 2104 /* Put the input regs into the desired place in TEMP_STACK. */ | |
| 2105 | |
| 2106 for (i = n_outputs; i < n_outputs + n_inputs; i++) | |
| 2107 if (STACK_REG_P (recog_data.operand[i]) | |
| 2108 && reg_class_subset_p (recog_op_alt[i][alt].cl, | |
| 2109 FLOAT_REGS) | |
| 2110 && recog_op_alt[i][alt].cl != FLOAT_REGS) | |
| 2111 { | |
| 2112 /* If an operand needs to be in a particular reg in | |
| 2113 FLOAT_REGS, the constraint was either 't' or 'u'. Since | |
| 2114 these constraints are for single register classes, and | |
| 2115 reload guaranteed that operand[i] is already in that class, | |
| 2116 we can just use REGNO (recog_data.operand[i]) to know which | |
| 2117 actual reg this operand needs to be in. */ | |
| 2118 | |
| 2119 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]); | |
| 2120 | |
| 2121 gcc_assert (regno >= 0); | |
| 2122 | |
| 2123 if ((unsigned int) regno != REGNO (recog_data.operand[i])) | |
| 2124 { | |
| 2125 /* recog_data.operand[i] is not in the right place. Find | |
| 2126 it and swap it with whatever is already in I's place. | |
| 2127 K is where recog_data.operand[i] is now. J is where it | |
| 2128 should be. */ | |
| 2129 int j, k, temp; | |
| 2130 | |
| 2131 k = temp_stack.top - (regno - FIRST_STACK_REG); | |
| 2132 j = (temp_stack.top | |
| 2133 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG)); | |
| 2134 | |
| 2135 temp = temp_stack.reg[k]; | |
| 2136 temp_stack.reg[k] = temp_stack.reg[j]; | |
| 2137 temp_stack.reg[j] = temp; | |
| 2138 } | |
| 2139 } | |
| 2140 | |
| 2141 /* Emit insns before INSN to make sure the reg-stack is in the right | |
| 2142 order. */ | |
| 2143 | |
| 2144 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); | |
| 2145 | |
| 2146 /* Make the needed input register substitutions. Do death notes and | |
| 2147 clobbers too, because these are for inputs, not outputs. */ | |
| 2148 | |
| 2149 for (i = n_outputs; i < n_outputs + n_inputs; i++) | |
| 2150 if (STACK_REG_P (recog_data.operand[i])) | |
| 2151 { | |
| 2152 int regnum = get_hard_regnum (regstack, recog_data.operand[i]); | |
| 2153 | |
| 2154 gcc_assert (regnum >= 0); | |
| 2155 | |
| 2156 replace_reg (recog_data.operand_loc[i], regnum); | |
| 2157 } | |
| 2158 | |
| 2159 for (i = 0; i < n_notes; i++) | |
| 2160 if (note_kind[i] == REG_DEAD) | |
| 2161 { | |
| 2162 int regnum = get_hard_regnum (regstack, note_reg[i]); | |
| 2163 | |
| 2164 gcc_assert (regnum >= 0); | |
| 2165 | |
| 2166 replace_reg (note_loc[i], regnum); | |
| 2167 } | |
| 2168 | |
| 2169 for (i = 0; i < n_clobbers; i++) | |
| 2170 { | |
| 2171 /* It's OK for a CLOBBER to reference a reg that is not live. | |
| 2172 Don't try to replace it in that case. */ | |
| 2173 int regnum = get_hard_regnum (regstack, clobber_reg[i]); | |
| 2174 | |
| 2175 if (regnum >= 0) | |
| 2176 { | |
| 2177 /* Sigh - clobbers always have QImode. But replace_reg knows | |
| 2178 that these regs can't be MODE_INT and will assert. Just put | |
| 2179 the right reg there without calling replace_reg. */ | |
| 2180 | |
| 2181 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode); | |
| 2182 } | |
| 2183 } | |
| 2184 | |
| 2185 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ | |
| 2186 | |
| 2187 for (i = n_outputs; i < n_outputs + n_inputs; i++) | |
| 2188 if (STACK_REG_P (recog_data.operand[i])) | |
| 2189 { | |
| 2190 /* An input reg is implicitly popped if it is tied to an | |
| 2191 output, or if there is a CLOBBER for it. */ | |
| 2192 int j; | |
| 2193 | |
| 2194 for (j = 0; j < n_clobbers; j++) | |
| 2195 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) | |
| 2196 break; | |
| 2197 | |
| 2198 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) | |
| 2199 { | |
| 2200 /* recog_data.operand[i] might not be at the top of stack. | |
| 2201 But that's OK, because all we need to do is pop the | |
| 2202 right number of regs off of the top of the reg-stack. | |
| 2203 record_asm_stack_regs guaranteed that all implicitly | |
| 2204 popped regs were grouped at the top of the reg-stack. */ | |
| 2205 | |
| 2206 CLEAR_HARD_REG_BIT (regstack->reg_set, | |
| 2207 regstack->reg[regstack->top]); | |
| 2208 regstack->top--; | |
| 2209 } | |
| 2210 } | |
| 2211 | |
| 2212 /* Now add to REGSTACK any outputs that the asm implicitly pushed. | |
| 2213 Note that there isn't any need to substitute register numbers. | |
| 2214 ??? Explain why this is true. */ | |
| 2215 | |
| 2216 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) | |
| 2217 { | |
| 2218 /* See if there is an output for this hard reg. */ | |
| 2219 int j; | |
| 2220 | |
| 2221 for (j = 0; j < n_outputs; j++) | |
| 2222 if (STACK_REG_P (recog_data.operand[j]) | |
| 2223 && REGNO (recog_data.operand[j]) == (unsigned) i) | |
| 2224 { | |
| 2225 regstack->reg[++regstack->top] = i; | |
| 2226 SET_HARD_REG_BIT (regstack->reg_set, i); | |
| 2227 break; | |
| 2228 } | |
| 2229 } | |
| 2230 | |
| 2231 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD | |
| 2232 input that the asm didn't implicitly pop. If the asm didn't | |
| 2233 implicitly pop an input reg, that reg will still be live. | |
| 2234 | |
| 2235 Note that we can't use find_regno_note here: the register numbers | |
| 2236 in the death notes have already been substituted. */ | |
| 2237 | |
| 2238 for (i = 0; i < n_outputs; i++) | |
| 2239 if (STACK_REG_P (recog_data.operand[i])) | |
| 2240 { | |
| 2241 int j; | |
| 2242 | |
| 2243 for (j = 0; j < n_notes; j++) | |
| 2244 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) | |
| 2245 && note_kind[j] == REG_UNUSED) | |
| 2246 { | |
| 2247 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], | |
| 2248 EMIT_AFTER); | |
| 2249 break; | |
| 2250 } | |
| 2251 } | |
| 2252 | |
| 2253 for (i = n_outputs; i < n_outputs + n_inputs; i++) | |
| 2254 if (STACK_REG_P (recog_data.operand[i])) | |
| 2255 { | |
| 2256 int j; | |
| 2257 | |
| 2258 for (j = 0; j < n_notes; j++) | |
| 2259 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) | |
| 2260 && note_kind[j] == REG_DEAD | |
| 2261 && TEST_HARD_REG_BIT (regstack->reg_set, | |
| 2262 REGNO (recog_data.operand[i]))) | |
| 2263 { | |
| 2264 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], | |
| 2265 EMIT_AFTER); | |
| 2266 break; | |
| 2267 } | |
| 2268 } | |
| 2269 } | |
| 2270 | |
| 2271 /* Substitute stack hard reg numbers for stack virtual registers in | |
| 2272 INSN. Non-stack register numbers are not changed. REGSTACK is the | |
| 2273 current stack content. Insns may be emitted as needed to arrange the | |
| 2274 stack for the 387 based on the contents of the insn. Return whether | |
| 2275 a control flow insn was deleted in the process. */ | |
| 2276 | |
| 2277 static bool | |
| 2278 subst_stack_regs (rtx insn, stack regstack) | |
| 2279 { | |
| 2280 rtx *note_link, note; | |
| 2281 bool control_flow_insn_deleted = false; | |
| 2282 int i; | |
| 2283 | |
| 2284 if (CALL_P (insn)) | |
| 2285 { | |
| 2286 int top = regstack->top; | |
| 2287 | |
| 2288 /* If there are any floating point parameters to be passed in | |
| 2289 registers for this call, make sure they are in the right | |
| 2290 order. */ | |
| 2291 | |
| 2292 if (top >= 0) | |
| 2293 { | |
| 2294 straighten_stack (insn, regstack); | |
| 2295 | |
| 2296 /* Now mark the arguments as dead after the call. */ | |
| 2297 | |
| 2298 while (regstack->top >= 0) | |
| 2299 { | |
| 2300 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); | |
| 2301 regstack->top--; | |
| 2302 } | |
| 2303 } | |
| 2304 } | |
| 2305 | |
| 2306 /* Do the actual substitution if any stack regs are mentioned. | |
| 2307 Since we only record whether entire insn mentions stack regs, and | |
| 2308 subst_stack_regs_pat only works for patterns that contain stack regs, | |
| 2309 we must check each pattern in a parallel here. A call_value_pop could | |
| 2310 fail otherwise. */ | |
| 2311 | |
| 2312 if (stack_regs_mentioned (insn)) | |
| 2313 { | |
| 2314 int n_operands = asm_noperands (PATTERN (insn)); | |
| 2315 if (n_operands >= 0) | |
| 2316 { | |
| 2317 /* This insn is an `asm' with operands. Decode the operands, | |
| 2318 decide how many are inputs, and do register substitution. | |
| 2319 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ | |
| 2320 | |
| 2321 subst_asm_stack_regs (insn, regstack); | |
| 2322 return control_flow_insn_deleted; | |
| 2323 } | |
| 2324 | |
| 2325 if (GET_CODE (PATTERN (insn)) == PARALLEL) | |
| 2326 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) | |
| 2327 { | |
| 2328 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) | |
| 2329 { | |
| 2330 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER) | |
| 2331 XVECEXP (PATTERN (insn), 0, i) | |
| 2332 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i)); | |
| 2333 control_flow_insn_deleted | |
| 2334 |= subst_stack_regs_pat (insn, regstack, | |
| 2335 XVECEXP (PATTERN (insn), 0, i)); | |
| 2336 } | |
| 2337 } | |
| 2338 else | |
| 2339 control_flow_insn_deleted | |
| 2340 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn)); | |
| 2341 } | |
| 2342 | |
| 2343 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any | |
| 2344 REG_UNUSED will already have been dealt with, so just return. */ | |
| 2345 | |
| 2346 if (NOTE_P (insn) || INSN_DELETED_P (insn)) | |
| 2347 return control_flow_insn_deleted; | |
| 2348 | |
| 2349 /* If this a noreturn call, we can't insert pop insns after it. | |
| 2350 Instead, reset the stack state to empty. */ | |
| 2351 if (CALL_P (insn) | |
| 2352 && find_reg_note (insn, REG_NORETURN, NULL)) | |
| 2353 { | |
| 2354 regstack->top = -1; | |
| 2355 CLEAR_HARD_REG_SET (regstack->reg_set); | |
| 2356 return control_flow_insn_deleted; | |
| 2357 } | |
| 2358 | |
| 2359 /* If there is a REG_UNUSED note on a stack register on this insn, | |
| 2360 the indicated reg must be popped. The REG_UNUSED note is removed, | |
| 2361 since the form of the newly emitted pop insn references the reg, | |
| 2362 making it no longer `unset'. */ | |
| 2363 | |
| 2364 note_link = ®_NOTES (insn); | |
| 2365 for (note = *note_link; note; note = XEXP (note, 1)) | |
| 2366 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) | |
| 2367 { | |
| 2368 *note_link = XEXP (note, 1); | |
| 2369 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER); | |
| 2370 } | |
| 2371 else | |
| 2372 note_link = &XEXP (note, 1); | |
| 2373 | |
| 2374 return control_flow_insn_deleted; | |
| 2375 } | |
| 2376 | |
| 2377 /* Change the organization of the stack so that it fits a new basic | |
| 2378 block. Some registers might have to be popped, but there can never be | |
| 2379 a register live in the new block that is not now live. | |
| 2380 | |
| 2381 Insert any needed insns before or after INSN, as indicated by | |
| 2382 WHERE. OLD is the original stack layout, and NEW is the desired | |
| 2383 form. OLD is updated to reflect the code emitted, i.e., it will be | |
| 2384 the same as NEW upon return. | |
| 2385 | |
| 2386 This function will not preserve block_end[]. But that information | |
| 2387 is no longer needed once this has executed. */ | |
| 2388 | |
| 2389 static void | |
| 2390 change_stack (rtx insn, stack old, stack new_stack, enum emit_where where) | |
| 2391 { | |
| 2392 int reg; | |
| 2393 int update_end = 0; | |
| 2394 int i; | |
| 2395 | |
| 2396 /* Stack adjustments for the first insn in a block update the | |
| 2397 current_block's stack_in instead of inserting insns directly. | |
| 2398 compensate_edges will add the necessary code later. */ | |
| 2399 if (current_block | |
| 2400 && starting_stack_p | |
| 2401 && where == EMIT_BEFORE) | |
| 2402 { | |
| 2403 BLOCK_INFO (current_block)->stack_in = *new_stack; | |
| 2404 starting_stack_p = false; | |
| 2405 *old = *new_stack; | |
| 2406 return; | |
| 2407 } | |
| 2408 | |
| 2409 /* We will be inserting new insns "backwards". If we are to insert | |
| 2410 after INSN, find the next insn, and insert before it. */ | |
| 2411 | |
| 2412 if (where == EMIT_AFTER) | |
| 2413 { | |
| 2414 if (current_block && BB_END (current_block) == insn) | |
| 2415 update_end = 1; | |
| 2416 insn = NEXT_INSN (insn); | |
| 2417 } | |
| 2418 | |
| 2419 /* Initialize partially dead variables. */ | |
| 2420 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) | |
| 2421 if (TEST_HARD_REG_BIT (new_stack->reg_set, i) | |
| 2422 && !TEST_HARD_REG_BIT (old->reg_set, i)) | |
| 2423 { | |
| 2424 old->reg[++old->top] = i; | |
| 2425 SET_HARD_REG_BIT (old->reg_set, i); | |
| 2426 emit_insn_before (gen_rtx_SET (VOIDmode, | |
| 2427 FP_MODE_REG (i, SFmode), not_a_num), insn); | |
| 2428 } | |
| 2429 | |
| 2430 /* Pop any registers that are not needed in the new block. */ | |
| 2431 | |
| 2432 /* If the destination block's stack already has a specified layout | |
| 2433 and contains two or more registers, use a more intelligent algorithm | |
| 2434 to pop registers that minimizes the number number of fxchs below. */ | |
| 2435 if (new_stack->top > 0) | |
| 2436 { | |
| 2437 bool slots[REG_STACK_SIZE]; | |
| 2438 int pops[REG_STACK_SIZE]; | |
| 2439 int next, dest, topsrc; | |
| 2440 | |
| 2441 /* First pass to determine the free slots. */ | |
| 2442 for (reg = 0; reg <= new_stack->top; reg++) | |
| 2443 slots[reg] = TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]); | |
| 2444 | |
| 2445 /* Second pass to allocate preferred slots. */ | |
| 2446 topsrc = -1; | |
| 2447 for (reg = old->top; reg > new_stack->top; reg--) | |
| 2448 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg])) | |
| 2449 { | |
| 2450 dest = -1; | |
| 2451 for (next = 0; next <= new_stack->top; next++) | |
| 2452 if (!slots[next] && new_stack->reg[next] == old->reg[reg]) | |
| 2453 { | |
| 2454 /* If this is a preference for the new top of stack, record | |
| 2455 the fact by remembering it's old->reg in topsrc. */ | |
| 2456 if (next == new_stack->top) | |
| 2457 topsrc = reg; | |
| 2458 slots[next] = true; | |
| 2459 dest = next; | |
| 2460 break; | |
| 2461 } | |
| 2462 pops[reg] = dest; | |
| 2463 } | |
| 2464 else | |
| 2465 pops[reg] = reg; | |
| 2466 | |
| 2467 /* Intentionally, avoid placing the top of stack in it's correct | |
| 2468 location, if we still need to permute the stack below and we | |
| 2469 can usefully place it somewhere else. This is the case if any | |
| 2470 slot is still unallocated, in which case we should place the | |
| 2471 top of stack there. */ | |
| 2472 if (topsrc != -1) | |
| 2473 for (reg = 0; reg < new_stack->top; reg++) | |
| 2474 if (!slots[reg]) | |
| 2475 { | |
| 2476 pops[topsrc] = reg; | |
| 2477 slots[new_stack->top] = false; | |
| 2478 slots[reg] = true; | |
| 2479 break; | |
| 2480 } | |
| 2481 | |
| 2482 /* Third pass allocates remaining slots and emits pop insns. */ | |
| 2483 next = new_stack->top; | |
| 2484 for (reg = old->top; reg > new_stack->top; reg--) | |
| 2485 { | |
| 2486 dest = pops[reg]; | |
| 2487 if (dest == -1) | |
| 2488 { | |
| 2489 /* Find next free slot. */ | |
| 2490 while (slots[next]) | |
| 2491 next--; | |
| 2492 dest = next--; | |
| 2493 } | |
| 2494 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode), | |
| 2495 EMIT_BEFORE); | |
| 2496 } | |
| 2497 } | |
| 2498 else | |
| 2499 { | |
| 2500 /* The following loop attempts to maximize the number of times we | |
| 2501 pop the top of the stack, as this permits the use of the faster | |
| 2502 ffreep instruction on platforms that support it. */ | |
| 2503 int live, next; | |
| 2504 | |
| 2505 live = 0; | |
| 2506 for (reg = 0; reg <= old->top; reg++) | |
| 2507 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg])) | |
| 2508 live++; | |
| 2509 | |
| 2510 next = live; | |
| 2511 while (old->top >= live) | |
| 2512 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[old->top])) | |
| 2513 { | |
| 2514 while (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[next])) | |
| 2515 next--; | |
| 2516 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode), | |
| 2517 EMIT_BEFORE); | |
| 2518 } | |
| 2519 else | |
| 2520 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode), | |
| 2521 EMIT_BEFORE); | |
| 2522 } | |
| 2523 | |
| 2524 if (new_stack->top == -2) | |
| 2525 { | |
| 2526 /* If the new block has never been processed, then it can inherit | |
| 2527 the old stack order. */ | |
| 2528 | |
| 2529 new_stack->top = old->top; | |
| 2530 memcpy (new_stack->reg, old->reg, sizeof (new_stack->reg)); | |
| 2531 } | |
| 2532 else | |
| 2533 { | |
| 2534 /* This block has been entered before, and we must match the | |
| 2535 previously selected stack order. */ | |
| 2536 | |
| 2537 /* By now, the only difference should be the order of the stack, | |
| 2538 not their depth or liveliness. */ | |
| 2539 | |
| 2540 gcc_assert (hard_reg_set_equal_p (old->reg_set, new_stack->reg_set)); | |
| 2541 gcc_assert (old->top == new_stack->top); | |
| 2542 | |
| 2543 /* If the stack is not empty (new_stack->top != -1), loop here emitting | |
| 2544 swaps until the stack is correct. | |
| 2545 | |
| 2546 The worst case number of swaps emitted is N + 2, where N is the | |
| 2547 depth of the stack. In some cases, the reg at the top of | |
| 2548 stack may be correct, but swapped anyway in order to fix | |
| 2549 other regs. But since we never swap any other reg away from | |
| 2550 its correct slot, this algorithm will converge. */ | |
| 2551 | |
| 2552 if (new_stack->top != -1) | |
| 2553 do | |
| 2554 { | |
| 2555 /* Swap the reg at top of stack into the position it is | |
| 2556 supposed to be in, until the correct top of stack appears. */ | |
| 2557 | |
| 2558 while (old->reg[old->top] != new_stack->reg[new_stack->top]) | |
| 2559 { | |
| 2560 for (reg = new_stack->top; reg >= 0; reg--) | |
| 2561 if (new_stack->reg[reg] == old->reg[old->top]) | |
| 2562 break; | |
| 2563 | |
| 2564 gcc_assert (reg != -1); | |
| 2565 | |
| 2566 emit_swap_insn (insn, old, | |
| 2567 FP_MODE_REG (old->reg[reg], DFmode)); | |
| 2568 } | |
| 2569 | |
| 2570 /* See if any regs remain incorrect. If so, bring an | |
| 2571 incorrect reg to the top of stack, and let the while loop | |
| 2572 above fix it. */ | |
| 2573 | |
| 2574 for (reg = new_stack->top; reg >= 0; reg--) | |
| 2575 if (new_stack->reg[reg] != old->reg[reg]) | |
| 2576 { | |
| 2577 emit_swap_insn (insn, old, | |
| 2578 FP_MODE_REG (old->reg[reg], DFmode)); | |
| 2579 break; | |
| 2580 } | |
| 2581 } while (reg >= 0); | |
| 2582 | |
| 2583 /* At this point there must be no differences. */ | |
| 2584 | |
| 2585 for (reg = old->top; reg >= 0; reg--) | |
| 2586 gcc_assert (old->reg[reg] == new_stack->reg[reg]); | |
| 2587 } | |
| 2588 | |
| 2589 if (update_end) | |
| 2590 BB_END (current_block) = PREV_INSN (insn); | |
| 2591 } | |
| 2592 | |
| 2593 /* Print stack configuration. */ | |
| 2594 | |
| 2595 static void | |
| 2596 print_stack (FILE *file, stack s) | |
| 2597 { | |
| 2598 if (! file) | |
| 2599 return; | |
| 2600 | |
| 2601 if (s->top == -2) | |
| 2602 fprintf (file, "uninitialized\n"); | |
| 2603 else if (s->top == -1) | |
| 2604 fprintf (file, "empty\n"); | |
| 2605 else | |
| 2606 { | |
| 2607 int i; | |
| 2608 fputs ("[ ", file); | |
| 2609 for (i = 0; i <= s->top; ++i) | |
| 2610 fprintf (file, "%d ", s->reg[i]); | |
| 2611 fputs ("]\n", file); | |
| 2612 } | |
| 2613 } | |
| 2614 | |
| 2615 /* This function was doing life analysis. We now let the regular live | |
| 2616 code do it's job, so we only need to check some extra invariants | |
| 2617 that reg-stack expects. Primary among these being that all registers | |
| 2618 are initialized before use. | |
| 2619 | |
| 2620 The function returns true when code was emitted to CFG edges and | |
| 2621 commit_edge_insertions needs to be called. */ | |
| 2622 | |
| 2623 static int | |
| 2624 convert_regs_entry (void) | |
| 2625 { | |
| 2626 int inserted = 0; | |
| 2627 edge e; | |
| 2628 edge_iterator ei; | |
| 2629 | |
| 2630 /* Load something into each stack register live at function entry. | |
| 2631 Such live registers can be caused by uninitialized variables or | |
| 2632 functions not returning values on all paths. In order to keep | |
| 2633 the push/pop code happy, and to not scrog the register stack, we | |
| 2634 must put something in these registers. Use a QNaN. | |
| 2635 | |
| 2636 Note that we are inserting converted code here. This code is | |
| 2637 never seen by the convert_regs pass. */ | |
| 2638 | |
| 2639 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs) | |
| 2640 { | |
| 2641 basic_block block = e->dest; | |
| 2642 block_info bi = BLOCK_INFO (block); | |
| 2643 int reg, top = -1; | |
| 2644 | |
| 2645 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) | |
| 2646 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) | |
| 2647 { | |
| 2648 rtx init; | |
| 2649 | |
| 2650 bi->stack_in.reg[++top] = reg; | |
| 2651 | |
| 2652 init = gen_rtx_SET (VOIDmode, | |
| 2653 FP_MODE_REG (FIRST_STACK_REG, SFmode), | |
| 2654 not_a_num); | |
| 2655 insert_insn_on_edge (init, e); | |
| 2656 inserted = 1; | |
| 2657 } | |
| 2658 | |
| 2659 bi->stack_in.top = top; | |
| 2660 } | |
| 2661 | |
| 2662 return inserted; | |
| 2663 } | |
| 2664 | |
| 2665 /* Construct the desired stack for function exit. This will either | |
| 2666 be `empty', or the function return value at top-of-stack. */ | |
| 2667 | |
| 2668 static void | |
| 2669 convert_regs_exit (void) | |
| 2670 { | |
| 2671 int value_reg_low, value_reg_high; | |
| 2672 stack output_stack; | |
| 2673 rtx retvalue; | |
| 2674 | |
| 2675 retvalue = stack_result (current_function_decl); | |
| 2676 value_reg_low = value_reg_high = -1; | |
| 2677 if (retvalue) | |
| 2678 { | |
| 2679 value_reg_low = REGNO (retvalue); | |
| 2680 value_reg_high = END_HARD_REGNO (retvalue) - 1; | |
| 2681 } | |
| 2682 | |
| 2683 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in; | |
| 2684 if (value_reg_low == -1) | |
| 2685 output_stack->top = -1; | |
| 2686 else | |
| 2687 { | |
| 2688 int reg; | |
| 2689 | |
| 2690 output_stack->top = value_reg_high - value_reg_low; | |
| 2691 for (reg = value_reg_low; reg <= value_reg_high; ++reg) | |
| 2692 { | |
| 2693 output_stack->reg[value_reg_high - reg] = reg; | |
| 2694 SET_HARD_REG_BIT (output_stack->reg_set, reg); | |
| 2695 } | |
| 2696 } | |
| 2697 } | |
| 2698 | |
| 2699 /* Copy the stack info from the end of edge E's source block to the | |
| 2700 start of E's destination block. */ | |
| 2701 | |
| 2702 static void | |
| 2703 propagate_stack (edge e) | |
| 2704 { | |
| 2705 stack src_stack = &BLOCK_INFO (e->src)->stack_out; | |
| 2706 stack dest_stack = &BLOCK_INFO (e->dest)->stack_in; | |
| 2707 int reg; | |
| 2708 | |
| 2709 /* Preserve the order of the original stack, but check whether | |
| 2710 any pops are needed. */ | |
| 2711 dest_stack->top = -1; | |
| 2712 for (reg = 0; reg <= src_stack->top; ++reg) | |
| 2713 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg])) | |
| 2714 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg]; | |
| 2715 | |
| 2716 /* Push in any partially dead values. */ | |
| 2717 for (reg = FIRST_STACK_REG; reg < LAST_STACK_REG + 1; reg++) | |
| 2718 if (TEST_HARD_REG_BIT (dest_stack->reg_set, reg) | |
| 2719 && !TEST_HARD_REG_BIT (src_stack->reg_set, reg)) | |
| 2720 dest_stack->reg[++dest_stack->top] = reg; | |
| 2721 } | |
| 2722 | |
| 2723 | |
| 2724 /* Adjust the stack of edge E's source block on exit to match the stack | |
| 2725 of it's target block upon input. The stack layouts of both blocks | |
| 2726 should have been defined by now. */ | |
| 2727 | |
| 2728 static bool | |
| 2729 compensate_edge (edge e) | |
| 2730 { | |
| 2731 basic_block source = e->src, target = e->dest; | |
| 2732 stack target_stack = &BLOCK_INFO (target)->stack_in; | |
| 2733 stack source_stack = &BLOCK_INFO (source)->stack_out; | |
| 2734 struct stack_def regstack; | |
| 2735 int reg; | |
| 2736 | |
| 2737 if (dump_file) | |
| 2738 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index); | |
| 2739 | |
| 2740 gcc_assert (target_stack->top != -2); | |
| 2741 | |
| 2742 /* Check whether stacks are identical. */ | |
| 2743 if (target_stack->top == source_stack->top) | |
| 2744 { | |
| 2745 for (reg = target_stack->top; reg >= 0; --reg) | |
| 2746 if (target_stack->reg[reg] != source_stack->reg[reg]) | |
| 2747 break; | |
| 2748 | |
| 2749 if (reg == -1) | |
| 2750 { | |
| 2751 if (dump_file) | |
| 2752 fprintf (dump_file, "no changes needed\n"); | |
| 2753 return false; | |
| 2754 } | |
| 2755 } | |
| 2756 | |
| 2757 if (dump_file) | |
| 2758 { | |
| 2759 fprintf (dump_file, "correcting stack to "); | |
| 2760 print_stack (dump_file, target_stack); | |
| 2761 } | |
| 2762 | |
| 2763 /* Abnormal calls may appear to have values live in st(0), but the | |
| 2764 abnormal return path will not have actually loaded the values. */ | |
| 2765 if (e->flags & EDGE_ABNORMAL_CALL) | |
| 2766 { | |
| 2767 /* Assert that the lifetimes are as we expect -- one value | |
| 2768 live at st(0) on the end of the source block, and no | |
| 2769 values live at the beginning of the destination block. | |
| 2770 For complex return values, we may have st(1) live as well. */ | |
| 2771 gcc_assert (source_stack->top == 0 || source_stack->top == 1); | |
| 2772 gcc_assert (target_stack->top == -1); | |
| 2773 return false; | |
| 2774 } | |
| 2775 | |
| 2776 /* Handle non-call EH edges specially. The normal return path have | |
| 2777 values in registers. These will be popped en masse by the unwind | |
| 2778 library. */ | |
| 2779 if (e->flags & EDGE_EH) | |
| 2780 { | |
| 2781 gcc_assert (target_stack->top == -1); | |
| 2782 return false; | |
| 2783 } | |
| 2784 | |
| 2785 /* We don't support abnormal edges. Global takes care to | |
| 2786 avoid any live register across them, so we should never | |
| 2787 have to insert instructions on such edges. */ | |
| 2788 gcc_assert (! (e->flags & EDGE_ABNORMAL)); | |
| 2789 | |
| 2790 /* Make a copy of source_stack as change_stack is destructive. */ | |
| 2791 regstack = *source_stack; | |
| 2792 | |
| 2793 /* It is better to output directly to the end of the block | |
| 2794 instead of to the edge, because emit_swap can do minimal | |
| 2795 insn scheduling. We can do this when there is only one | |
| 2796 edge out, and it is not abnormal. */ | |
| 2797 if (EDGE_COUNT (source->succs) == 1) | |
| 2798 { | |
| 2799 current_block = source; | |
| 2800 change_stack (BB_END (source), ®stack, target_stack, | |
| 2801 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER)); | |
| 2802 } | |
| 2803 else | |
| 2804 { | |
| 2805 rtx seq, after; | |
| 2806 | |
| 2807 current_block = NULL; | |
| 2808 start_sequence (); | |
| 2809 | |
| 2810 /* ??? change_stack needs some point to emit insns after. */ | |
| 2811 after = emit_note (NOTE_INSN_DELETED); | |
| 2812 | |
| 2813 change_stack (after, ®stack, target_stack, EMIT_BEFORE); | |
| 2814 | |
| 2815 seq = get_insns (); | |
| 2816 end_sequence (); | |
| 2817 | |
| 2818 insert_insn_on_edge (seq, e); | |
| 2819 return true; | |
| 2820 } | |
| 2821 return false; | |
| 2822 } | |
| 2823 | |
| 2824 /* Traverse all non-entry edges in the CFG, and emit the necessary | |
| 2825 edge compensation code to change the stack from stack_out of the | |
| 2826 source block to the stack_in of the destination block. */ | |
| 2827 | |
| 2828 static bool | |
| 2829 compensate_edges (void) | |
| 2830 { | |
| 2831 bool inserted = false; | |
| 2832 basic_block bb; | |
| 2833 | |
| 2834 starting_stack_p = false; | |
| 2835 | |
| 2836 FOR_EACH_BB (bb) | |
| 2837 if (bb != ENTRY_BLOCK_PTR) | |
| 2838 { | |
| 2839 edge e; | |
| 2840 edge_iterator ei; | |
| 2841 | |
| 2842 FOR_EACH_EDGE (e, ei, bb->succs) | |
| 2843 inserted |= compensate_edge (e); | |
| 2844 } | |
| 2845 return inserted; | |
| 2846 } | |
| 2847 | |
| 2848 /* Select the better of two edges E1 and E2 to use to determine the | |
| 2849 stack layout for their shared destination basic block. This is | |
| 2850 typically the more frequently executed. The edge E1 may be NULL | |
| 2851 (in which case E2 is returned), but E2 is always non-NULL. */ | |
| 2852 | |
| 2853 static edge | |
| 2854 better_edge (edge e1, edge e2) | |
| 2855 { | |
| 2856 if (!e1) | |
| 2857 return e2; | |
| 2858 | |
| 2859 if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2)) | |
| 2860 return e1; | |
| 2861 if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2)) | |
| 2862 return e2; | |
| 2863 | |
| 2864 if (e1->count > e2->count) | |
| 2865 return e1; | |
| 2866 if (e1->count < e2->count) | |
| 2867 return e2; | |
| 2868 | |
| 2869 /* Prefer critical edges to minimize inserting compensation code on | |
| 2870 critical edges. */ | |
| 2871 | |
| 2872 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2)) | |
| 2873 return EDGE_CRITICAL_P (e1) ? e1 : e2; | |
| 2874 | |
| 2875 /* Avoid non-deterministic behavior. */ | |
| 2876 return (e1->src->index < e2->src->index) ? e1 : e2; | |
| 2877 } | |
| 2878 | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
2879 /* Convert stack register references in one block. Return true if the CFG |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
2880 has been modified in the process. */ |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
2881 |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
2882 static bool |
| 0 | 2883 convert_regs_1 (basic_block block) |
| 2884 { | |
| 2885 struct stack_def regstack; | |
| 2886 block_info bi = BLOCK_INFO (block); | |
| 2887 int reg; | |
| 2888 rtx insn, next; | |
| 2889 bool control_flow_insn_deleted = false; | |
|
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|
2890 bool cfg_altered = false; |
|
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|
2891 int debug_insns_with_starting_stack = 0; |
| 0 | 2892 |
| 2893 any_malformed_asm = false; | |
| 2894 | |
| 2895 /* Choose an initial stack layout, if one hasn't already been chosen. */ | |
| 2896 if (bi->stack_in.top == -2) | |
| 2897 { | |
| 2898 edge e, beste = NULL; | |
| 2899 edge_iterator ei; | |
| 2900 | |
| 2901 /* Select the best incoming edge (typically the most frequent) to | |
| 2902 use as a template for this basic block. */ | |
| 2903 FOR_EACH_EDGE (e, ei, block->preds) | |
| 2904 if (BLOCK_INFO (e->src)->done) | |
| 2905 beste = better_edge (beste, e); | |
| 2906 | |
| 2907 if (beste) | |
| 2908 propagate_stack (beste); | |
| 2909 else | |
| 2910 { | |
| 2911 /* No predecessors. Create an arbitrary input stack. */ | |
| 2912 bi->stack_in.top = -1; | |
| 2913 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) | |
| 2914 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) | |
| 2915 bi->stack_in.reg[++bi->stack_in.top] = reg; | |
| 2916 } | |
| 2917 } | |
| 2918 | |
| 2919 if (dump_file) | |
| 2920 { | |
| 2921 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index); | |
| 2922 print_stack (dump_file, &bi->stack_in); | |
| 2923 } | |
| 2924 | |
| 2925 /* Process all insns in this block. Keep track of NEXT so that we | |
| 2926 don't process insns emitted while substituting in INSN. */ | |
| 2927 current_block = block; | |
| 2928 next = BB_HEAD (block); | |
| 2929 regstack = bi->stack_in; | |
| 2930 starting_stack_p = true; | |
| 2931 | |
| 2932 do | |
| 2933 { | |
| 2934 insn = next; | |
| 2935 next = NEXT_INSN (insn); | |
| 2936 | |
| 2937 /* Ensure we have not missed a block boundary. */ | |
| 2938 gcc_assert (next); | |
| 2939 if (insn == BB_END (block)) | |
| 2940 next = NULL; | |
| 2941 | |
| 2942 /* Don't bother processing unless there is a stack reg | |
| 2943 mentioned or if it's a CALL_INSN. */ | |
|
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|
2944 if (DEBUG_INSN_P (insn)) |
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|
2945 { |
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|
2946 if (starting_stack_p) |
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|
2947 debug_insns_with_starting_stack++; |
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|
2948 else |
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2949 { |
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|
2950 for_each_rtx (&PATTERN (insn), subst_stack_regs_in_debug_insn, |
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|
2951 ®stack); |
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|
2952 |
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|
2953 /* Nothing must ever die at a debug insn. If something |
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|
2954 is referenced in it that becomes dead, it should have |
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|
2955 died before and the reference in the debug insn |
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|
2956 should have been removed so as to avoid changing code |
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|
2957 generation. */ |
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2958 gcc_assert (!find_reg_note (insn, REG_DEAD, NULL)); |
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2959 } |
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2960 } |
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|
2961 else if (stack_regs_mentioned (insn) |
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|
2962 || CALL_P (insn)) |
| 0 | 2963 { |
| 2964 if (dump_file) | |
| 2965 { | |
| 2966 fprintf (dump_file, " insn %d input stack: ", | |
| 2967 INSN_UID (insn)); | |
| 2968 print_stack (dump_file, ®stack); | |
| 2969 } | |
| 2970 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); | |
| 2971 starting_stack_p = false; | |
| 2972 } | |
| 2973 } | |
| 2974 while (next); | |
| 2975 | |
|
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|
2976 if (debug_insns_with_starting_stack) |
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2977 { |
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|
2978 /* Since it's the first non-debug instruction that determines |
|
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|
2979 the stack requirements of the current basic block, we refrain |
|
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|
2980 from updating debug insns before it in the loop above, and |
|
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|
2981 fix them up here. */ |
|
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2982 for (insn = BB_HEAD (block); debug_insns_with_starting_stack; |
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2983 insn = NEXT_INSN (insn)) |
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2984 { |
|
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2985 if (!DEBUG_INSN_P (insn)) |
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2986 continue; |
|
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2987 |
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2988 debug_insns_with_starting_stack--; |
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2989 for_each_rtx (&PATTERN (insn), subst_stack_regs_in_debug_insn, |
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2990 &bi->stack_in); |
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2991 } |
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2992 } |
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2993 |
| 0 | 2994 if (dump_file) |
| 2995 { | |
| 2996 fprintf (dump_file, "Expected live registers ["); | |
| 2997 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) | |
| 2998 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)) | |
| 2999 fprintf (dump_file, " %d", reg); | |
| 3000 fprintf (dump_file, " ]\nOutput stack: "); | |
| 3001 print_stack (dump_file, ®stack); | |
| 3002 } | |
| 3003 | |
| 3004 insn = BB_END (block); | |
| 3005 if (JUMP_P (insn)) | |
| 3006 insn = PREV_INSN (insn); | |
| 3007 | |
| 3008 /* If the function is declared to return a value, but it returns one | |
| 3009 in only some cases, some registers might come live here. Emit | |
| 3010 necessary moves for them. */ | |
| 3011 | |
| 3012 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) | |
| 3013 { | |
| 3014 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg) | |
| 3015 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg)) | |
| 3016 { | |
| 3017 rtx set; | |
| 3018 | |
| 3019 if (dump_file) | |
| 3020 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg); | |
| 3021 | |
| 3022 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), not_a_num); | |
| 3023 insn = emit_insn_after (set, insn); | |
| 3024 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); | |
| 3025 } | |
| 3026 } | |
|
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|
3027 |
| 0 | 3028 /* Amongst the insns possibly deleted during the substitution process above, |
| 3029 might have been the only trapping insn in the block. We purge the now | |
| 3030 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges, | |
| 3031 called at the end of convert_regs. The order in which we process the | |
| 3032 blocks ensures that we never delete an already processed edge. | |
| 3033 | |
| 3034 Note that, at this point, the CFG may have been damaged by the emission | |
| 3035 of instructions after an abnormal call, which moves the basic block end | |
| 3036 (and is the reason why we call fixup_abnormal_edges later). So we must | |
| 3037 be sure that the trapping insn has been deleted before trying to purge | |
| 3038 dead edges, otherwise we risk purging valid edges. | |
| 3039 | |
| 3040 ??? We are normally supposed not to delete trapping insns, so we pretend | |
| 3041 that the insns deleted above don't actually trap. It would have been | |
| 3042 better to detect this earlier and avoid creating the EH edge in the first | |
| 3043 place, still, but we don't have enough information at that time. */ | |
| 3044 | |
| 3045 if (control_flow_insn_deleted) | |
|
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|
3046 cfg_altered |= purge_dead_edges (block); |
| 0 | 3047 |
| 3048 /* Something failed if the stack lives don't match. If we had malformed | |
| 3049 asms, we zapped the instruction itself, but that didn't produce the | |
| 3050 same pattern of register kills as before. */ | |
|
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|
3051 |
| 0 | 3052 gcc_assert (hard_reg_set_equal_p (regstack.reg_set, bi->out_reg_set) |
| 3053 || any_malformed_asm); | |
| 3054 bi->stack_out = regstack; | |
| 3055 bi->done = true; | |
|
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|
3056 |
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|
3057 return cfg_altered; |
| 0 | 3058 } |
| 3059 | |
|
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|
3060 /* Convert registers in all blocks reachable from BLOCK. Return true if the |
|
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|
3061 CFG has been modified in the process. */ |
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|
3062 |
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|
3063 static bool |
| 0 | 3064 convert_regs_2 (basic_block block) |
| 3065 { | |
| 3066 basic_block *stack, *sp; | |
|
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|
3067 bool cfg_altered = false; |
| 0 | 3068 |
| 3069 /* We process the blocks in a top-down manner, in a way such that one block | |
| 3070 is only processed after all its predecessors. The number of predecessors | |
|
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|
3071 of every block has already been computed. */ |
| 0 | 3072 |
| 3073 stack = XNEWVEC (basic_block, n_basic_blocks); | |
| 3074 sp = stack; | |
| 3075 | |
| 3076 *sp++ = block; | |
| 3077 | |
| 3078 do | |
| 3079 { | |
| 3080 edge e; | |
| 3081 edge_iterator ei; | |
| 3082 | |
| 3083 block = *--sp; | |
| 3084 | |
| 3085 /* Processing BLOCK is achieved by convert_regs_1, which may purge | |
| 3086 some dead EH outgoing edge after the deletion of the trapping | |
| 3087 insn inside the block. Since the number of predecessors of | |
| 3088 BLOCK's successors was computed based on the initial edge set, | |
| 3089 we check the necessity to process some of these successors | |
| 3090 before such an edge deletion may happen. However, there is | |
| 3091 a pitfall: if BLOCK is the only predecessor of a successor and | |
| 3092 the edge between them happens to be deleted, the successor | |
| 3093 becomes unreachable and should not be processed. The problem | |
| 3094 is that there is no way to preventively detect this case so we | |
| 3095 stack the successor in all cases and hand over the task of | |
| 3096 fixing up the discrepancy to convert_regs_1. */ | |
| 3097 | |
| 3098 FOR_EACH_EDGE (e, ei, block->succs) | |
| 3099 if (! (e->flags & EDGE_DFS_BACK)) | |
| 3100 { | |
| 3101 BLOCK_INFO (e->dest)->predecessors--; | |
| 3102 if (!BLOCK_INFO (e->dest)->predecessors) | |
| 3103 *sp++ = e->dest; | |
| 3104 } | |
| 3105 | |
|
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|
3106 cfg_altered |= convert_regs_1 (block); |
| 0 | 3107 } |
| 3108 while (sp != stack); | |
| 3109 | |
| 3110 free (stack); | |
|
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|
3111 |
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|
3112 return cfg_altered; |
| 0 | 3113 } |
| 3114 | |
| 3115 /* Traverse all basic blocks in a function, converting the register | |
| 3116 references in each insn from the "flat" register file that gcc uses, | |
| 3117 to the stack-like registers the 387 uses. */ | |
| 3118 | |
| 3119 static void | |
| 3120 convert_regs (void) | |
| 3121 { | |
|
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|
3122 bool cfg_altered = false; |
| 0 | 3123 int inserted; |
| 3124 basic_block b; | |
| 3125 edge e; | |
| 3126 edge_iterator ei; | |
| 3127 | |
| 3128 /* Initialize uninitialized registers on function entry. */ | |
| 3129 inserted = convert_regs_entry (); | |
| 3130 | |
| 3131 /* Construct the desired stack for function exit. */ | |
| 3132 convert_regs_exit (); | |
| 3133 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1; | |
| 3134 | |
| 3135 /* ??? Future: process inner loops first, and give them arbitrary | |
| 3136 initial stacks which emit_swap_insn can modify. This ought to | |
| 3137 prevent double fxch that often appears at the head of a loop. */ | |
| 3138 | |
| 3139 /* Process all blocks reachable from all entry points. */ | |
| 3140 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs) | |
|
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|
3141 cfg_altered |= convert_regs_2 (e->dest); |
| 0 | 3142 |
| 3143 /* ??? Process all unreachable blocks. Though there's no excuse | |
| 3144 for keeping these even when not optimizing. */ | |
| 3145 FOR_EACH_BB (b) | |
| 3146 { | |
| 3147 block_info bi = BLOCK_INFO (b); | |
| 3148 | |
| 3149 if (! bi->done) | |
|
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|
3150 cfg_altered |= convert_regs_2 (b); |
| 0 | 3151 } |
| 3152 | |
| 3153 inserted |= compensate_edges (); | |
| 3154 | |
| 3155 clear_aux_for_blocks (); | |
| 3156 | |
| 3157 fixup_abnormal_edges (); | |
| 3158 if (inserted) | |
| 3159 commit_edge_insertions (); | |
| 3160 | |
|
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|
3161 if (cfg_altered) |
|
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|
3162 cleanup_cfg (0); |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
3163 |
| 0 | 3164 if (dump_file) |
| 3165 fputc ('\n', dump_file); | |
| 3166 } | |
| 3167 | |
| 3168 /* Convert register usage from "flat" register file usage to a "stack | |
| 3169 register file. FILE is the dump file, if used. | |
| 3170 | |
| 3171 Construct a CFG and run life analysis. Then convert each insn one | |
| 3172 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate | |
| 3173 code duplication created when the converter inserts pop insns on | |
| 3174 the edges. */ | |
| 3175 | |
| 3176 static bool | |
| 3177 reg_to_stack (void) | |
| 3178 { | |
| 3179 basic_block bb; | |
| 3180 int i; | |
| 3181 int max_uid; | |
| 3182 | |
| 3183 /* Clean up previous run. */ | |
| 3184 if (stack_regs_mentioned_data != NULL) | |
| 3185 VEC_free (char, heap, stack_regs_mentioned_data); | |
| 3186 | |
| 3187 /* See if there is something to do. Flow analysis is quite | |
| 3188 expensive so we might save some compilation time. */ | |
| 3189 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
| 3190 if (df_regs_ever_live_p (i)) | |
| 3191 break; | |
| 3192 if (i > LAST_STACK_REG) | |
| 3193 return false; | |
| 3194 | |
| 3195 df_note_add_problem (); | |
| 3196 df_analyze (); | |
| 3197 | |
| 3198 mark_dfs_back_edges (); | |
| 3199 | |
| 3200 /* Set up block info for each basic block. */ | |
| 3201 alloc_aux_for_blocks (sizeof (struct block_info_def)); | |
| 3202 FOR_EACH_BB (bb) | |
| 3203 { | |
| 3204 block_info bi = BLOCK_INFO (bb); | |
| 3205 edge_iterator ei; | |
| 3206 edge e; | |
| 3207 int reg; | |
| 3208 | |
| 3209 FOR_EACH_EDGE (e, ei, bb->preds) | |
| 3210 if (!(e->flags & EDGE_DFS_BACK) | |
| 3211 && e->src != ENTRY_BLOCK_PTR) | |
| 3212 bi->predecessors++; | |
| 3213 | |
| 3214 /* Set current register status at last instruction `uninitialized'. */ | |
| 3215 bi->stack_in.top = -2; | |
| 3216 | |
| 3217 /* Copy live_at_end and live_at_start into temporaries. */ | |
| 3218 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) | |
| 3219 { | |
| 3220 if (REGNO_REG_SET_P (DF_LR_OUT (bb), reg)) | |
| 3221 SET_HARD_REG_BIT (bi->out_reg_set, reg); | |
| 3222 if (REGNO_REG_SET_P (DF_LR_IN (bb), reg)) | |
| 3223 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg); | |
| 3224 } | |
| 3225 } | |
| 3226 | |
| 3227 /* Create the replacement registers up front. */ | |
| 3228 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
| 3229 { | |
| 3230 enum machine_mode mode; | |
| 3231 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); | |
| 3232 mode != VOIDmode; | |
| 3233 mode = GET_MODE_WIDER_MODE (mode)) | |
| 3234 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); | |
| 3235 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); | |
| 3236 mode != VOIDmode; | |
| 3237 mode = GET_MODE_WIDER_MODE (mode)) | |
| 3238 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); | |
| 3239 } | |
| 3240 | |
| 3241 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG); | |
| 3242 | |
| 3243 /* A QNaN for initializing uninitialized variables. | |
| 3244 | |
| 3245 ??? We can't load from constant memory in PIC mode, because | |
| 3246 we're inserting these instructions before the prologue and | |
| 3247 the PIC register hasn't been set up. In that case, fall back | |
| 3248 on zero, which we can get from `fldz'. */ | |
| 3249 | |
| 3250 if ((flag_pic && !TARGET_64BIT) | |
| 3251 || ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC) | |
| 3252 not_a_num = CONST0_RTX (SFmode); | |
| 3253 else | |
| 3254 { | |
| 3255 REAL_VALUE_TYPE r; | |
| 3256 | |
| 3257 real_nan (&r, "", 1, SFmode); | |
| 3258 not_a_num = CONST_DOUBLE_FROM_REAL_VALUE (r, SFmode); | |
| 3259 not_a_num = force_const_mem (SFmode, not_a_num); | |
| 3260 } | |
| 3261 | |
| 3262 /* Allocate a cache for stack_regs_mentioned. */ | |
| 3263 max_uid = get_max_uid (); | |
| 3264 stack_regs_mentioned_data = VEC_alloc (char, heap, max_uid + 1); | |
| 3265 memset (VEC_address (char, stack_regs_mentioned_data), | |
| 3266 0, sizeof (char) * (max_uid + 1)); | |
| 3267 | |
| 3268 convert_regs (); | |
| 3269 | |
| 3270 free_aux_for_blocks (); | |
| 3271 return true; | |
| 3272 } | |
| 3273 #endif /* STACK_REGS */ | |
| 3274 | |
| 3275 static bool | |
| 3276 gate_handle_stack_regs (void) | |
| 3277 { | |
| 3278 #ifdef STACK_REGS | |
| 3279 return 1; | |
| 3280 #else | |
| 3281 return 0; | |
| 3282 #endif | |
| 3283 } | |
| 3284 | |
| 3285 struct rtl_opt_pass pass_stack_regs = | |
| 3286 { | |
| 3287 { | |
| 3288 RTL_PASS, | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
19
diff
changeset
|
3289 "*stack_regs", /* name */ |
| 0 | 3290 gate_handle_stack_regs, /* gate */ |
| 3291 NULL, /* execute */ | |
| 3292 NULL, /* sub */ | |
| 3293 NULL, /* next */ | |
| 3294 0, /* static_pass_number */ | |
| 3295 TV_REG_STACK, /* tv_id */ | |
| 3296 0, /* properties_required */ | |
| 3297 0, /* properties_provided */ | |
| 3298 0, /* properties_destroyed */ | |
| 3299 0, /* todo_flags_start */ | |
| 3300 0 /* todo_flags_finish */ | |
| 3301 } | |
| 3302 }; | |
| 3303 | |
| 3304 /* Convert register usage from flat register file usage to a stack | |
| 3305 register file. */ | |
| 3306 static unsigned int | |
| 3307 rest_of_handle_stack_regs (void) | |
| 3308 { | |
| 3309 #ifdef STACK_REGS | |
| 3310 reg_to_stack (); | |
| 3311 regstack_completed = 1; | |
| 3312 #endif | |
| 3313 return 0; | |
| 3314 } | |
| 3315 | |
| 3316 struct rtl_opt_pass pass_stack_regs_run = | |
| 3317 { | |
| 3318 { | |
| 3319 RTL_PASS, | |
| 3320 "stack", /* name */ | |
| 3321 NULL, /* gate */ | |
| 3322 rest_of_handle_stack_regs, /* execute */ | |
| 3323 NULL, /* sub */ | |
| 3324 NULL, /* next */ | |
| 3325 0, /* static_pass_number */ | |
| 3326 TV_REG_STACK, /* tv_id */ | |
| 3327 0, /* properties_required */ | |
| 3328 0, /* properties_provided */ | |
| 3329 0, /* properties_destroyed */ | |
| 3330 0, /* todo_flags_start */ | |
| 3331 TODO_df_finish | TODO_verify_rtl_sharing | | |
| 3332 TODO_dump_func | | |
| 3333 TODO_ggc_collect /* todo_flags_finish */ | |
| 3334 } | |
| 3335 }; |