Mercurial > hg > CbC > CbC_gcc
annotate gcc/ira-int.h @ 128:fe568345ddd5
fix CbC-example
| author | mir3636 |
|---|---|
| date | Wed, 11 Apr 2018 19:32:28 +0900 |
| parents | 04ced10e8804 |
| children | 84e7813d76e9 |
| rev | line source |
|---|---|
| 0 | 1 /* Integrated Register Allocator (IRA) intercommunication header file. |
| 111 | 2 Copyright (C) 2006-2017 Free Software Foundation, Inc. |
| 0 | 3 Contributed by Vladimir Makarov <vmakarov@redhat.com>. |
| 4 | |
| 5 This file is part of GCC. | |
| 6 | |
| 7 GCC is free software; you can redistribute it and/or modify it under | |
| 8 the terms of the GNU General Public License as published by the Free | |
| 9 Software Foundation; either version 3, or (at your option) any later | |
| 10 version. | |
| 11 | |
| 12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
| 13 WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 15 for more details. | |
| 16 | |
| 17 You should have received a copy of the GNU General Public License | |
| 18 along with GCC; see the file COPYING3. If not see | |
| 19 <http://www.gnu.org/licenses/>. */ | |
| 20 | |
| 111 | 21 #ifndef GCC_IRA_INT_H |
| 22 #define GCC_IRA_INT_H | |
| 23 | |
| 24 #include "recog.h" | |
| 0 | 25 |
| 26 /* To provide consistency in naming, all IRA external variables, | |
| 27 functions, common typedefs start with prefix ira_. */ | |
| 28 | |
| 111 | 29 #if CHECKING_P |
| 0 | 30 #define ENABLE_IRA_CHECKING |
| 31 #endif | |
| 32 | |
| 33 #ifdef ENABLE_IRA_CHECKING | |
| 34 #define ira_assert(c) gcc_assert (c) | |
| 35 #else | |
| 36 /* Always define and include C, so that warnings for empty body in an | |
| 111 | 37 'if' statement and unused variable do not occur. */ |
| 0 | 38 #define ira_assert(c) ((void)(0 && (c))) |
| 39 #endif | |
| 40 | |
| 41 /* Compute register frequency from edge frequency FREQ. It is | |
| 42 analogous to REG_FREQ_FROM_BB. When optimizing for size, or | |
| 43 profile driven feedback is available and the function is never | |
| 44 executed, frequency is always equivalent. Otherwise rescale the | |
| 45 edge frequency. */ | |
| 111 | 46 #define REG_FREQ_FROM_EDGE_FREQ(freq) \ |
| 47 (optimize_function_for_size_p (cfun) \ | |
| 48 ? REG_FREQ_MAX : (freq * REG_FREQ_MAX / BB_FREQ_MAX) \ | |
| 0 | 49 ? (freq * REG_FREQ_MAX / BB_FREQ_MAX) : 1) |
| 50 | |
| 51 /* A modified value of flag `-fira-verbose' used internally. */ | |
| 52 extern int internal_flag_ira_verbose; | |
| 53 | |
| 54 /* Dump file of the allocator if it is not NULL. */ | |
| 55 extern FILE *ira_dump_file; | |
| 56 | |
| 57 /* Typedefs for pointers to allocno live range, allocno, and copy of | |
| 58 allocnos. */ | |
|
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59 typedef struct live_range *live_range_t; |
| 0 | 60 typedef struct ira_allocno *ira_allocno_t; |
| 111 | 61 typedef struct ira_allocno_pref *ira_pref_t; |
| 0 | 62 typedef struct ira_allocno_copy *ira_copy_t; |
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63 typedef struct ira_object *ira_object_t; |
| 0 | 64 |
| 65 /* Definition of vector of allocnos and copies. */ | |
| 66 | |
| 67 /* Typedef for pointer to the subsequent structure. */ | |
| 68 typedef struct ira_loop_tree_node *ira_loop_tree_node_t; | |
| 69 | |
| 111 | 70 typedef unsigned short move_table[N_REG_CLASSES]; |
| 71 | |
| 0 | 72 /* In general case, IRA is a regional allocator. The regions are |
| 73 nested and form a tree. Currently regions are natural loops. The | |
| 74 following structure describes loop tree node (representing basic | |
| 75 block or loop). We need such tree because the loop tree from | |
| 76 cfgloop.h is not convenient for the optimization: basic blocks are | |
| 77 not a part of the tree from cfgloop.h. We also use the nodes for | |
| 78 storing additional information about basic blocks/loops for the | |
| 79 register allocation purposes. */ | |
| 80 struct ira_loop_tree_node | |
| 81 { | |
| 82 /* The node represents basic block if children == NULL. */ | |
| 83 basic_block bb; /* NULL for loop. */ | |
| 111 | 84 /* NULL for BB or for loop tree root if we did not build CFG loop tree. */ |
| 85 struct loop *loop; | |
| 0 | 86 /* NEXT/SUBLOOP_NEXT is the next node/loop-node of the same parent. |
| 87 SUBLOOP_NEXT is always NULL for BBs. */ | |
| 88 ira_loop_tree_node_t subloop_next, next; | |
| 89 /* CHILDREN/SUBLOOPS is the first node/loop-node immediately inside | |
| 90 the node. They are NULL for BBs. */ | |
| 91 ira_loop_tree_node_t subloops, children; | |
| 92 /* The node immediately containing given node. */ | |
| 93 ira_loop_tree_node_t parent; | |
| 94 | |
| 95 /* Loop level in range [0, ira_loop_tree_height). */ | |
| 96 int level; | |
| 97 | |
| 98 /* All the following members are defined only for nodes representing | |
| 99 loops. */ | |
| 100 | |
| 111 | 101 /* The loop number from CFG loop tree. The root number is 0. */ |
| 102 int loop_num; | |
| 103 | |
| 0 | 104 /* True if the loop was marked for removal from the register |
| 105 allocation. */ | |
| 106 bool to_remove_p; | |
| 107 | |
| 108 /* Allocnos in the loop corresponding to their regnos. If it is | |
| 109 NULL the loop does not form a separate register allocation region | |
| 110 (e.g. because it has abnormal enter/exit edges and we can not put | |
| 111 code for register shuffling on the edges if a different | |
| 112 allocation is used for a pseudo-register on different sides of | |
| 113 the edges). Caps are not in the map (remember we can have more | |
| 114 one cap with the same regno in a region). */ | |
| 115 ira_allocno_t *regno_allocno_map; | |
| 116 | |
| 117 /* True if there is an entry to given loop not from its parent (or | |
| 118 grandparent) basic block. For example, it is possible for two | |
| 119 adjacent loops inside another loop. */ | |
| 120 bool entered_from_non_parent_p; | |
| 121 | |
| 122 /* Maximal register pressure inside loop for given register class | |
| 111 | 123 (defined only for the pressure classes). */ |
| 0 | 124 int reg_pressure[N_REG_CLASSES]; |
| 125 | |
| 126 /* Numbers of allocnos referred or living in the loop node (except | |
| 127 for its subloops). */ | |
| 128 bitmap all_allocnos; | |
| 129 | |
| 130 /* Numbers of allocnos living at the loop borders. */ | |
| 131 bitmap border_allocnos; | |
| 132 | |
| 133 /* Regnos of pseudos modified in the loop node (including its | |
| 134 subloops). */ | |
| 135 bitmap modified_regnos; | |
| 136 | |
| 137 /* Numbers of copies referred in the corresponding loop. */ | |
| 138 bitmap local_copies; | |
| 139 }; | |
| 140 | |
| 141 /* The root of the loop tree corresponding to the all function. */ | |
| 142 extern ira_loop_tree_node_t ira_loop_tree_root; | |
| 143 | |
| 144 /* Height of the loop tree. */ | |
| 145 extern int ira_loop_tree_height; | |
| 146 | |
| 147 /* All nodes representing basic blocks are referred through the | |
| 148 following array. We can not use basic block member `aux' for this | |
| 149 because it is used for insertion of insns on edges. */ | |
| 150 extern ira_loop_tree_node_t ira_bb_nodes; | |
| 151 | |
| 152 /* Two access macros to the nodes representing basic blocks. */ | |
| 153 #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007) | |
| 154 #define IRA_BB_NODE_BY_INDEX(index) __extension__ \ | |
| 111 | 155 (({ ira_loop_tree_node_t _node = (&ira_bb_nodes[index]); \ |
| 0 | 156 if (_node->children != NULL || _node->loop != NULL || _node->bb == NULL)\ |
| 157 { \ | |
| 158 fprintf (stderr, \ | |
| 159 "\n%s: %d: error in %s: it is not a block node\n", \ | |
| 160 __FILE__, __LINE__, __FUNCTION__); \ | |
| 161 gcc_unreachable (); \ | |
| 162 } \ | |
| 163 _node; })) | |
| 164 #else | |
| 165 #define IRA_BB_NODE_BY_INDEX(index) (&ira_bb_nodes[index]) | |
| 166 #endif | |
| 167 | |
| 168 #define IRA_BB_NODE(bb) IRA_BB_NODE_BY_INDEX ((bb)->index) | |
| 169 | |
| 170 /* All nodes representing loops are referred through the following | |
| 171 array. */ | |
| 172 extern ira_loop_tree_node_t ira_loop_nodes; | |
| 173 | |
| 174 /* Two access macros to the nodes representing loops. */ | |
| 175 #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007) | |
| 176 #define IRA_LOOP_NODE_BY_INDEX(index) __extension__ \ | |
| 111 | 177 (({ ira_loop_tree_node_t const _node = (&ira_loop_nodes[index]); \ |
| 178 if (_node->children == NULL || _node->bb != NULL \ | |
| 179 || (_node->loop == NULL && current_loops != NULL)) \ | |
| 0 | 180 { \ |
| 181 fprintf (stderr, \ | |
| 182 "\n%s: %d: error in %s: it is not a loop node\n", \ | |
| 183 __FILE__, __LINE__, __FUNCTION__); \ | |
| 184 gcc_unreachable (); \ | |
| 185 } \ | |
| 186 _node; })) | |
| 187 #else | |
| 188 #define IRA_LOOP_NODE_BY_INDEX(index) (&ira_loop_nodes[index]) | |
| 189 #endif | |
| 190 | |
| 191 #define IRA_LOOP_NODE(loop) IRA_LOOP_NODE_BY_INDEX ((loop)->num) | |
| 192 | |
| 193 | |
| 194 /* The structure describes program points where a given allocno lives. | |
| 111 | 195 If the live ranges of two allocnos are intersected, the allocnos |
| 196 are in conflict. */ | |
|
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197 struct live_range |
| 0 | 198 { |
|
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199 /* Object whose live range is described by given structure. */ |
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200 ira_object_t object; |
| 0 | 201 /* Program point range. */ |
| 202 int start, finish; | |
| 203 /* Next structure describing program points where the allocno | |
| 204 lives. */ | |
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205 live_range_t next; |
| 0 | 206 /* Pointer to structures with the same start/finish. */ |
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207 live_range_t start_next, finish_next; |
| 0 | 208 }; |
| 209 | |
| 210 /* Program points are enumerated by numbers from range | |
| 211 0..IRA_MAX_POINT-1. There are approximately two times more program | |
| 212 points than insns. Program points are places in the program where | |
| 213 liveness info can be changed. In most general case (there are more | |
| 214 complicated cases too) some program points correspond to places | |
| 215 where input operand dies and other ones correspond to places where | |
| 216 output operands are born. */ | |
| 217 extern int ira_max_point; | |
| 218 | |
| 219 /* Arrays of size IRA_MAX_POINT mapping a program point to the allocno | |
| 220 live ranges with given start/finish point. */ | |
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221 extern live_range_t *ira_start_point_ranges, *ira_finish_point_ranges; |
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222 |
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223 /* A structure representing conflict information for an allocno |
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224 (or one of its subwords). */ |
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225 struct ira_object |
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226 { |
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227 /* The allocno associated with this record. */ |
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228 ira_allocno_t allocno; |
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229 /* Vector of accumulated conflicting conflict_redords with NULL end |
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230 marker (if OBJECT_CONFLICT_VEC_P is true) or conflict bit vector |
| 111 | 231 otherwise. */ |
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232 void *conflicts_array; |
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233 /* Pointer to structures describing at what program point the |
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234 object lives. We always maintain the list in such way that *the |
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235 ranges in the list are not intersected and ordered by decreasing |
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236 their program points*. */ |
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237 live_range_t live_ranges; |
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238 /* The subword within ALLOCNO which is represented by this object. |
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239 Zero means the lowest-order subword (or the entire allocno in case |
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240 it is not being tracked in subwords). */ |
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241 int subword; |
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242 /* Allocated size of the conflicts array. */ |
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243 unsigned int conflicts_array_size; |
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244 /* A unique number for every instance of this structure, which is used |
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245 to represent it in conflict bit vectors. */ |
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246 int id; |
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247 /* Before building conflicts, MIN and MAX are initialized to |
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248 correspondingly minimal and maximal points of the accumulated |
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249 live ranges. Afterwards, they hold the minimal and maximal ids |
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250 of other ira_objects that this one can conflict with. */ |
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251 int min, max; |
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252 /* Initial and accumulated hard registers conflicting with this |
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253 object and as a consequences can not be assigned to the allocno. |
| 111 | 254 All non-allocatable hard regs and hard regs of register classes |
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255 different from given allocno one are included in the sets. */ |
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256 HARD_REG_SET conflict_hard_regs, total_conflict_hard_regs; |
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257 /* Number of accumulated conflicts in the vector of conflicting |
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258 objects. */ |
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259 int num_accumulated_conflicts; |
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260 /* TRUE if conflicts are represented by a vector of pointers to |
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261 ira_object structures. Otherwise, we use a bit vector indexed |
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262 by conflict ID numbers. */ |
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263 unsigned int conflict_vec_p : 1; |
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264 }; |
| 0 | 265 |
| 266 /* A structure representing an allocno (allocation entity). Allocno | |
| 267 represents a pseudo-register in an allocation region. If | |
| 268 pseudo-register does not live in a region but it lives in the | |
| 269 nested regions, it is represented in the region by special allocno | |
| 270 called *cap*. There may be more one cap representing the same | |
| 271 pseudo-register in region. It means that the corresponding | |
| 272 pseudo-register lives in more one non-intersected subregion. */ | |
| 273 struct ira_allocno | |
| 274 { | |
| 275 /* The allocno order number starting with 0. Each allocno has an | |
| 276 unique number and the number is never changed for the | |
| 277 allocno. */ | |
| 278 int num; | |
| 279 /* Regno for allocno or cap. */ | |
| 280 int regno; | |
| 281 /* Mode of the allocno which is the mode of the corresponding | |
| 282 pseudo-register. */ | |
| 111 | 283 ENUM_BITFIELD (machine_mode) mode : 8; |
| 284 /* Widest mode of the allocno which in at least one case could be | |
| 285 for paradoxical subregs where wmode > mode. */ | |
| 286 ENUM_BITFIELD (machine_mode) wmode : 8; | |
| 287 /* Register class which should be used for allocation for given | |
| 288 allocno. NO_REGS means that we should use memory. */ | |
| 289 ENUM_BITFIELD (reg_class) aclass : 16; | |
| 290 /* During the reload, value TRUE means that we should not reassign a | |
| 291 hard register to the allocno got memory earlier. It is set up | |
| 292 when we removed memory-memory move insn before each iteration of | |
| 293 the reload. */ | |
| 294 unsigned int dont_reassign_p : 1; | |
| 295 #ifdef STACK_REGS | |
| 296 /* Set to TRUE if allocno can't be assigned to the stack hard | |
| 297 register correspondingly in this region and area including the | |
| 298 region and all its subregions recursively. */ | |
| 299 unsigned int no_stack_reg_p : 1, total_no_stack_reg_p : 1; | |
| 300 #endif | |
| 301 /* TRUE value means that there is no sense to spill the allocno | |
| 302 during coloring because the spill will result in additional | |
| 303 reloads in reload pass. */ | |
| 304 unsigned int bad_spill_p : 1; | |
| 305 /* TRUE if a hard register or memory has been assigned to the | |
| 306 allocno. */ | |
| 307 unsigned int assigned_p : 1; | |
| 308 /* TRUE if conflicts for given allocno are represented by vector of | |
| 309 pointers to the conflicting allocnos. Otherwise, we use a bit | |
| 310 vector where a bit with given index represents allocno with the | |
| 311 same number. */ | |
| 312 unsigned int conflict_vec_p : 1; | |
| 0 | 313 /* Hard register assigned to given allocno. Negative value means |
| 314 that memory was allocated to the allocno. During the reload, | |
| 315 spilled allocno has value equal to the corresponding stack slot | |
| 316 number (0, ...) - 2. Value -1 is used for allocnos spilled by the | |
| 317 reload (at this point pseudo-register has only one allocno) which | |
| 318 did not get stack slot yet. */ | |
| 111 | 319 signed int hard_regno : 16; |
| 0 | 320 /* Allocnos with the same regno are linked by the following member. |
| 321 Allocnos corresponding to inner loops are first in the list (it | |
| 322 corresponds to depth-first traverse of the loops). */ | |
| 323 ira_allocno_t next_regno_allocno; | |
| 324 /* There may be different allocnos with the same regno in different | |
| 325 regions. Allocnos are bound to the corresponding loop tree node. | |
| 326 Pseudo-register may have only one regular allocno with given loop | |
| 327 tree node but more than one cap (see comments above). */ | |
| 328 ira_loop_tree_node_t loop_tree_node; | |
| 329 /* Accumulated usage references of the allocno. Here and below, | |
| 330 word 'accumulated' means info for given region and all nested | |
| 331 subregions. In this case, 'accumulated' means sum of references | |
| 332 of the corresponding pseudo-register in this region and in all | |
| 333 nested subregions recursively. */ | |
| 334 int nrefs; | |
| 335 /* Accumulated frequency of usage of the allocno. */ | |
| 336 int freq; | |
| 337 /* Minimal accumulated and updated costs of usage register of the | |
| 111 | 338 allocno class. */ |
| 339 int class_cost, updated_class_cost; | |
| 0 | 340 /* Minimal accumulated, and updated costs of memory for the allocno. |
| 341 At the allocation start, the original and updated costs are | |
| 342 equal. The updated cost may be changed after finishing | |
| 343 allocation in a region and starting allocation in a subregion. | |
| 344 The change reflects the cost of spill/restore code on the | |
| 345 subregion border if we assign memory to the pseudo in the | |
| 346 subregion. */ | |
| 347 int memory_cost, updated_memory_cost; | |
| 348 /* Accumulated number of points where the allocno lives and there is | |
| 349 excess pressure for its class. Excess pressure for a register | |
| 350 class at some point means that there are more allocnos of given | |
| 351 register class living at the point than number of hard-registers | |
| 352 of the class available for the allocation. */ | |
| 353 int excess_pressure_points_num; | |
| 111 | 354 /* Allocno hard reg preferences. */ |
| 355 ira_pref_t allocno_prefs; | |
| 0 | 356 /* Copies to other non-conflicting allocnos. The copies can |
| 357 represent move insn or potential move insn usually because of two | |
| 358 operand insn constraints. */ | |
| 359 ira_copy_t allocno_copies; | |
| 360 /* It is a allocno (cap) representing given allocno on upper loop tree | |
| 361 level. */ | |
| 362 ira_allocno_t cap; | |
| 363 /* It is a link to allocno (cap) on lower loop level represented by | |
| 364 given cap. Null if given allocno is not a cap. */ | |
| 365 ira_allocno_t cap_member; | |
|
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366 /* The number of objects tracked in the following array. */ |
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367 int num_objects; |
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368 /* An array of structures describing conflict information and live |
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369 ranges for each object associated with the allocno. There may be |
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370 more than one such object in cases where the allocno represents a |
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371 multi-word register. */ |
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372 ira_object_t objects[2]; |
| 0 | 373 /* Accumulated frequency of calls which given allocno |
| 374 intersects. */ | |
| 375 int call_freq; | |
| 376 /* Accumulated number of the intersected calls. */ | |
| 377 int calls_crossed_num; | |
| 111 | 378 /* The number of calls across which it is live, but which should not |
| 379 affect register preferences. */ | |
| 380 int cheap_calls_crossed_num; | |
| 381 /* Registers clobbered by intersected calls. */ | |
| 382 HARD_REG_SET crossed_calls_clobbered_regs; | |
| 0 | 383 /* Array of usage costs (accumulated and the one updated during |
| 111 | 384 coloring) for each hard register of the allocno class. The |
| 0 | 385 member value can be NULL if all costs are the same and equal to |
| 111 | 386 CLASS_COST. For example, the costs of two different hard |
| 0 | 387 registers can be different if one hard register is callee-saved |
| 388 and another one is callee-used and the allocno lives through | |
| 389 calls. Another example can be case when for some insn the | |
| 390 corresponding pseudo-register value should be put in specific | |
| 391 register class (e.g. AREG for x86) which is a strict subset of | |
| 111 | 392 the allocno class (GENERAL_REGS for x86). We have updated costs |
| 393 to reflect the situation when the usage cost of a hard register | |
| 394 is decreased because the allocno is connected to another allocno | |
| 395 by a copy and the another allocno has been assigned to the hard | |
| 396 register. */ | |
| 0 | 397 int *hard_reg_costs, *updated_hard_reg_costs; |
| 398 /* Array of decreasing costs (accumulated and the one updated during | |
| 399 coloring) for allocnos conflicting with given allocno for hard | |
| 111 | 400 regno of the allocno class. The member value can be NULL if all |
| 401 costs are the same. These costs are used to reflect preferences | |
| 402 of other allocnos not assigned yet during assigning to given | |
| 403 allocno. */ | |
| 0 | 404 int *conflict_hard_reg_costs, *updated_conflict_hard_reg_costs; |
| 111 | 405 /* Different additional data. It is used to decrease size of |
| 406 allocno data footprint. */ | |
| 407 void *add_data; | |
| 0 | 408 }; |
| 409 | |
| 111 | 410 |
| 0 | 411 /* All members of the allocno structures should be accessed only |
| 412 through the following macros. */ | |
| 413 #define ALLOCNO_NUM(A) ((A)->num) | |
| 414 #define ALLOCNO_REGNO(A) ((A)->regno) | |
| 415 #define ALLOCNO_REG(A) ((A)->reg) | |
| 416 #define ALLOCNO_NEXT_REGNO_ALLOCNO(A) ((A)->next_regno_allocno) | |
| 417 #define ALLOCNO_LOOP_TREE_NODE(A) ((A)->loop_tree_node) | |
| 418 #define ALLOCNO_CAP(A) ((A)->cap) | |
| 419 #define ALLOCNO_CAP_MEMBER(A) ((A)->cap_member) | |
| 420 #define ALLOCNO_NREFS(A) ((A)->nrefs) | |
| 421 #define ALLOCNO_FREQ(A) ((A)->freq) | |
| 422 #define ALLOCNO_HARD_REGNO(A) ((A)->hard_regno) | |
| 423 #define ALLOCNO_CALL_FREQ(A) ((A)->call_freq) | |
| 424 #define ALLOCNO_CALLS_CROSSED_NUM(A) ((A)->calls_crossed_num) | |
| 111 | 425 #define ALLOCNO_CHEAP_CALLS_CROSSED_NUM(A) ((A)->cheap_calls_crossed_num) |
| 426 #define ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS(A) \ | |
| 427 ((A)->crossed_calls_clobbered_regs) | |
| 0 | 428 #define ALLOCNO_MEM_OPTIMIZED_DEST(A) ((A)->mem_optimized_dest) |
| 429 #define ALLOCNO_MEM_OPTIMIZED_DEST_P(A) ((A)->mem_optimized_dest_p) | |
| 430 #define ALLOCNO_SOMEWHERE_RENAMED_P(A) ((A)->somewhere_renamed_p) | |
| 431 #define ALLOCNO_CHILD_RENAMED_P(A) ((A)->child_renamed_p) | |
| 432 #define ALLOCNO_DONT_REASSIGN_P(A) ((A)->dont_reassign_p) | |
| 433 #ifdef STACK_REGS | |
| 434 #define ALLOCNO_NO_STACK_REG_P(A) ((A)->no_stack_reg_p) | |
| 435 #define ALLOCNO_TOTAL_NO_STACK_REG_P(A) ((A)->total_no_stack_reg_p) | |
| 436 #endif | |
| 437 #define ALLOCNO_BAD_SPILL_P(A) ((A)->bad_spill_p) | |
| 438 #define ALLOCNO_ASSIGNED_P(A) ((A)->assigned_p) | |
| 439 #define ALLOCNO_MODE(A) ((A)->mode) | |
| 111 | 440 #define ALLOCNO_WMODE(A) ((A)->wmode) |
| 441 #define ALLOCNO_PREFS(A) ((A)->allocno_prefs) | |
| 0 | 442 #define ALLOCNO_COPIES(A) ((A)->allocno_copies) |
| 443 #define ALLOCNO_HARD_REG_COSTS(A) ((A)->hard_reg_costs) | |
| 444 #define ALLOCNO_UPDATED_HARD_REG_COSTS(A) ((A)->updated_hard_reg_costs) | |
| 445 #define ALLOCNO_CONFLICT_HARD_REG_COSTS(A) \ | |
| 446 ((A)->conflict_hard_reg_costs) | |
| 447 #define ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS(A) \ | |
| 448 ((A)->updated_conflict_hard_reg_costs) | |
| 111 | 449 #define ALLOCNO_CLASS(A) ((A)->aclass) |
| 450 #define ALLOCNO_CLASS_COST(A) ((A)->class_cost) | |
| 451 #define ALLOCNO_UPDATED_CLASS_COST(A) ((A)->updated_class_cost) | |
| 0 | 452 #define ALLOCNO_MEMORY_COST(A) ((A)->memory_cost) |
| 453 #define ALLOCNO_UPDATED_MEMORY_COST(A) ((A)->updated_memory_cost) | |
| 111 | 454 #define ALLOCNO_EXCESS_PRESSURE_POINTS_NUM(A) \ |
| 455 ((A)->excess_pressure_points_num) | |
|
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456 #define ALLOCNO_OBJECT(A,N) ((A)->objects[N]) |
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457 #define ALLOCNO_NUM_OBJECTS(A) ((A)->num_objects) |
| 111 | 458 #define ALLOCNO_ADD_DATA(A) ((A)->add_data) |
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459 |
| 111 | 460 /* Typedef for pointer to the subsequent structure. */ |
| 461 typedef struct ira_emit_data *ira_emit_data_t; | |
| 462 | |
| 463 /* Allocno bound data used for emit pseudo live range split insns and | |
| 464 to flattening IR. */ | |
| 465 struct ira_emit_data | |
| 466 { | |
| 467 /* TRUE if the allocno assigned to memory was a destination of | |
| 468 removed move (see ira-emit.c) at loop exit because the value of | |
| 469 the corresponding pseudo-register is not changed inside the | |
| 470 loop. */ | |
| 471 unsigned int mem_optimized_dest_p : 1; | |
| 472 /* TRUE if the corresponding pseudo-register has disjoint live | |
| 473 ranges and the other allocnos of the pseudo-register except this | |
| 474 one changed REG. */ | |
| 475 unsigned int somewhere_renamed_p : 1; | |
| 476 /* TRUE if allocno with the same REGNO in a subregion has been | |
| 477 renamed, in other words, got a new pseudo-register. */ | |
| 478 unsigned int child_renamed_p : 1; | |
| 479 /* Final rtx representation of the allocno. */ | |
| 480 rtx reg; | |
| 481 /* Non NULL if we remove restoring value from given allocno to | |
| 482 MEM_OPTIMIZED_DEST at loop exit (see ira-emit.c) because the | |
| 483 allocno value is not changed inside the loop. */ | |
| 484 ira_allocno_t mem_optimized_dest; | |
| 485 }; | |
| 486 | |
| 487 #define ALLOCNO_EMIT_DATA(a) ((ira_emit_data_t) ALLOCNO_ADD_DATA (a)) | |
| 488 | |
| 489 /* Data used to emit live range split insns and to flattening IR. */ | |
| 490 extern ira_emit_data_t ira_allocno_emit_data; | |
| 491 | |
| 492 /* Abbreviation for frequent emit data access. */ | |
| 493 static inline rtx | |
| 494 allocno_emit_reg (ira_allocno_t a) | |
| 495 { | |
| 496 return ALLOCNO_EMIT_DATA (a)->reg; | |
| 497 } | |
| 498 | |
| 499 #define OBJECT_ALLOCNO(O) ((O)->allocno) | |
| 500 #define OBJECT_SUBWORD(O) ((O)->subword) | |
| 501 #define OBJECT_CONFLICT_ARRAY(O) ((O)->conflicts_array) | |
| 502 #define OBJECT_CONFLICT_VEC(O) ((ira_object_t *)(O)->conflicts_array) | |
| 503 #define OBJECT_CONFLICT_BITVEC(O) ((IRA_INT_TYPE *)(O)->conflicts_array) | |
| 504 #define OBJECT_CONFLICT_ARRAY_SIZE(O) ((O)->conflicts_array_size) | |
| 505 #define OBJECT_CONFLICT_VEC_P(O) ((O)->conflict_vec_p) | |
| 506 #define OBJECT_NUM_CONFLICTS(O) ((O)->num_accumulated_conflicts) | |
| 507 #define OBJECT_CONFLICT_HARD_REGS(O) ((O)->conflict_hard_regs) | |
| 508 #define OBJECT_TOTAL_CONFLICT_HARD_REGS(O) ((O)->total_conflict_hard_regs) | |
| 509 #define OBJECT_MIN(O) ((O)->min) | |
| 510 #define OBJECT_MAX(O) ((O)->max) | |
| 511 #define OBJECT_CONFLICT_ID(O) ((O)->id) | |
| 512 #define OBJECT_LIVE_RANGES(O) ((O)->live_ranges) | |
| 0 | 513 |
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514 /* Map regno -> allocnos with given regno (see comments for |
| 0 | 515 allocno member `next_regno_allocno'). */ |
| 516 extern ira_allocno_t *ira_regno_allocno_map; | |
| 517 | |
| 518 /* Array of references to all allocnos. The order number of the | |
| 519 allocno corresponds to the index in the array. Removed allocnos | |
| 520 have NULL element value. */ | |
| 521 extern ira_allocno_t *ira_allocnos; | |
| 522 | |
|
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523 /* The size of the previous array. */ |
| 0 | 524 extern int ira_allocnos_num; |
| 525 | |
|
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526 /* Map a conflict id to its corresponding ira_object structure. */ |
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527 extern ira_object_t *ira_object_id_map; |
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528 |
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529 /* The size of the previous array. */ |
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530 extern int ira_objects_num; |
| 0 | 531 |
| 111 | 532 /* The following structure represents a hard register preference of |
| 533 allocno. The preference represent move insns or potential move | |
| 534 insns usually because of two operand insn constraints. One move | |
| 535 operand is a hard register. */ | |
| 536 struct ira_allocno_pref | |
| 537 { | |
| 538 /* The unique order number of the preference node starting with 0. */ | |
| 539 int num; | |
| 540 /* Preferred hard register. */ | |
| 541 int hard_regno; | |
| 542 /* Accumulated execution frequency of insns from which the | |
| 543 preference created. */ | |
| 544 int freq; | |
| 545 /* Given allocno. */ | |
| 546 ira_allocno_t allocno; | |
| 547 /* All preferences with the same allocno are linked by the following | |
| 548 member. */ | |
| 549 ira_pref_t next_pref; | |
| 550 }; | |
| 551 | |
| 552 /* Array of references to all allocno preferences. The order number | |
| 553 of the preference corresponds to the index in the array. */ | |
| 554 extern ira_pref_t *ira_prefs; | |
| 555 | |
| 556 /* Size of the previous array. */ | |
| 557 extern int ira_prefs_num; | |
| 558 | |
| 0 | 559 /* The following structure represents a copy of two allocnos. The |
| 560 copies represent move insns or potential move insns usually because | |
| 561 of two operand insn constraints. To remove register shuffle, we | |
| 562 also create copies between allocno which is output of an insn and | |
| 563 allocno becoming dead in the insn. */ | |
| 564 struct ira_allocno_copy | |
| 565 { | |
| 566 /* The unique order number of the copy node starting with 0. */ | |
| 567 int num; | |
| 568 /* Allocnos connected by the copy. The first allocno should have | |
| 569 smaller order number than the second one. */ | |
| 570 ira_allocno_t first, second; | |
| 571 /* Execution frequency of the copy. */ | |
| 572 int freq; | |
| 573 bool constraint_p; | |
| 574 /* It is a move insn which is an origin of the copy. The member | |
| 575 value for the copy representing two operand insn constraints or | |
| 576 for the copy created to remove register shuffle is NULL. In last | |
| 577 case the copy frequency is smaller than the corresponding insn | |
| 578 execution frequency. */ | |
| 111 | 579 rtx_insn *insn; |
| 0 | 580 /* All copies with the same allocno as FIRST are linked by the two |
| 581 following members. */ | |
| 582 ira_copy_t prev_first_allocno_copy, next_first_allocno_copy; | |
| 583 /* All copies with the same allocno as SECOND are linked by the two | |
| 584 following members. */ | |
| 585 ira_copy_t prev_second_allocno_copy, next_second_allocno_copy; | |
| 586 /* Region from which given copy is originated. */ | |
| 587 ira_loop_tree_node_t loop_tree_node; | |
| 588 }; | |
| 589 | |
| 590 /* Array of references to all copies. The order number of the copy | |
| 591 corresponds to the index in the array. Removed copies have NULL | |
| 592 element value. */ | |
| 593 extern ira_copy_t *ira_copies; | |
| 594 | |
| 595 /* Size of the previous array. */ | |
| 596 extern int ira_copies_num; | |
| 597 | |
| 598 /* The following structure describes a stack slot used for spilled | |
| 599 pseudo-registers. */ | |
| 600 struct ira_spilled_reg_stack_slot | |
| 601 { | |
| 602 /* pseudo-registers assigned to the stack slot. */ | |
|
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603 bitmap_head spilled_regs; |
| 0 | 604 /* RTL representation of the stack slot. */ |
| 605 rtx mem; | |
| 606 /* Size of the stack slot. */ | |
| 607 unsigned int width; | |
| 608 }; | |
| 609 | |
| 610 /* The number of elements in the following array. */ | |
| 611 extern int ira_spilled_reg_stack_slots_num; | |
| 612 | |
| 613 /* The following array contains info about spilled pseudo-registers | |
| 614 stack slots used in current function so far. */ | |
| 615 extern struct ira_spilled_reg_stack_slot *ira_spilled_reg_stack_slots; | |
| 616 | |
| 617 /* Correspondingly overall cost of the allocation, cost of the | |
| 618 allocnos assigned to hard-registers, cost of the allocnos assigned | |
| 619 to memory, cost of loads, stores and register move insns generated | |
| 620 for pseudo-register live range splitting (see ira-emit.c). */ | |
| 111 | 621 extern int64_t ira_overall_cost; |
| 622 extern int64_t ira_reg_cost, ira_mem_cost; | |
| 623 extern int64_t ira_load_cost, ira_store_cost, ira_shuffle_cost; | |
| 0 | 624 extern int ira_move_loops_num, ira_additional_jumps_num; |
| 111 | 625 |
|
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626 |
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627 /* This page contains a bitset implementation called 'min/max sets' used to |
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628 record conflicts in IRA. |
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629 They are named min/maxs set since we keep track of a minimum and a maximum |
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630 bit number for each set representing the bounds of valid elements. Otherwise, |
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631 the implementation resembles sbitmaps in that we store an array of integers |
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632 whose bits directly represent the members of the set. */ |
| 0 | 633 |
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634 /* The type used as elements in the array, and the number of bits in |
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635 this type. */ |
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636 |
| 0 | 637 #define IRA_INT_BITS HOST_BITS_PER_WIDE_INT |
| 638 #define IRA_INT_TYPE HOST_WIDE_INT | |
| 639 | |
| 640 /* Set, clear or test bit number I in R, a bit vector of elements with | |
| 641 minimal index and maximal index equal correspondingly to MIN and | |
| 642 MAX. */ | |
| 643 #if defined ENABLE_IRA_CHECKING && (GCC_VERSION >= 2007) | |
| 644 | |
|
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645 #define SET_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \ |
| 0 | 646 (({ int _min = (MIN), _max = (MAX), _i = (I); \ |
| 647 if (_i < _min || _i > _max) \ | |
| 648 { \ | |
| 649 fprintf (stderr, \ | |
| 650 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \ | |
| 651 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \ | |
| 652 gcc_unreachable (); \ | |
| 653 } \ | |
| 654 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \ | |
| 655 |= ((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); })) | |
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656 |
| 0 | 657 |
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658 #define CLEAR_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \ |
| 0 | 659 (({ int _min = (MIN), _max = (MAX), _i = (I); \ |
| 660 if (_i < _min || _i > _max) \ | |
| 661 { \ | |
| 662 fprintf (stderr, \ | |
| 663 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \ | |
| 664 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \ | |
| 665 gcc_unreachable (); \ | |
| 666 } \ | |
| 667 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \ | |
| 668 &= ~((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); })) | |
| 669 | |
|
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670 #define TEST_MINMAX_SET_BIT(R, I, MIN, MAX) __extension__ \ |
| 0 | 671 (({ int _min = (MIN), _max = (MAX), _i = (I); \ |
| 672 if (_i < _min || _i > _max) \ | |
| 673 { \ | |
| 674 fprintf (stderr, \ | |
| 675 "\n%s: %d: error in %s: %d not in range [%d,%d]\n", \ | |
| 676 __FILE__, __LINE__, __FUNCTION__, _i, _min, _max); \ | |
| 677 gcc_unreachable (); \ | |
| 678 } \ | |
| 679 ((R)[(unsigned) (_i - _min) / IRA_INT_BITS] \ | |
| 680 & ((IRA_INT_TYPE) 1 << ((unsigned) (_i - _min) % IRA_INT_BITS))); })) | |
| 681 | |
| 682 #else | |
| 683 | |
|
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684 #define SET_MINMAX_SET_BIT(R, I, MIN, MAX) \ |
| 0 | 685 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \ |
| 686 |= ((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS))) | |
| 687 | |
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688 #define CLEAR_MINMAX_SET_BIT(R, I, MIN, MAX) \ |
| 0 | 689 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \ |
| 690 &= ~((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS))) | |
| 691 | |
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692 #define TEST_MINMAX_SET_BIT(R, I, MIN, MAX) \ |
| 0 | 693 ((R)[(unsigned) ((I) - (MIN)) / IRA_INT_BITS] \ |
| 694 & ((IRA_INT_TYPE) 1 << ((unsigned) ((I) - (MIN)) % IRA_INT_BITS))) | |
| 695 | |
| 696 #endif | |
| 697 | |
|
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698 /* The iterator for min/max sets. */ |
| 111 | 699 struct minmax_set_iterator { |
| 0 | 700 |
|
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701 /* Array containing the bit vector. */ |
| 0 | 702 IRA_INT_TYPE *vec; |
| 703 | |
| 704 /* The number of the current element in the vector. */ | |
| 705 unsigned int word_num; | |
| 706 | |
| 707 /* The number of bits in the bit vector. */ | |
| 708 unsigned int nel; | |
| 709 | |
| 710 /* The current bit index of the bit vector. */ | |
| 711 unsigned int bit_num; | |
| 712 | |
| 713 /* Index corresponding to the 1st bit of the bit vector. */ | |
| 714 int start_val; | |
| 715 | |
| 716 /* The word of the bit vector currently visited. */ | |
| 717 unsigned IRA_INT_TYPE word; | |
| 111 | 718 }; |
| 0 | 719 |
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720 /* Initialize the iterator I for bit vector VEC containing minimal and |
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721 maximal values MIN and MAX. */ |
| 0 | 722 static inline void |
|
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723 minmax_set_iter_init (minmax_set_iterator *i, IRA_INT_TYPE *vec, int min, |
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724 int max) |
| 0 | 725 { |
| 726 i->vec = vec; | |
| 727 i->word_num = 0; | |
| 728 i->nel = max < min ? 0 : max - min + 1; | |
| 729 i->start_val = min; | |
| 730 i->bit_num = 0; | |
| 731 i->word = i->nel == 0 ? 0 : vec[0]; | |
| 732 } | |
| 733 | |
| 734 /* Return TRUE if we have more allocnos to visit, in which case *N is | |
|
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735 set to the number of the element to be visited. Otherwise, return |
| 0 | 736 FALSE. */ |
| 737 static inline bool | |
|
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738 minmax_set_iter_cond (minmax_set_iterator *i, int *n) |
| 0 | 739 { |
| 740 /* Skip words that are zeros. */ | |
| 741 for (; i->word == 0; i->word = i->vec[i->word_num]) | |
| 742 { | |
| 743 i->word_num++; | |
| 744 i->bit_num = i->word_num * IRA_INT_BITS; | |
|
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745 |
| 0 | 746 /* If we have reached the end, break. */ |
| 747 if (i->bit_num >= i->nel) | |
| 748 return false; | |
| 749 } | |
|
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750 |
| 0 | 751 /* Skip bits that are zero. */ |
| 752 for (; (i->word & 1) == 0; i->word >>= 1) | |
| 753 i->bit_num++; | |
|
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754 |
| 0 | 755 *n = (int) i->bit_num + i->start_val; |
|
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756 |
| 0 | 757 return true; |
| 758 } | |
| 759 | |
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760 /* Advance to the next element in the set. */ |
| 0 | 761 static inline void |
|
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762 minmax_set_iter_next (minmax_set_iterator *i) |
| 0 | 763 { |
| 764 i->word >>= 1; | |
| 765 i->bit_num++; | |
| 766 } | |
| 767 | |
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768 /* Loop over all elements of a min/max set given by bit vector VEC and |
| 0 | 769 their minimal and maximal values MIN and MAX. In each iteration, N |
| 770 is set to the number of next allocno. ITER is an instance of | |
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771 minmax_set_iterator used to iterate over the set. */ |
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772 #define FOR_EACH_BIT_IN_MINMAX_SET(VEC, MIN, MAX, N, ITER) \ |
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773 for (minmax_set_iter_init (&(ITER), (VEC), (MIN), (MAX)); \ |
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774 minmax_set_iter_cond (&(ITER), &(N)); \ |
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775 minmax_set_iter_next (&(ITER))) |
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776 |
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777 struct target_ira_int { |
| 111 | 778 ~target_ira_int (); |
| 779 | |
| 780 void free_ira_costs (); | |
| 781 void free_register_move_costs (); | |
| 782 | |
|
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783 /* Initialized once. It is a maximal possible size of the allocated |
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784 struct costs. */ |
| 111 | 785 size_t x_max_struct_costs_size; |
| 0 | 786 |
|
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787 /* Allocated and initialized once, and used to initialize cost values |
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788 for each insn. */ |
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789 struct costs *x_init_cost; |
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790 |
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791 /* Allocated once, and used for temporary purposes. */ |
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792 struct costs *x_temp_costs; |
| 0 | 793 |
|
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794 /* Allocated once, and used for the cost calculation. */ |
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795 struct costs *x_op_costs[MAX_RECOG_OPERANDS]; |
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796 struct costs *x_this_op_costs[MAX_RECOG_OPERANDS]; |
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797 |
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798 /* Hard registers that can not be used for the register allocator for |
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799 all functions of the current compilation unit. */ |
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800 HARD_REG_SET x_no_unit_alloc_regs; |
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801 |
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802 /* Map: hard regs X modes -> set of hard registers for storing value |
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803 of given mode starting with given hard register. */ |
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804 HARD_REG_SET (x_ira_reg_mode_hard_regset |
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805 [FIRST_PSEUDO_REGISTER][NUM_MACHINE_MODES]); |
| 0 | 806 |
| 111 | 807 /* Maximum cost of moving from a register in one class to a register |
| 808 in another class. Based on TARGET_REGISTER_MOVE_COST. */ | |
|
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809 move_table *x_ira_register_move_cost[MAX_MACHINE_MODE]; |
| 0 | 810 |
| 111 | 811 /* Similar, but here we don't have to move if the first index is a |
| 812 subset of the second so in that case the cost is zero. */ | |
|
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813 move_table *x_ira_may_move_in_cost[MAX_MACHINE_MODE]; |
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814 |
| 111 | 815 /* Similar, but here we don't have to move if the first index is a |
| 816 superset of the second so in that case the cost is zero. */ | |
|
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817 move_table *x_ira_may_move_out_cost[MAX_MACHINE_MODE]; |
| 0 | 818 |
| 111 | 819 /* Keep track of the last mode we initialized move costs for. */ |
| 820 int x_last_mode_for_init_move_cost; | |
| 821 | |
| 822 /* Array analog of the macro MEMORY_MOVE_COST but they contain maximal | |
| 823 cost not minimal. */ | |
| 824 short int x_ira_max_memory_move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][2]; | |
| 825 | |
| 826 /* Map class->true if class is a possible allocno class, false | |
| 827 otherwise. */ | |
| 828 bool x_ira_reg_allocno_class_p[N_REG_CLASSES]; | |
| 829 | |
| 830 /* Map class->true if class is a pressure class, false otherwise. */ | |
| 831 bool x_ira_reg_pressure_class_p[N_REG_CLASSES]; | |
|
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832 |
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833 /* Array of the number of hard registers of given class which are |
| 111 | 834 available for allocation. The order is defined by the hard |
|
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835 register numbers. */ |
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836 short x_ira_non_ordered_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER]; |
| 0 | 837 |
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838 /* Index (in ira_class_hard_regs; for given register class and hard |
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839 register (in general case a hard register can belong to several |
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840 register classes;. The index is negative for hard registers |
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841 unavailable for the allocation. */ |
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842 short x_ira_class_hard_reg_index[N_REG_CLASSES][FIRST_PSEUDO_REGISTER]; |
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843 |
| 111 | 844 /* Index [CL][M] contains R if R appears somewhere in a register of the form: |
| 845 | |
| 846 (reg:M R'), R' not in x_ira_prohibited_class_mode_regs[CL][M] | |
| 847 | |
| 848 For example, if: | |
| 849 | |
| 850 - (reg:M 2) is valid and occupies two registers; | |
| 851 - register 2 belongs to CL; and | |
| 852 - register 3 belongs to the same pressure class as CL | |
| 853 | |
| 854 then (reg:M 2) contributes to [CL][M] and registers 2 and 3 will be | |
| 855 in the set. */ | |
| 856 HARD_REG_SET x_ira_useful_class_mode_regs[N_REG_CLASSES][NUM_MACHINE_MODES]; | |
|
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857 |
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858 /* The value is number of elements in the subsequent array. */ |
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859 int x_ira_important_classes_num; |
| 0 | 860 |
| 111 | 861 /* The array containing all non-empty classes. Such classes is |
|
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862 important for calculation of the hard register usage costs. */ |
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863 enum reg_class x_ira_important_classes[N_REG_CLASSES]; |
| 0 | 864 |
| 111 | 865 /* The array containing indexes of important classes in the previous |
| 866 array. The array elements are defined only for important | |
| 867 classes. */ | |
| 868 int x_ira_important_class_nums[N_REG_CLASSES]; | |
| 869 | |
| 870 /* Map class->true if class is an uniform class, false otherwise. */ | |
| 871 bool x_ira_uniform_class_p[N_REG_CLASSES]; | |
| 872 | |
|
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873 /* The biggest important class inside of intersection of the two |
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874 classes (that is calculated taking only hard registers available |
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875 for allocation into account;. If the both classes contain no hard |
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876 registers available for allocation, the value is calculated with |
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877 taking all hard-registers including fixed ones into account. */ |
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878 enum reg_class x_ira_reg_class_intersect[N_REG_CLASSES][N_REG_CLASSES]; |
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879 |
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880 /* Classes with end marker LIM_REG_CLASSES which are intersected with |
| 111 | 881 given class (the first index). That includes given class itself. |
|
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882 This is calculated taking only hard registers available for |
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883 allocation into account. */ |
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884 enum reg_class x_ira_reg_class_super_classes[N_REG_CLASSES][N_REG_CLASSES]; |
| 0 | 885 |
| 111 | 886 /* The biggest (smallest) important class inside of (covering) union |
| 887 of the two classes (that is calculated taking only hard registers | |
| 888 available for allocation into account). If the both classes | |
| 889 contain no hard registers available for allocation, the value is | |
| 890 calculated with taking all hard-registers including fixed ones | |
| 891 into account. In other words, the value is the corresponding | |
| 892 reg_class_subunion (reg_class_superunion) value. */ | |
| 893 enum reg_class x_ira_reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES]; | |
| 894 enum reg_class x_ira_reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES]; | |
| 0 | 895 |
|
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896 /* For each reg class, table listing all the classes contained in it |
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897 (excluding the class itself. Non-allocatable registers are |
| 111 | 898 excluded from the consideration). */ |
|
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899 enum reg_class x_alloc_reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES]; |
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900 |
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901 /* Array whose values are hard regset of hard registers for which |
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902 move of the hard register in given mode into itself is |
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903 prohibited. */ |
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904 HARD_REG_SET x_ira_prohibited_mode_move_regs[NUM_MACHINE_MODES]; |
| 0 | 905 |
|
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906 /* Flag of that the above array has been initialized. */ |
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907 bool x_ira_prohibited_mode_move_regs_initialized_p; |
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908 }; |
| 0 | 909 |
|
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910 extern struct target_ira_int default_target_ira_int; |
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911 #if SWITCHABLE_TARGET |
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912 extern struct target_ira_int *this_target_ira_int; |
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913 #else |
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914 #define this_target_ira_int (&default_target_ira_int) |
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915 #endif |
| 0 | 916 |
|
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917 #define ira_reg_mode_hard_regset \ |
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918 (this_target_ira_int->x_ira_reg_mode_hard_regset) |
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919 #define ira_register_move_cost \ |
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920 (this_target_ira_int->x_ira_register_move_cost) |
| 111 | 921 #define ira_max_memory_move_cost \ |
| 922 (this_target_ira_int->x_ira_max_memory_move_cost) | |
|
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923 #define ira_may_move_in_cost \ |
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924 (this_target_ira_int->x_ira_may_move_in_cost) |
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925 #define ira_may_move_out_cost \ |
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926 (this_target_ira_int->x_ira_may_move_out_cost) |
| 111 | 927 #define ira_reg_allocno_class_p \ |
| 928 (this_target_ira_int->x_ira_reg_allocno_class_p) | |
| 929 #define ira_reg_pressure_class_p \ | |
| 930 (this_target_ira_int->x_ira_reg_pressure_class_p) | |
|
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931 #define ira_non_ordered_class_hard_regs \ |
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932 (this_target_ira_int->x_ira_non_ordered_class_hard_regs) |
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933 #define ira_class_hard_reg_index \ |
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934 (this_target_ira_int->x_ira_class_hard_reg_index) |
| 111 | 935 #define ira_useful_class_mode_regs \ |
| 936 (this_target_ira_int->x_ira_useful_class_mode_regs) | |
|
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937 #define ira_important_classes_num \ |
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938 (this_target_ira_int->x_ira_important_classes_num) |
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939 #define ira_important_classes \ |
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940 (this_target_ira_int->x_ira_important_classes) |
| 111 | 941 #define ira_important_class_nums \ |
| 942 (this_target_ira_int->x_ira_important_class_nums) | |
| 943 #define ira_uniform_class_p \ | |
| 944 (this_target_ira_int->x_ira_uniform_class_p) | |
|
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945 #define ira_reg_class_intersect \ |
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946 (this_target_ira_int->x_ira_reg_class_intersect) |
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947 #define ira_reg_class_super_classes \ |
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948 (this_target_ira_int->x_ira_reg_class_super_classes) |
| 111 | 949 #define ira_reg_class_subunion \ |
| 950 (this_target_ira_int->x_ira_reg_class_subunion) | |
| 951 #define ira_reg_class_superunion \ | |
| 952 (this_target_ira_int->x_ira_reg_class_superunion) | |
|
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953 #define ira_prohibited_mode_move_regs \ |
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954 (this_target_ira_int->x_ira_prohibited_mode_move_regs) |
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955 |
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956 /* ira.c: */ |
| 0 | 957 |
| 958 extern void *ira_allocate (size_t); | |
| 959 extern void ira_free (void *addr); | |
| 960 extern bitmap ira_allocate_bitmap (void); | |
| 961 extern void ira_free_bitmap (bitmap); | |
| 962 extern void ira_print_disposition (FILE *); | |
| 963 extern void ira_debug_disposition (void); | |
| 111 | 964 extern void ira_debug_allocno_classes (void); |
| 965 extern void ira_init_register_move_cost (machine_mode); | |
| 966 extern void ira_setup_alts (rtx_insn *insn, HARD_REG_SET &alts); | |
| 967 extern int ira_get_dup_out_num (int op_num, HARD_REG_SET &alts); | |
| 0 | 968 |
| 969 /* ira-build.c */ | |
| 970 | |
| 971 /* The current loop tree node and its regno allocno map. */ | |
| 972 extern ira_loop_tree_node_t ira_curr_loop_tree_node; | |
| 973 extern ira_allocno_t *ira_curr_regno_allocno_map; | |
| 974 | |
| 111 | 975 extern void ira_debug_pref (ira_pref_t); |
| 976 extern void ira_debug_prefs (void); | |
| 977 extern void ira_debug_allocno_prefs (ira_allocno_t); | |
| 978 | |
| 0 | 979 extern void ira_debug_copy (ira_copy_t); |
| 111 | 980 extern void debug (ira_allocno_copy &ref); |
| 981 extern void debug (ira_allocno_copy *ptr); | |
| 982 | |
| 0 | 983 extern void ira_debug_copies (void); |
| 984 extern void ira_debug_allocno_copies (ira_allocno_t); | |
| 111 | 985 extern void debug (ira_allocno &ref); |
| 986 extern void debug (ira_allocno *ptr); | |
| 0 | 987 |
| 988 extern void ira_traverse_loop_tree (bool, ira_loop_tree_node_t, | |
| 989 void (*) (ira_loop_tree_node_t), | |
| 990 void (*) (ira_loop_tree_node_t)); | |
|
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991 extern ira_allocno_t ira_parent_allocno (ira_allocno_t); |
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992 extern ira_allocno_t ira_parent_or_cap_allocno (ira_allocno_t); |
| 0 | 993 extern ira_allocno_t ira_create_allocno (int, bool, ira_loop_tree_node_t); |
|
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994 extern void ira_create_allocno_objects (ira_allocno_t); |
| 111 | 995 extern void ira_set_allocno_class (ira_allocno_t, enum reg_class); |
|
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996 extern bool ira_conflict_vector_profitable_p (ira_object_t, int); |
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997 extern void ira_allocate_conflict_vec (ira_object_t, int); |
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998 extern void ira_allocate_object_conflicts (ira_object_t, int); |
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999 extern void ior_hard_reg_conflicts (ira_allocno_t, HARD_REG_SET *); |
| 0 | 1000 extern void ira_print_expanded_allocno (ira_allocno_t); |
|
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1001 extern void ira_add_live_range_to_object (ira_object_t, int, int); |
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1002 extern live_range_t ira_create_live_range (ira_object_t, int, int, |
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1003 live_range_t); |
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1004 extern live_range_t ira_copy_live_range_list (live_range_t); |
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1005 extern live_range_t ira_merge_live_ranges (live_range_t, live_range_t); |
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1006 extern bool ira_live_ranges_intersect_p (live_range_t, live_range_t); |
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1007 extern void ira_finish_live_range (live_range_t); |
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1008 extern void ira_finish_live_range_list (live_range_t); |
| 0 | 1009 extern void ira_free_allocno_updated_costs (ira_allocno_t); |
| 111 | 1010 extern ira_pref_t ira_create_pref (ira_allocno_t, int, int); |
| 1011 extern void ira_add_allocno_pref (ira_allocno_t, int, int); | |
| 1012 extern void ira_remove_pref (ira_pref_t); | |
| 1013 extern void ira_remove_allocno_prefs (ira_allocno_t); | |
| 0 | 1014 extern ira_copy_t ira_create_copy (ira_allocno_t, ira_allocno_t, |
| 111 | 1015 int, bool, rtx_insn *, |
| 1016 ira_loop_tree_node_t); | |
| 0 | 1017 extern ira_copy_t ira_add_allocno_copy (ira_allocno_t, ira_allocno_t, int, |
| 111 | 1018 bool, rtx_insn *, |
| 1019 ira_loop_tree_node_t); | |
| 0 | 1020 |
| 111 | 1021 extern int *ira_allocate_cost_vector (reg_class_t); |
| 1022 extern void ira_free_cost_vector (int *, reg_class_t); | |
| 0 | 1023 |
| 1024 extern void ira_flattening (int, int); | |
| 111 | 1025 extern bool ira_build (void); |
| 0 | 1026 extern void ira_destroy (void); |
| 1027 | |
| 1028 /* ira-costs.c */ | |
| 1029 extern void ira_init_costs_once (void); | |
| 1030 extern void ira_init_costs (void); | |
| 1031 extern void ira_costs (void); | |
| 111 | 1032 extern void ira_tune_allocno_costs (void); |
| 0 | 1033 |
| 1034 /* ira-lives.c */ | |
| 1035 | |
| 1036 extern void ira_rebuild_start_finish_chains (void); | |
|
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1037 extern void ira_print_live_range_list (FILE *, live_range_t); |
| 111 | 1038 extern void debug (live_range &ref); |
| 1039 extern void debug (live_range *ptr); | |
|
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1040 extern void ira_debug_live_range_list (live_range_t); |
| 0 | 1041 extern void ira_debug_allocno_live_ranges (ira_allocno_t); |
| 1042 extern void ira_debug_live_ranges (void); | |
| 1043 extern void ira_create_allocno_live_ranges (void); | |
| 1044 extern void ira_compress_allocno_live_ranges (void); | |
| 1045 extern void ira_finish_allocno_live_ranges (void); | |
| 111 | 1046 extern void ira_implicitly_set_insn_hard_regs (HARD_REG_SET *, |
| 1047 alternative_mask); | |
| 0 | 1048 |
| 1049 /* ira-conflicts.c */ | |
| 1050 extern void ira_debug_conflicts (bool); | |
| 1051 extern void ira_build_conflicts (void); | |
| 1052 | |
| 1053 /* ira-color.c */ | |
| 111 | 1054 extern void ira_debug_hard_regs_forest (void); |
| 0 | 1055 extern int ira_loop_edge_freq (ira_loop_tree_node_t, int, bool); |
| 1056 extern void ira_reassign_conflict_allocnos (int); | |
| 1057 extern void ira_initiate_assign (void); | |
| 1058 extern void ira_finish_assign (void); | |
| 1059 extern void ira_color (void); | |
| 1060 | |
| 1061 /* ira-emit.c */ | |
| 111 | 1062 extern void ira_initiate_emit_data (void); |
| 1063 extern void ira_finish_emit_data (void); | |
| 0 | 1064 extern void ira_emit (bool); |
| 1065 | |
| 1066 | |
| 1067 | |
| 111 | 1068 /* Return true if equivalence of pseudo REGNO is not a lvalue. */ |
| 1069 static inline bool | |
| 1070 ira_equiv_no_lvalue_p (int regno) | |
| 1071 { | |
| 1072 if (regno >= ira_reg_equiv_len) | |
| 1073 return false; | |
| 1074 return (ira_reg_equiv[regno].constant != NULL_RTX | |
| 1075 || ira_reg_equiv[regno].invariant != NULL_RTX | |
| 1076 || (ira_reg_equiv[regno].memory != NULL_RTX | |
| 1077 && MEM_READONLY_P (ira_reg_equiv[regno].memory))); | |
| 1078 } | |
| 1079 | |
| 1080 | |
| 1081 | |
| 1082 /* Initialize register costs for MODE if necessary. */ | |
| 1083 static inline void | |
| 1084 ira_init_register_move_cost_if_necessary (machine_mode mode) | |
|
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1085 { |
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1086 if (ira_register_move_cost[mode] == NULL) |
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1087 ira_init_register_move_cost (mode); |
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1088 } |
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1089 |
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1090 |
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1091 |
| 0 | 1092 /* The iterator for all allocnos. */ |
| 111 | 1093 struct ira_allocno_iterator { |
| 0 | 1094 /* The number of the current element in IRA_ALLOCNOS. */ |
| 1095 int n; | |
| 111 | 1096 }; |
| 0 | 1097 |
| 1098 /* Initialize the iterator I. */ | |
| 1099 static inline void | |
| 1100 ira_allocno_iter_init (ira_allocno_iterator *i) | |
| 1101 { | |
| 1102 i->n = 0; | |
| 1103 } | |
| 1104 | |
| 1105 /* Return TRUE if we have more allocnos to visit, in which case *A is | |
| 1106 set to the allocno to be visited. Otherwise, return FALSE. */ | |
| 1107 static inline bool | |
| 1108 ira_allocno_iter_cond (ira_allocno_iterator *i, ira_allocno_t *a) | |
| 1109 { | |
| 1110 int n; | |
| 1111 | |
| 1112 for (n = i->n; n < ira_allocnos_num; n++) | |
| 1113 if (ira_allocnos[n] != NULL) | |
| 1114 { | |
| 1115 *a = ira_allocnos[n]; | |
| 1116 i->n = n + 1; | |
| 1117 return true; | |
| 1118 } | |
| 1119 return false; | |
| 1120 } | |
| 1121 | |
| 1122 /* Loop over all allocnos. In each iteration, A is set to the next | |
| 1123 allocno. ITER is an instance of ira_allocno_iterator used to iterate | |
| 1124 the allocnos. */ | |
| 1125 #define FOR_EACH_ALLOCNO(A, ITER) \ | |
| 1126 for (ira_allocno_iter_init (&(ITER)); \ | |
| 1127 ira_allocno_iter_cond (&(ITER), &(A));) | |
|
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1128 |
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1129 /* The iterator for all objects. */ |
| 111 | 1130 struct ira_object_iterator { |
|
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1131 /* The number of the current element in ira_object_id_map. */ |
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1132 int n; |
| 111 | 1133 }; |
| 0 | 1134 |
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1135 /* Initialize the iterator I. */ |
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1136 static inline void |
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1137 ira_object_iter_init (ira_object_iterator *i) |
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1138 { |
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1139 i->n = 0; |
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1140 } |
| 0 | 1141 |
|
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1142 /* Return TRUE if we have more objects to visit, in which case *OBJ is |
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1143 set to the object to be visited. Otherwise, return FALSE. */ |
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1144 static inline bool |
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1145 ira_object_iter_cond (ira_object_iterator *i, ira_object_t *obj) |
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1146 { |
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1147 int n; |
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1148 |
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1149 for (n = i->n; n < ira_objects_num; n++) |
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1150 if (ira_object_id_map[n] != NULL) |
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1151 { |
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1152 *obj = ira_object_id_map[n]; |
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1153 i->n = n + 1; |
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1154 return true; |
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1155 } |
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1156 return false; |
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1157 } |
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1158 |
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1159 /* Loop over all objects. In each iteration, OBJ is set to the next |
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1160 object. ITER is an instance of ira_object_iterator used to iterate |
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1161 the objects. */ |
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1162 #define FOR_EACH_OBJECT(OBJ, ITER) \ |
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1163 for (ira_object_iter_init (&(ITER)); \ |
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1164 ira_object_iter_cond (&(ITER), &(OBJ));) |
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1165 |
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1166 /* The iterator for objects associated with an allocno. */ |
| 111 | 1167 struct ira_allocno_object_iterator { |
|
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1168 /* The number of the element the allocno's object array. */ |
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1169 int n; |
| 111 | 1170 }; |
|
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1171 |
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1172 /* Initialize the iterator I. */ |
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1173 static inline void |
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1174 ira_allocno_object_iter_init (ira_allocno_object_iterator *i) |
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1175 { |
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1176 i->n = 0; |
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1177 } |
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1178 |
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1179 /* Return TRUE if we have more objects to visit in allocno A, in which |
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1180 case *O is set to the object to be visited. Otherwise, return |
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1181 FALSE. */ |
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1182 static inline bool |
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1183 ira_allocno_object_iter_cond (ira_allocno_object_iterator *i, ira_allocno_t a, |
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1184 ira_object_t *o) |
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1185 { |
| 111 | 1186 int n = i->n++; |
| 1187 if (n < ALLOCNO_NUM_OBJECTS (a)) | |
| 1188 { | |
| 1189 *o = ALLOCNO_OBJECT (a, n); | |
| 1190 return true; | |
| 1191 } | |
| 1192 return false; | |
|
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1193 } |
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1194 |
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1195 /* Loop over all objects associated with allocno A. In each |
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1196 iteration, O is set to the next object. ITER is an instance of |
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1197 ira_allocno_object_iterator used to iterate the conflicts. */ |
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1198 #define FOR_EACH_ALLOCNO_OBJECT(A, O, ITER) \ |
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1199 for (ira_allocno_object_iter_init (&(ITER)); \ |
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1200 ira_allocno_object_iter_cond (&(ITER), (A), &(O));) |
| 0 | 1201 |
| 1202 | |
| 111 | 1203 /* The iterator for prefs. */ |
| 1204 struct ira_pref_iterator { | |
| 1205 /* The number of the current element in IRA_PREFS. */ | |
| 1206 int n; | |
| 1207 }; | |
| 1208 | |
| 1209 /* Initialize the iterator I. */ | |
| 1210 static inline void | |
| 1211 ira_pref_iter_init (ira_pref_iterator *i) | |
| 1212 { | |
| 1213 i->n = 0; | |
| 1214 } | |
| 1215 | |
| 1216 /* Return TRUE if we have more prefs to visit, in which case *PREF is | |
| 1217 set to the pref to be visited. Otherwise, return FALSE. */ | |
| 1218 static inline bool | |
| 1219 ira_pref_iter_cond (ira_pref_iterator *i, ira_pref_t *pref) | |
| 1220 { | |
| 1221 int n; | |
| 1222 | |
| 1223 for (n = i->n; n < ira_prefs_num; n++) | |
| 1224 if (ira_prefs[n] != NULL) | |
| 1225 { | |
| 1226 *pref = ira_prefs[n]; | |
| 1227 i->n = n + 1; | |
| 1228 return true; | |
| 1229 } | |
| 1230 return false; | |
| 1231 } | |
| 1232 | |
| 1233 /* Loop over all prefs. In each iteration, P is set to the next | |
| 1234 pref. ITER is an instance of ira_pref_iterator used to iterate | |
| 1235 the prefs. */ | |
| 1236 #define FOR_EACH_PREF(P, ITER) \ | |
| 1237 for (ira_pref_iter_init (&(ITER)); \ | |
| 1238 ira_pref_iter_cond (&(ITER), &(P));) | |
| 1239 | |
| 1240 | |
| 0 | 1241 /* The iterator for copies. */ |
| 111 | 1242 struct ira_copy_iterator { |
| 0 | 1243 /* The number of the current element in IRA_COPIES. */ |
| 1244 int n; | |
| 111 | 1245 }; |
| 0 | 1246 |
| 1247 /* Initialize the iterator I. */ | |
| 1248 static inline void | |
| 1249 ira_copy_iter_init (ira_copy_iterator *i) | |
| 1250 { | |
| 1251 i->n = 0; | |
| 1252 } | |
| 1253 | |
| 1254 /* Return TRUE if we have more copies to visit, in which case *CP is | |
| 1255 set to the copy to be visited. Otherwise, return FALSE. */ | |
| 1256 static inline bool | |
| 1257 ira_copy_iter_cond (ira_copy_iterator *i, ira_copy_t *cp) | |
| 1258 { | |
| 1259 int n; | |
| 1260 | |
| 1261 for (n = i->n; n < ira_copies_num; n++) | |
| 1262 if (ira_copies[n] != NULL) | |
| 1263 { | |
| 1264 *cp = ira_copies[n]; | |
| 1265 i->n = n + 1; | |
| 1266 return true; | |
| 1267 } | |
| 1268 return false; | |
| 1269 } | |
| 1270 | |
| 1271 /* Loop over all copies. In each iteration, C is set to the next | |
| 1272 copy. ITER is an instance of ira_copy_iterator used to iterate | |
| 1273 the copies. */ | |
| 1274 #define FOR_EACH_COPY(C, ITER) \ | |
| 1275 for (ira_copy_iter_init (&(ITER)); \ | |
| 1276 ira_copy_iter_cond (&(ITER), &(C));) | |
| 1277 | |
|
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1278 /* The iterator for object conflicts. */ |
| 111 | 1279 struct ira_object_conflict_iterator { |
| 0 | 1280 |
| 1281 /* TRUE if the conflicts are represented by vector of allocnos. */ | |
|
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1282 bool conflict_vec_p; |
| 0 | 1283 |
| 1284 /* The conflict vector or conflict bit vector. */ | |
| 1285 void *vec; | |
| 1286 | |
| 1287 /* The number of the current element in the vector (of type | |
|
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1288 ira_object_t or IRA_INT_TYPE). */ |
| 0 | 1289 unsigned int word_num; |
| 1290 | |
| 1291 /* The bit vector size. It is defined only if | |
|
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1292 OBJECT_CONFLICT_VEC_P is FALSE. */ |
| 0 | 1293 unsigned int size; |
| 1294 | |
| 1295 /* The current bit index of bit vector. It is defined only if | |
|
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1296 OBJECT_CONFLICT_VEC_P is FALSE. */ |
| 0 | 1297 unsigned int bit_num; |
| 1298 | |
|
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1299 /* The object id corresponding to the 1st bit of the bit vector. It |
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1300 is defined only if OBJECT_CONFLICT_VEC_P is FALSE. */ |
| 0 | 1301 int base_conflict_id; |
| 1302 | |
| 1303 /* The word of bit vector currently visited. It is defined only if | |
|
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1304 OBJECT_CONFLICT_VEC_P is FALSE. */ |
| 0 | 1305 unsigned IRA_INT_TYPE word; |
| 111 | 1306 }; |
| 0 | 1307 |
| 1308 /* Initialize the iterator I with ALLOCNO conflicts. */ | |
| 1309 static inline void | |
|
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1310 ira_object_conflict_iter_init (ira_object_conflict_iterator *i, |
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1311 ira_object_t obj) |
| 0 | 1312 { |
|
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1313 i->conflict_vec_p = OBJECT_CONFLICT_VEC_P (obj); |
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1314 i->vec = OBJECT_CONFLICT_ARRAY (obj); |
| 0 | 1315 i->word_num = 0; |
|
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1316 if (i->conflict_vec_p) |
| 0 | 1317 i->size = i->bit_num = i->base_conflict_id = i->word = 0; |
| 1318 else | |
| 1319 { | |
|
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1320 if (OBJECT_MIN (obj) > OBJECT_MAX (obj)) |
| 0 | 1321 i->size = 0; |
| 1322 else | |
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1323 i->size = ((OBJECT_MAX (obj) - OBJECT_MIN (obj) |
| 0 | 1324 + IRA_INT_BITS) |
| 1325 / IRA_INT_BITS) * sizeof (IRA_INT_TYPE); | |
| 1326 i->bit_num = 0; | |
|
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1327 i->base_conflict_id = OBJECT_MIN (obj); |
| 0 | 1328 i->word = (i->size == 0 ? 0 : ((IRA_INT_TYPE *) i->vec)[0]); |
| 1329 } | |
| 1330 } | |
| 1331 | |
| 1332 /* Return TRUE if we have more conflicting allocnos to visit, in which | |
| 1333 case *A is set to the allocno to be visited. Otherwise, return | |
| 1334 FALSE. */ | |
| 1335 static inline bool | |
|
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1336 ira_object_conflict_iter_cond (ira_object_conflict_iterator *i, |
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1337 ira_object_t *pobj) |
| 0 | 1338 { |
|
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1339 ira_object_t obj; |
| 0 | 1340 |
|
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1341 if (i->conflict_vec_p) |
| 0 | 1342 { |
| 111 | 1343 obj = ((ira_object_t *) i->vec)[i->word_num++]; |
|
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1344 if (obj == NULL) |
| 0 | 1345 return false; |
| 1346 } | |
| 1347 else | |
| 1348 { | |
| 111 | 1349 unsigned IRA_INT_TYPE word = i->word; |
| 1350 unsigned int bit_num = i->bit_num; | |
| 1351 | |
| 0 | 1352 /* Skip words that are zeros. */ |
| 111 | 1353 for (; word == 0; word = ((IRA_INT_TYPE *) i->vec)[i->word_num]) |
| 0 | 1354 { |
| 1355 i->word_num++; | |
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1356 |
| 0 | 1357 /* If we have reached the end, break. */ |
| 1358 if (i->word_num * sizeof (IRA_INT_TYPE) >= i->size) | |
| 1359 return false; | |
|
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1360 |
| 111 | 1361 bit_num = i->word_num * IRA_INT_BITS; |
| 0 | 1362 } |
|
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1363 |
| 0 | 1364 /* Skip bits that are zero. */ |
| 111 | 1365 for (; (word & 1) == 0; word >>= 1) |
| 1366 bit_num++; | |
|
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1367 |
| 111 | 1368 obj = ira_object_id_map[bit_num + i->base_conflict_id]; |
| 1369 i->bit_num = bit_num + 1; | |
| 1370 i->word = word >> 1; | |
|
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1371 } |
|
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1372 |
|
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1373 *pobj = obj; |
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1374 return true; |
| 0 | 1375 } |
| 1376 | |
|
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1377 /* Loop over all objects conflicting with OBJ. In each iteration, |
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1378 CONF is set to the next conflicting object. ITER is an instance |
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1379 of ira_object_conflict_iterator used to iterate the conflicts. */ |
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1380 #define FOR_EACH_OBJECT_CONFLICT(OBJ, CONF, ITER) \ |
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1381 for (ira_object_conflict_iter_init (&(ITER), (OBJ)); \ |
| 111 | 1382 ira_object_conflict_iter_cond (&(ITER), &(CONF));) |
| 0 | 1383 |
| 1384 | |
| 1385 | |
| 111 | 1386 /* The function returns TRUE if at least one hard register from ones |
| 1387 starting with HARD_REGNO and containing value of MODE are in set | |
| 0 | 1388 HARD_REGSET. */ |
| 1389 static inline bool | |
| 111 | 1390 ira_hard_reg_set_intersection_p (int hard_regno, machine_mode mode, |
| 1391 HARD_REG_SET hard_regset) | |
| 1392 { | |
| 1393 int i; | |
| 1394 | |
| 1395 gcc_assert (hard_regno >= 0); | |
| 1396 for (i = hard_regno_nregs (hard_regno, mode) - 1; i >= 0; i--) | |
| 1397 if (TEST_HARD_REG_BIT (hard_regset, hard_regno + i)) | |
| 1398 return true; | |
| 1399 return false; | |
| 1400 } | |
| 1401 | |
| 1402 /* Return number of hard registers in hard register SET. */ | |
| 1403 static inline int | |
| 1404 hard_reg_set_size (HARD_REG_SET set) | |
| 1405 { | |
| 1406 int i, size; | |
| 1407 | |
| 1408 for (size = i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 1409 if (TEST_HARD_REG_BIT (set, i)) | |
| 1410 size++; | |
| 1411 return size; | |
| 1412 } | |
| 1413 | |
| 1414 /* The function returns TRUE if hard registers starting with | |
| 1415 HARD_REGNO and containing value of MODE are fully in set | |
| 1416 HARD_REGSET. */ | |
| 1417 static inline bool | |
| 1418 ira_hard_reg_in_set_p (int hard_regno, machine_mode mode, | |
| 1419 HARD_REG_SET hard_regset) | |
| 0 | 1420 { |
| 1421 int i; | |
| 1422 | |
| 1423 ira_assert (hard_regno >= 0); | |
| 111 | 1424 for (i = hard_regno_nregs (hard_regno, mode) - 1; i >= 0; i--) |
| 1425 if (!TEST_HARD_REG_BIT (hard_regset, hard_regno + i)) | |
| 0 | 1426 return false; |
| 1427 return true; | |
| 1428 } | |
| 1429 | |
| 1430 | |
| 1431 | |
| 1432 /* To save memory we use a lazy approach for allocation and | |
| 1433 initialization of the cost vectors. We do this only when it is | |
| 1434 really necessary. */ | |
| 1435 | |
| 111 | 1436 /* Allocate cost vector *VEC for hard registers of ACLASS and |
| 0 | 1437 initialize the elements by VAL if it is necessary */ |
| 1438 static inline void | |
| 111 | 1439 ira_allocate_and_set_costs (int **vec, reg_class_t aclass, int val) |
| 0 | 1440 { |
| 1441 int i, *reg_costs; | |
| 1442 int len; | |
| 1443 | |
| 1444 if (*vec != NULL) | |
| 1445 return; | |
| 111 | 1446 *vec = reg_costs = ira_allocate_cost_vector (aclass); |
| 1447 len = ira_class_hard_regs_num[(int) aclass]; | |
| 0 | 1448 for (i = 0; i < len; i++) |
| 1449 reg_costs[i] = val; | |
| 1450 } | |
| 1451 | |
| 111 | 1452 /* Allocate cost vector *VEC for hard registers of ACLASS and copy |
| 1453 values of vector SRC into the vector if it is necessary */ | |
| 0 | 1454 static inline void |
| 111 | 1455 ira_allocate_and_copy_costs (int **vec, enum reg_class aclass, int *src) |
| 0 | 1456 { |
| 1457 int len; | |
| 1458 | |
| 1459 if (*vec != NULL || src == NULL) | |
| 1460 return; | |
| 111 | 1461 *vec = ira_allocate_cost_vector (aclass); |
| 1462 len = ira_class_hard_regs_num[aclass]; | |
| 0 | 1463 memcpy (*vec, src, sizeof (int) * len); |
| 1464 } | |
| 1465 | |
| 111 | 1466 /* Allocate cost vector *VEC for hard registers of ACLASS and add |
| 1467 values of vector SRC into the vector if it is necessary */ | |
| 0 | 1468 static inline void |
| 111 | 1469 ira_allocate_and_accumulate_costs (int **vec, enum reg_class aclass, int *src) |
| 0 | 1470 { |
| 1471 int i, len; | |
| 1472 | |
| 1473 if (src == NULL) | |
| 1474 return; | |
| 111 | 1475 len = ira_class_hard_regs_num[aclass]; |
| 0 | 1476 if (*vec == NULL) |
| 1477 { | |
| 111 | 1478 *vec = ira_allocate_cost_vector (aclass); |
| 0 | 1479 memset (*vec, 0, sizeof (int) * len); |
| 1480 } | |
| 1481 for (i = 0; i < len; i++) | |
| 1482 (*vec)[i] += src[i]; | |
| 1483 } | |
| 1484 | |
| 111 | 1485 /* Allocate cost vector *VEC for hard registers of ACLASS and copy |
| 1486 values of vector SRC into the vector or initialize it by VAL (if | |
| 1487 SRC is null). */ | |
| 0 | 1488 static inline void |
| 111 | 1489 ira_allocate_and_set_or_copy_costs (int **vec, enum reg_class aclass, |
| 0 | 1490 int val, int *src) |
| 1491 { | |
| 1492 int i, *reg_costs; | |
| 1493 int len; | |
| 1494 | |
| 1495 if (*vec != NULL) | |
| 1496 return; | |
| 111 | 1497 *vec = reg_costs = ira_allocate_cost_vector (aclass); |
| 1498 len = ira_class_hard_regs_num[aclass]; | |
| 0 | 1499 if (src != NULL) |
| 1500 memcpy (reg_costs, src, sizeof (int) * len); | |
| 1501 else | |
| 1502 { | |
| 1503 for (i = 0; i < len; i++) | |
| 1504 reg_costs[i] = val; | |
| 1505 } | |
| 1506 } | |
| 111 | 1507 |
| 1508 extern rtx ira_create_new_reg (rtx); | |
| 1509 extern int first_moveable_pseudo, last_moveable_pseudo; | |
| 1510 | |
| 1511 #endif /* GCC_IRA_INT_H */ |