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1 ;; Predicate definitions for SPARC.
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145
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2 ;; Copyright (C) 2005-2020 Free Software Foundation, Inc.
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3 ;;
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4 ;; This file is part of GCC.
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5 ;;
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6 ;; GCC is free software; you can redistribute it and/or modify
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7 ;; it under the terms of the GNU General Public License as published by
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8 ;; the Free Software Foundation; either version 3, or (at your option)
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9 ;; any later version.
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10 ;;
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11 ;; GCC is distributed in the hope that it will be useful,
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12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 ;; GNU General Public License for more details.
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15 ;;
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16 ;; You should have received a copy of the GNU General Public License
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17 ;; along with GCC; see the file COPYING3. If not see
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18 ;; <http://www.gnu.org/licenses/>.
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19
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20 ;; Predicates for numerical constants.
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21
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22 ;; Return true if OP is the zero constant for MODE.
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23 (define_predicate "const_zero_operand"
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111
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24 (and (match_code "const_int,const_wide_int,const_double,const_vector")
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25 (match_test "op == CONST0_RTX (mode)")))
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26
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111
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27 ;; Return true if the integer representation of OP is all ones.
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28 (define_predicate "const_all_ones_operand"
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29 (and (match_code "const_int,const_wide_int,const_double,const_vector")
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30 (match_test "INTEGRAL_MODE_P (GET_MODE (op))")
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31 (match_test "op == CONSTM1_RTX (GET_MODE (op))")))
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32
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33 ;; Return true if OP is the integer constant 4096.
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34 (define_predicate "const_4096_operand"
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35 (and (match_code "const_int")
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36 (match_test "INTVAL (op) == 4096")))
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37
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38 ;; Return true if OP is a constant that is representable by a 13-bit
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39 ;; signed field. This is an acceptable immediate operand for most
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40 ;; 3-address instructions.
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41 (define_predicate "small_int_operand"
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42 (and (match_code "const_int")
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43 (match_test "SPARC_SIMM13_P (INTVAL (op))")))
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44
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45 ;; Return true if OP is a constant operand for the umul instruction. That
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46 ;; instruction sign-extends immediate values just like all other SPARC
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47 ;; instructions, but interprets the extended result as an unsigned number.
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48 (define_predicate "uns_small_int_operand"
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111
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49 (and (match_code "const_int")
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50 (match_test "((INTVAL (op) >= 0 && INTVAL (op) < 0x1000)
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51 || (INTVAL (op) >= 0xFFFFF000
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52 && INTVAL (op) <= 0xFFFFFFFF))")))
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0
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53
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54 ;; Return true if OP is a constant that can be loaded by the sethi instruction.
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55 ;; The first test avoids emitting sethi to load zero for example.
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56 (define_predicate "const_high_operand"
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57 (and (match_code "const_int")
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58 (and (not (match_operand 0 "small_int_operand"))
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59 (match_test "SPARC_SETHI_P (INTVAL (op) & GET_MODE_MASK (mode))"))))
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60
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61 ;; Return true if OP is a constant whose 1's complement can be loaded by the
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62 ;; sethi instruction.
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63 (define_predicate "const_compl_high_operand"
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64 (and (match_code "const_int")
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65 (and (not (match_operand 0 "small_int_operand"))
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66 (match_test "SPARC_SETHI_P (~INTVAL (op) & GET_MODE_MASK (mode))"))))
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67
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68 ;; Return true if OP is a FP constant that needs to be loaded by the sethi/losum
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69 ;; pair of instructions.
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70 (define_predicate "fp_const_high_losum_operand"
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71 (match_operand 0 "const_double_operand")
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72 {
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73 gcc_assert (mode == SFmode);
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74 return fp_high_losum_p (op);
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75 })
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76
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77 ;; Return true if OP is a const_double or const_vector.
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78 (define_predicate "const_double_or_vector_operand"
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79 (match_code "const_double,const_vector"))
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80
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111
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81 ;; Return true if OP is Zero, or if the target is V7.
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82 (define_predicate "zero_or_v7_operand"
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83 (and (match_code "const_int")
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84 (ior (match_test "INTVAL (op) == 0")
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85 (match_test "!TARGET_V8 && !TARGET_V9"))))
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0
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86
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87 ;; Predicates for symbolic constants.
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88
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89 ;; Return true if OP is either a symbol reference or a sum of a symbol
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90 ;; reference and a constant.
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91 (define_predicate "symbolic_operand"
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92 (match_code "symbol_ref,label_ref,const")
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93 {
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94 machine_mode omode = GET_MODE (op);
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95
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96 if (omode != mode && omode != VOIDmode && mode != VOIDmode)
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97 return false;
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98
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99 switch (GET_CODE (op))
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100 {
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101 case SYMBOL_REF:
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102 return !SYMBOL_REF_TLS_MODEL (op);
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103
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104 case LABEL_REF:
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105 return true;
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106
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107 case CONST:
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108 op = XEXP (op, 0);
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109 return (((GET_CODE (XEXP (op, 0)) == SYMBOL_REF
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110 && !SYMBOL_REF_TLS_MODEL (XEXP (op, 0)))
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111 || GET_CODE (XEXP (op, 0)) == LABEL_REF)
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112 && GET_CODE (XEXP (op, 1)) == CONST_INT);
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113
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114 default:
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115 gcc_unreachable ();
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116 }
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117 })
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118
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119 ;; Return true if OP is a symbolic operand for the TLS Global Dynamic model.
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120 (define_predicate "tgd_symbolic_operand"
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121 (and (match_code "symbol_ref")
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122 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_GLOBAL_DYNAMIC")))
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123
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124 ;; Return true if OP is a symbolic operand for the TLS Local Dynamic model.
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125 (define_predicate "tld_symbolic_operand"
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126 (and (match_code "symbol_ref")
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127 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_DYNAMIC")))
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128
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129 ;; Return true if OP is a symbolic operand for the TLS Initial Exec model.
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130 (define_predicate "tie_symbolic_operand"
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131 (and (match_code "symbol_ref")
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132 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_INITIAL_EXEC")))
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133
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134 ;; Return true if OP is a symbolic operand for the TLS Local Exec model.
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135 (define_predicate "tle_symbolic_operand"
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136 (and (match_code "symbol_ref")
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137 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_EXEC")))
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138
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139 ;; Return true if the operand is an argument used in generating PIC references
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140 ;; in either the medium/low or embedded medium/anywhere code models on V9.
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141 ;; Check for (const (minus (symbol_ref:GOT)
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142 ;; (const (minus (label) (pc)))))
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143 (define_predicate "medium_pic_operand"
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144 (match_code "const")
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145 {
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146 /* Check for (const (minus (symbol_ref:GOT)
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147 (const (minus (label) (pc))))). */
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148 op = XEXP (op, 0);
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149 return GET_CODE (op) == MINUS
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150 && GET_CODE (XEXP (op, 0)) == SYMBOL_REF
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151 && GET_CODE (XEXP (op, 1)) == CONST
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152 && GET_CODE (XEXP (XEXP (op, 1), 0)) == MINUS;
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153 })
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154
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155 ;; Return true if OP is a LABEL_REF of mode MODE.
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156 (define_predicate "label_ref_operand"
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157 (and (match_code "label_ref")
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158 (match_test "GET_MODE (op) == mode")))
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159
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160 ;; Return true if OP is a data segment reference. This includes the readonly
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161 ;; data segment or, in other words, anything but the text segment.
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162 ;; This is needed in the embedded medium/anywhere code model on V9. These
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163 ;; values are accessed with EMBMEDANY_BASE_REG. */
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164 (define_predicate "data_segment_operand"
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165 (match_code "symbol_ref,plus,const")
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166 {
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167 switch (GET_CODE (op))
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168 {
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169 case SYMBOL_REF :
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170 return ! SYMBOL_REF_FUNCTION_P (op);
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171 case PLUS :
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172 /* Assume canonical format of symbol + constant.
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173 Fall through. */
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174 case CONST :
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175 return data_segment_operand (XEXP (op, 0), VOIDmode);
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176 default :
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177 gcc_unreachable ();
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178 }
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179 })
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180
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181 ;; Return true if OP is a text segment reference.
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182 ;; This is needed in the embedded medium/anywhere code model on V9.
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183 (define_predicate "text_segment_operand"
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184 (match_code "label_ref,symbol_ref,plus,const")
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185 {
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186 switch (GET_CODE (op))
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187 {
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188 case LABEL_REF :
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189 return true;
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190 case SYMBOL_REF :
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191 return SYMBOL_REF_FUNCTION_P (op);
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192 case PLUS :
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193 /* Assume canonical format of symbol + constant.
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194 Fall through. */
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195 case CONST :
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196 return text_segment_operand (XEXP (op, 0), VOIDmode);
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197 default :
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198 gcc_unreachable ();
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199 }
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200 })
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201
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202
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203 ;; Predicates for registers.
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204
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205 ;; Return true if OP is either the zero constant or a register.
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206 (define_predicate "register_or_zero_operand"
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207 (ior (match_operand 0 "register_operand")
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208 (match_operand 0 "const_zero_operand")))
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209
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111
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210 (define_predicate "register_or_v9_zero_operand"
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211 (ior (match_operand 0 "register_operand")
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212 (and (match_test "TARGET_V9")
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213 (match_operand 0 "const_zero_operand"))))
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214
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215 ;; Return true if OP is either the zero constant, the all-ones
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216 ;; constant, or a register.
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217 (define_predicate "register_or_zero_or_all_ones_operand"
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218 (ior (match_operand 0 "register_or_zero_operand")
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219 (match_operand 0 "const_all_ones_operand")))
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220
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221 ;; Return true if OP is a register operand in a floating point register.
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222 (define_predicate "fp_register_operand"
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223 (match_operand 0 "register_operand")
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224 {
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225 if (GET_CODE (op) == SUBREG)
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226 op = SUBREG_REG (op); /* Possibly a MEM */
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227 return REG_P (op) && SPARC_FP_REG_P (REGNO (op));
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228 })
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229
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111
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230 ;; Return true if OP is an integer register of the appropriate mode
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231 ;; for a cstore result.
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232 (define_special_predicate "cstore_result_operand"
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233 (match_test "register_operand (op, TARGET_ARCH64 ? DImode : SImode)"))
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234
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235 ;; Return true if OP is a floating point condition code register.
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236 (define_predicate "fcc_register_operand"
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111
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237 (and (match_code "reg")
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238 (match_test "((unsigned) REGNO (op) - SPARC_FIRST_V9_FCC_REG) < 4")))
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239
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240 ;; Return true if OP is the floating point condition code register fcc0.
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241 (define_predicate "fcc0_register_operand"
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111
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242 (and (match_code "reg")
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243 (match_test "REGNO (op) == SPARC_FCC_REG")))
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244
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111
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245 ;; Return true if OP is an integer condition code register.
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246 (define_predicate "icc_register_operand"
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247 (and (match_code "reg")
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248 (match_test "REGNO (op) == SPARC_ICC_REG")))
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249
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250 ;; Return true if OP is an integer or floating point condition code register.
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251 (define_predicate "icc_or_fcc_register_operand"
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111
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252 (ior (match_operand 0 "icc_register_operand")
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253 (match_operand 0 "fcc_register_operand")))
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254
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255
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256 ;; Predicates for arithmetic instructions.
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257
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258 ;; Return true if OP is a register, or is a constant that is representable
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259 ;; by a 13-bit signed field. This is an acceptable operand for most
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260 ;; 3-address instructions.
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261 (define_predicate "arith_operand"
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262 (ior (match_operand 0 "register_operand")
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263 (match_operand 0 "small_int_operand")))
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264
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265 ;; 64-bit: Same as above.
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266 ;; 32-bit: Return true if OP is a register, or is a constant that is
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267 ;; representable by a couple of 13-bit signed fields. This is an
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268 ;; acceptable operand for most 3-address splitters.
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269 (define_predicate "arith_double_operand"
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111
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270 (match_code "const_int,reg,subreg")
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0
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271 {
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272 bool arith_simple_operand = arith_operand (op, mode);
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273 HOST_WIDE_INT m1, m2;
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274
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275 if (TARGET_ARCH64 || arith_simple_operand)
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276 return arith_simple_operand;
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277
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278 if (GET_CODE (op) != CONST_INT)
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279 return false;
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111
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280
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281 m1 = trunc_int_for_mode (INTVAL (op), SImode);
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282 m2 = trunc_int_for_mode (INTVAL (op) >> 32, SImode);
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283
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284 return SPARC_SIMM13_P (m1) && SPARC_SIMM13_P (m2);
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285 })
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286
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287 ;; Return true if OP is suitable as second operand for add/sub.
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288 (define_predicate "arith_add_operand"
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289 (ior (match_operand 0 "arith_operand")
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290 (match_operand 0 "const_4096_operand")))
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111
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291
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292 ;; Return true if OP is suitable as second double operand for add/sub.
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293 (define_predicate "arith_double_add_operand"
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111
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294 (match_code "const_int,reg,subreg")
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295 {
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296 if (arith_double_operand (op, mode))
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297 return true;
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298
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299 return TARGET_ARCH64 && const_4096_operand (op, mode);
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300 })
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301
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302 ;; Return true if OP is a register, or is a CONST_INT that can fit in a
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303 ;; signed 10-bit immediate field. This is an acceptable SImode operand for
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304 ;; the movrcc instructions.
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305 (define_predicate "arith10_operand"
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306 (ior (match_operand 0 "register_operand")
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307 (and (match_code "const_int")
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308 (match_test "SPARC_SIMM10_P (INTVAL (op))"))))
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309
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310 ;; Return true if OP is a register, or is a CONST_INT that can fit in a
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311 ;; signed 11-bit immediate field. This is an acceptable SImode operand for
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312 ;; the movcc instructions.
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313 (define_predicate "arith11_operand"
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314 (ior (match_operand 0 "register_operand")
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315 (and (match_code "const_int")
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316 (match_test "SPARC_SIMM11_P (INTVAL (op))"))))
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317
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318 ;; Return true if OP is a register or a constant for the umul instruction.
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319 (define_predicate "uns_arith_operand"
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320 (ior (match_operand 0 "register_operand")
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321 (match_operand 0 "uns_small_int_operand")))
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322
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111
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323 ;; Return true if OP is a register, or is a CONST_INT that can fit in a
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324 ;; signed 5-bit immediate field. This is an acceptable second operand for
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325 ;; the cbcond instructions.
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326 (define_predicate "arith5_operand"
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327 (ior (match_operand 0 "register_operand")
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328 (and (match_code "const_int")
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329 (match_test "SPARC_SIMM5_P (INTVAL (op))"))))
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330
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331 ;; Return true if OP is a constant in the range 0..7. This is an
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332 ;; acceptable second operand for dictunpack instructions setting a
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333 ;; V8QI mode in the destination register.
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334 (define_predicate "imm5_operand_dictunpack8"
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335 (and (match_code "const_int")
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336 (match_test "(INTVAL (op) >= 0 && INTVAL (op) < 8)")))
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337
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338 ;; Return true if OP is a constant in the range 7..15. This is an
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339 ;; acceptable second operand for dictunpack instructions setting a
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340 ;; V4HI mode in the destination register.
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341 (define_predicate "imm5_operand_dictunpack16"
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342 (and (match_code "const_int")
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343 (match_test "(INTVAL (op) >= 8 && INTVAL (op) < 16)")))
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344
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345 ;; Return true if OP is a constant in the range 15..31. This is an
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346 ;; acceptable second operand for dictunpack instructions setting a
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347 ;; V2SI mode in the destination register.
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348 (define_predicate "imm5_operand_dictunpack32"
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349 (and (match_code "const_int")
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350 (match_test "(INTVAL (op) >= 16 && INTVAL (op) < 32)")))
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351
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352 ;; Return true if OP is a constant that is representable by a 2-bit
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353 ;; unsigned field. This is an acceptable third operand for
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354 ;; fpcmp*shl instructions.
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355 (define_predicate "imm2_operand"
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356 (and (match_code "const_int")
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357 (match_test "SPARC_IMM2_P (INTVAL (op))")))
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0
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358
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359 ;; Predicates for miscellaneous instructions.
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360
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361 ;; Return true if OP is valid for the lhs of a comparison insn.
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362 (define_predicate "compare_operand"
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363 (match_code "reg,subreg,zero_extract")
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364 {
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365 if (GET_CODE (op) == ZERO_EXTRACT)
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366 return (register_operand (XEXP (op, 0), mode)
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367 && small_int_operand (XEXP (op, 1), mode)
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368 && small_int_operand (XEXP (op, 2), mode)
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369 /* This matches cmp_zero_extract. */
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370 && ((mode == SImode
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371 && INTVAL (XEXP (op, 2)) > 19)
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372 /* This matches cmp_zero_extract_sp64. */
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373 || (TARGET_ARCH64
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374 && mode == DImode
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375 && INTVAL (XEXP (op, 2)) > 51)));
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111
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376
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377 return register_operand (op, mode);
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0
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378 })
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379
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380 ;; Return true if OP is a valid operand for the source of a move insn.
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381 (define_predicate "input_operand"
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382 (match_code "const_int,const_double,const_vector,reg,subreg,mem")
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383 {
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384 enum mode_class mclass;
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385
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386 /* If both modes are non-void they must be the same. */
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387 if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op))
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388 return false;
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389
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390 mclass = GET_MODE_CLASS (mode);
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391
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392 /* Allow any 1-instruction integer constant. */
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393 if (mclass == MODE_INT
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111
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394 && mode != TImode
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0
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395 && (small_int_operand (op, mode) || const_high_operand (op, mode)))
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396 return true;
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397
|
|
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398 /* If 32-bit mode and this is a DImode constant, allow it
|
|
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399 so that the splits can be generated. */
|
|
111
|
400 if (TARGET_ARCH32 && mode == DImode && GET_CODE (op) == CONST_INT)
|
|
0
|
401 return true;
|
|
|
402
|
|
111
|
403 /* Allow FP constants to be built in integer registers. */
|
|
|
404 if (mclass == MODE_FLOAT && GET_CODE (op) == CONST_DOUBLE)
|
|
0
|
405 return true;
|
|
|
406
|
|
111
|
407 if (mclass == MODE_VECTOR_INT && const_all_ones_operand (op, mode))
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|
|
408 return true;
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|
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409
|
|
|
410 if (register_or_zero_operand (op, mode))
|
|
0
|
411 return true;
|
|
|
412
|
|
|
413 /* If this is a SUBREG, look inside so that we handle paradoxical ones. */
|
|
|
414 if (GET_CODE (op) == SUBREG)
|
|
|
415 op = SUBREG_REG (op);
|
|
|
416
|
|
|
417 /* Check for valid MEM forms. */
|
|
|
418 if (GET_CODE (op) == MEM)
|
|
111
|
419 {
|
|
|
420 /* Except when LRA is precisely working hard to make them valid
|
|
|
421 and relying entirely on the constraints. */
|
|
|
422 if (lra_in_progress)
|
|
|
423 return true;
|
|
|
424
|
|
|
425 return memory_address_p (mode, XEXP (op, 0));
|
|
|
426 }
|
|
0
|
427
|
|
|
428 return false;
|
|
|
429 })
|
|
|
430
|
|
|
431 ;; Return true if OP is an address suitable for a call insn.
|
|
|
432 ;; Call insn on SPARC can take a PC-relative constant address
|
|
|
433 ;; or any regular memory address.
|
|
|
434 (define_predicate "call_address_operand"
|
|
|
435 (ior (match_operand 0 "symbolic_operand")
|
|
|
436 (match_test "memory_address_p (Pmode, op)")))
|
|
|
437
|
|
|
438 ;; Return true if OP is an operand suitable for a call insn.
|
|
|
439 (define_predicate "call_operand"
|
|
|
440 (and (match_code "mem")
|
|
|
441 (match_test "call_address_operand (XEXP (op, 0), mode)")))
|
|
|
442
|
|
|
443
|
|
111
|
444 (define_predicate "mem_noofs_operand"
|
|
|
445 (and (match_code "mem")
|
|
|
446 (match_code "reg" "0")))
|
|
|
447
|
|
0
|
448 ;; Predicates for operators.
|
|
|
449
|
|
111
|
450 ;; Return true if OP is a valid comparison operator for CCNZmode.
|
|
|
451 (define_predicate "nz_comparison_operator"
|
|
|
452 (match_code "eq,ne,lt,ge"))
|
|
|
453
|
|
|
454 ;; Return true if OP is a valid comparison operator for CCCmode.
|
|
|
455 (define_predicate "c_comparison_operator"
|
|
|
456 (match_code "ltu,geu"))
|
|
|
457
|
|
|
458 ;; Return true if OP is a valid comparison operator for CCVmode.
|
|
|
459 (define_predicate "v_comparison_operator"
|
|
|
460 (match_code "eq,ne"))
|
|
|
461
|
|
|
462 ;; Return true if OP is an integer comparison operator. This allows
|
|
|
463 ;; the use of MATCH_OPERATOR to recognize all the branch insns.
|
|
|
464 (define_predicate "icc_comparison_operator"
|
|
|
465 (match_operand 0 "ordered_comparison_operator")
|
|
0
|
466 {
|
|
111
|
467 switch (GET_MODE (XEXP (op, 0)))
|
|
|
468 {
|
|
|
469 case E_CCmode:
|
|
|
470 case E_CCXmode:
|
|
|
471 return true;
|
|
|
472 case E_CCNZmode:
|
|
|
473 case E_CCXNZmode:
|
|
|
474 return nz_comparison_operator (op, mode);
|
|
|
475 case E_CCCmode:
|
|
|
476 case E_CCXCmode:
|
|
|
477 return c_comparison_operator (op, mode);
|
|
|
478 case E_CCVmode:
|
|
|
479 case E_CCXVmode:
|
|
|
480 return v_comparison_operator (op, mode);
|
|
|
481 default:
|
|
|
482 return false;
|
|
|
483 }
|
|
0
|
484 })
|
|
|
485
|
|
111
|
486 ;; Return true if OP is a FP comparison operator.
|
|
|
487 (define_predicate "fcc_comparison_operator"
|
|
|
488 (match_operand 0 "comparison_operator")
|
|
0
|
489 {
|
|
111
|
490 switch (GET_MODE (XEXP (op, 0)))
|
|
|
491 {
|
|
|
492 case E_CCFPmode:
|
|
|
493 case E_CCFPEmode:
|
|
|
494 return true;
|
|
|
495 default:
|
|
|
496 return false;
|
|
|
497 }
|
|
0
|
498 })
|
|
|
499
|
|
111
|
500 ;; Return true if OP is an integer or FP comparison operator. This allows
|
|
|
501 ;; the use of MATCH_OPERATOR to recognize all the conditional move insns.
|
|
|
502 (define_predicate "icc_or_fcc_comparison_operator"
|
|
|
503 (ior (match_operand 0 "icc_comparison_operator")
|
|
|
504 (match_operand 0 "fcc_comparison_operator")))
|
|
|
505
|
|
|
506 ;; Return true if OP is an integer comparison operator for V9.
|
|
|
507 (define_predicate "v9_comparison_operator"
|
|
|
508 (and (match_operand 0 "ordered_comparison_operator")
|
|
|
509 (match_test "TARGET_V9")))
|
|
|
510
|
|
0
|
511 ;; Return true if OP is a comparison operator suitable for use in V9
|
|
|
512 ;; conditional move or branch on register contents instructions.
|
|
111
|
513 (define_predicate "v9_register_comparison_operator"
|
|
0
|
514 (match_code "eq,ne,ge,lt,le,gt"))
|
|
|
515
|
|
|
516 ;; Return true if OP is an operator which can set the condition codes
|
|
111
|
517 ;; explicitly. We do not include PLUS/MINUS/NEG/ASHIFT because these
|
|
|
518 ;; require CCNZmode, which we handle explicitly.
|
|
0
|
519 (define_predicate "cc_arith_operator"
|
|
|
520 (match_code "and,ior,xor"))
|
|
|
521
|
|
|
522 ;; Return true if OP is an operator which can bitwise complement its
|
|
|
523 ;; second operand and set the condition codes explicitly.
|
|
|
524 ;; XOR is not here because combine canonicalizes (xor (not ...) ...)
|
|
111
|
525 ;; and (xor ... (not ...)) to (not (xor ...)).
|
|
0
|
526 (define_predicate "cc_arith_not_operator"
|
|
|
527 (match_code "and,ior"))
|
