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comparison gcc/config/arm/arm.opt @ 111:04ced10e8804

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gcc 7
author kono
date Fri, 27 Oct 2017 22:46:09 +0900
parents 77e2b8dfacca
children 84e7813d76e9
comparison
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68:561a7518be6b 111:04ced10e8804
1 ; Options for the ARM port of the compiler. 1 ; Options for the ARM port of the compiler.
2 2
3 ; Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc. 3 ; Copyright (C) 2005-2017 Free Software Foundation, Inc.
4 ; 4 ;
5 ; This file is part of GCC. 5 ; This file is part of GCC.
6 ; 6 ;
7 ; GCC is free software; you can redistribute it and/or modify it under 7 ; GCC is free software; you can redistribute it and/or modify it under
8 ; the terms of the GNU General Public License as published by the Free 8 ; the terms of the GNU General Public License as published by the Free
16 ; 16 ;
17 ; You should have received a copy of the GNU General Public License 17 ; You should have received a copy of the GNU General Public License
18 ; along with GCC; see the file COPYING3. If not see 18 ; along with GCC; see the file COPYING3. If not see
19 ; <http://www.gnu.org/licenses/>. 19 ; <http://www.gnu.org/licenses/>.
20 20
21 HeaderInclude
22 config/arm/arm-opts.h
23
24 TargetSave
25 const char *x_arm_arch_string
26
27 TargetSave
28 const char *x_arm_cpu_string
29
30 TargetSave
31 const char *x_arm_tune_string
32
33 Enum
34 Name(tls_type) Type(enum arm_tls_type)
35 TLS dialect to use:
36
37 EnumValue
38 Enum(tls_type) String(gnu) Value(TLS_GNU)
39
40 EnumValue
41 Enum(tls_type) String(gnu2) Value(TLS_GNU2)
42
21 mabi= 43 mabi=
22 Target RejectNegative Joined Var(target_abi_name) 44 Target RejectNegative Joined Enum(arm_abi_type) Var(arm_abi) Init(ARM_DEFAULT_ABI)
23 Specify an ABI 45 Specify an ABI.
46
47 Enum
48 Name(arm_abi_type) Type(enum arm_abi_type)
49 Known ARM ABIs (for use with the -mabi= option):
50
51 EnumValue
52 Enum(arm_abi_type) String(apcs-gnu) Value(ARM_ABI_APCS)
53
54 EnumValue
55 Enum(arm_abi_type) String(atpcs) Value(ARM_ABI_ATPCS)
56
57 EnumValue
58 Enum(arm_abi_type) String(aapcs) Value(ARM_ABI_AAPCS)
59
60 EnumValue
61 Enum(arm_abi_type) String(iwmmxt) Value(ARM_ABI_IWMMXT)
62
63 EnumValue
64 Enum(arm_abi_type) String(aapcs-linux) Value(ARM_ABI_AAPCS_LINUX)
24 65
25 mabort-on-noreturn 66 mabort-on-noreturn
26 Target Report Mask(ABORT_NORETURN) 67 Target Report Mask(ABORT_NORETURN)
27 Generate a call to abort if a noreturn function returns 68 Generate a call to abort if a noreturn function returns.
28 69
29 mapcs 70 mapcs
30 Target RejectNegative Mask(APCS_FRAME) MaskExists Undocumented 71 Target RejectNegative Mask(APCS_FRAME) Undocumented
31
32 mapcs-float
33 Target Report Mask(APCS_FLOAT)
34 Pass FP arguments in FP registers
35 72
36 mapcs-frame 73 mapcs-frame
37 Target Report Mask(APCS_FRAME) 74 Target Report Mask(APCS_FRAME)
38 Generate APCS conformant stack frames 75 Generate APCS conformant stack frames.
39 76
40 mapcs-reentrant 77 mapcs-reentrant
41 Target Report Mask(APCS_REENT) 78 Target Report Mask(APCS_REENT)
42 Generate re-entrant, PIC code 79 Generate re-entrant, PIC code.
43 80
44 mapcs-stack-check 81 mapcs-stack-check
45 Target Report Mask(APCS_STACK) Undocumented 82 Target Report Mask(APCS_STACK) Undocumented
46 83
47 march= 84 march=
48 Target RejectNegative Joined 85 Target RejectNegative ToLower Joined Var(arm_arch_string)
49 Specify the name of the target architecture 86 Specify the name of the target architecture.
87
88 ; Other arm_arch values are loaded from arm-tables.opt
89 ; but that is a generated file and this is an odd-one-out.
90 EnumValue
91 Enum(arm_arch) String(native) Value(-1) DriverOnly
50 92
51 marm 93 marm
52 Target RejectNegative InverseMask(THUMB) Undocumented 94 Target Report RejectNegative Negative(mthumb) InverseMask(THUMB)
95 Generate code in 32 bit ARM state.
53 96
54 mbig-endian 97 mbig-endian
55 Target Report RejectNegative Mask(BIG_END) 98 Target Report RejectNegative Negative(mlittle-endian) Mask(BIG_END)
56 Assume target CPU is configured as big endian 99 Assume target CPU is configured as big endian.
57 100
58 mcallee-super-interworking 101 mcallee-super-interworking
59 Target Report Mask(CALLEE_INTERWORKING) 102 Target Report Mask(CALLEE_INTERWORKING)
60 Thumb: Assume non-static functions may be called from ARM code 103 Thumb: Assume non-static functions may be called from ARM code.
61 104
62 mcaller-super-interworking 105 mcaller-super-interworking
63 Target Report Mask(CALLER_INTERWORKING) 106 Target Report Mask(CALLER_INTERWORKING)
64 Thumb: Assume function pointers may go to non-Thumb aware code 107 Thumb: Assume function pointers may go to non-Thumb aware code.
65
66 mcirrus-fix-invalid-insns
67 Target Report Mask(CIRRUS_FIX_INVALID_INSNS)
68 Cirrus: Place NOPs to avoid invalid instruction combinations
69 108
70 mcpu= 109 mcpu=
71 Target RejectNegative Joined 110 Target RejectNegative ToLower Joined Var(arm_cpu_string)
72 Specify the name of the target CPU 111 Specify the name of the target CPU.
73 112
74 mfloat-abi= 113 mfloat-abi=
75 Target RejectNegative Joined Var(target_float_abi_name) 114 Target RejectNegative Joined Enum(float_abi_type) Var(arm_float_abi) Init(TARGET_DEFAULT_FLOAT_ABI)
76 Specify if floating point hardware should be used 115 Specify if floating point hardware should be used.
77 116
78 mfp= 117 mcmse
79 Target RejectNegative Joined Undocumented Var(target_fpe_name) 118 Target RejectNegative Var(use_cmse)
119 Specify that the compiler should target secure code as per ARMv8-M Security Extensions.
120
121 Enum
122 Name(float_abi_type) Type(enum float_abi_type)
123 Known floating-point ABIs (for use with the -mfloat-abi= option):
124
125 EnumValue
126 Enum(float_abi_type) String(soft) Value(ARM_FLOAT_ABI_SOFT)
127
128 EnumValue
129 Enum(float_abi_type) String(softfp) Value(ARM_FLOAT_ABI_SOFTFP)
130
131 EnumValue
132 Enum(float_abi_type) String(hard) Value(ARM_FLOAT_ABI_HARD)
133
134 mflip-thumb
135 Target Report Var(TARGET_FLIP_THUMB) Undocumented
136 Switch ARM/Thumb modes on alternating functions for compiler testing.
80 137
81 mfp16-format= 138 mfp16-format=
82 Target RejectNegative Joined Var(target_fp16_format_name) 139 Target RejectNegative Joined Enum(arm_fp16_format_type) Var(arm_fp16_format) Init(ARM_FP16_FORMAT_NONE)
83 Specify the __fp16 floating-point format 140 Specify the __fp16 floating-point format.
84 141
85 ;; Now ignored. 142 Enum
86 mfpe 143 Name(arm_fp16_format_type) Type(enum arm_fp16_format_type)
87 Target RejectNegative Mask(FPE) Undocumented 144 Known __fp16 formats (for use with the -mfp16-format= option):
88 145
89 mfpe= 146 EnumValue
90 Target RejectNegative Joined Undocumented Var(target_fpe_name) 147 Enum(arm_fp16_format_type) String(none) Value(ARM_FP16_FORMAT_NONE)
148
149 EnumValue
150 Enum(arm_fp16_format_type) String(ieee) Value(ARM_FP16_FORMAT_IEEE)
151
152 EnumValue
153 Enum(arm_fp16_format_type) String(alternative) Value(ARM_FP16_FORMAT_ALTERNATIVE)
91 154
92 mfpu= 155 mfpu=
93 Target RejectNegative Joined Var(target_fpu_name) 156 Target RejectNegative Joined Enum(arm_fpu) Var(arm_fpu_index) Init(TARGET_FPU_auto) Save
94 Specify the name of the target floating point hardware/format 157 Specify the name of the target floating point hardware/format.
95 158
96 mhard-float 159 mhard-float
97 Target RejectNegative 160 Target RejectNegative Alias(mfloat-abi=, hard) Undocumented
98 Alias for -mfloat-abi=hard
99 161
100 mlittle-endian 162 mlittle-endian
101 Target Report RejectNegative InverseMask(BIG_END) 163 Target Report RejectNegative Negative(mbig-endian) InverseMask(BIG_END)
102 Assume target CPU is configured as little endian 164 Assume target CPU is configured as little endian.
103 165
104 mlong-calls 166 mlong-calls
105 Target Report Mask(LONG_CALLS) 167 Target Report Mask(LONG_CALLS)
106 Generate call insns as indirect calls, if necessary 168 Generate call insns as indirect calls, if necessary.
169
170 mpic-data-is-text-relative
171 Target Report Var(arm_pic_data_is_text_relative) Init(TARGET_DEFAULT_PIC_DATA_IS_TEXT_RELATIVE)
172 Assume data segments are relative to text segment.
107 173
108 mpic-register= 174 mpic-register=
109 Target RejectNegative Joined Var(arm_pic_register_string) 175 Target RejectNegative Joined Var(arm_pic_register_string)
110 Specify the register to be used for PIC addressing 176 Specify the register to be used for PIC addressing.
111 177
112 mpoke-function-name 178 mpoke-function-name
113 Target Report Mask(POKE_FUNCTION_NAME) 179 Target Report Mask(POKE_FUNCTION_NAME)
114 Store function names in object code 180 Store function names in object code.
115 181
116 msched-prolog 182 msched-prolog
117 Target Report Mask(SCHED_PROLOG) 183 Target Report Mask(SCHED_PROLOG)
118 Permit scheduling of a function's prologue sequence 184 Permit scheduling of a function's prologue sequence.
119 185
120 msingle-pic-base 186 msingle-pic-base
121 Target Report Mask(SINGLE_PIC_BASE) 187 Target Report Mask(SINGLE_PIC_BASE)
122 Do not load the PIC register in function prologues 188 Do not load the PIC register in function prologues.
123 189
124 msoft-float 190 msoft-float
125 Target RejectNegative 191 Target RejectNegative Alias(mfloat-abi=, soft) Undocumented
126 Alias for -mfloat-abi=soft
127 192
128 mstructure-size-boundary= 193 mstructure-size-boundary=
129 Target RejectNegative Joined Var(structure_size_string) 194 Target RejectNegative Joined UInteger Var(arm_structure_size_boundary) Init(DEFAULT_STRUCTURE_SIZE_BOUNDARY)
130 Specify the minimum bit alignment of structures 195 Specify the minimum bit alignment of structures. (Deprecated).
131 196
132 mthumb 197 mthumb
133 Target Report Mask(THUMB) 198 Target Report RejectNegative Negative(marm) Mask(THUMB) Save
134 Compile for the Thumb not the ARM 199 Generate code for Thumb state.
135 200
136 mthumb-interwork 201 mthumb-interwork
137 Target Report Mask(INTERWORK) 202 Target Report Mask(INTERWORK)
138 Support calls between Thumb and ARM instruction sets 203 Support calls between Thumb and ARM instruction sets.
204
205 mtls-dialect=
206 Target RejectNegative Joined Enum(tls_type) Var(target_tls_dialect) Init(TLS_GNU)
207 Specify thread local storage scheme.
139 208
140 mtp= 209 mtp=
141 Target RejectNegative Joined Var(target_thread_switch) 210 Target RejectNegative Joined Enum(arm_tp_type) Var(target_thread_pointer) Init(TP_AUTO)
142 Specify how to access the thread pointer 211 Specify how to access the thread pointer.
212
213 Enum
214 Name(arm_tp_type) Type(enum arm_tp_type)
215 Valid arguments to -mtp=:
216
217 EnumValue
218 Enum(arm_tp_type) String(soft) Value(TP_SOFT)
219
220 EnumValue
221 Enum(arm_tp_type) String(auto) Value(TP_AUTO)
222
223 EnumValue
224 Enum(arm_tp_type) String(cp15) Value(TP_CP15)
143 225
144 mtpcs-frame 226 mtpcs-frame
145 Target Report Mask(TPCS_FRAME) 227 Target Report Mask(TPCS_FRAME)
146 Thumb: Generate (non-leaf) stack frames even if not needed 228 Thumb: Generate (non-leaf) stack frames even if not needed.
147 229
148 mtpcs-leaf-frame 230 mtpcs-leaf-frame
149 Target Report Mask(TPCS_LEAF_FRAME) 231 Target Report Mask(TPCS_LEAF_FRAME)
150 Thumb: Generate (leaf) stack frames even if not needed 232 Thumb: Generate (leaf) stack frames even if not needed.
151 233
152 mtune= 234 mtune=
153 Target RejectNegative Joined 235 Target RejectNegative ToLower Joined Var(arm_tune_string)
154 Tune code for the given processor 236 Tune code for the given processor.
155 237
156 mwords-little-endian 238 mprint-tune-info
157 Target Report RejectNegative Mask(LITTLE_WORDS) 239 Target Report RejectNegative Var(print_tune_info) Init(0)
158 Assume big endian bytes, little endian words 240 Print CPU tuning information as comment in assembler file. This is
241 an option used only for regression testing of the compiler and not
242 intended for ordinary use in compiling code.
243
244 ; Other processor_type values are loaded from arm-tables.opt
245 ; but that is a generated file and this is an odd-one-out.
246 EnumValue
247 Enum(processor_type) String(native) Value(-1) DriverOnly
159 248
160 mvectorize-with-neon-quad 249 mvectorize-with-neon-quad
161 Target Report Mask(NEON_VECTORIZE_QUAD) 250 Target Report RejectNegative InverseMask(NEON_VECTORIZE_DOUBLE)
162 Use Neon quad-word (rather than double-word) registers for vectorization 251 Use Neon quad-word (rather than double-word) registers for vectorization.
252
253 mvectorize-with-neon-double
254 Target Report RejectNegative Mask(NEON_VECTORIZE_DOUBLE)
255 Use Neon double-word (rather than quad-word) registers for vectorization.
163 256
164 mword-relocations 257 mword-relocations
165 Target Report Var(target_word_relocations) Init(TARGET_DEFAULT_WORD_RELOCATIONS) 258 Target Report Var(target_word_relocations) Init(TARGET_DEFAULT_WORD_RELOCATIONS)
166 Only generate absolute relocations on word sized values. 259 Only generate absolute relocations on word sized values.
260
261 mrestrict-it
262 Target Report Var(arm_restrict_it) Init(2) Save
263 Generate IT blocks appropriate for ARMv8.
167 264
168 mfix-cortex-m3-ldrd 265 mfix-cortex-m3-ldrd
169 Target Report Var(fix_cm3_ldrd) Init(2) 266 Target Report Var(fix_cm3_ldrd) Init(2)
170 Avoid overlapping destination and address registers on LDRD instructions 267 Avoid overlapping destination and address registers on LDRD instructions
171 that may trigger Cortex-M3 errata. 268 that may trigger Cortex-M3 errata.
269
270 munaligned-access
271 Target Report Var(unaligned_access) Init(2) Save
272 Enable unaligned word and halfword accesses to packed data.
273
274 mneon-for-64bits
275 Target Report RejectNegative Var(use_neon_for_64bits) Init(0)
276 Use Neon to perform 64-bits operations rather than core registers.
277
278 mslow-flash-data
279 Target Report Var(target_slow_flash_data) Init(0)
280 Assume loading data from flash is slower than fetching instructions.
281
282 masm-syntax-unified
283 Target Report Var(inline_asm_unified) Init(0) Save
284 Assume unified syntax for inline assembly code.
285
286 mpure-code
287 Target Report Var(target_pure_code) Init(0)
288 Do not allow constant data to be placed in code sections.
289
290 mbe8
291 Target Report RejectNegative Negative(mbe32) Mask(BE8)
292 When linking for big-endian targets, generate a BE8 format image.
293
294 mbe32
295 Target Report RejectNegative Negative(mbe8) InverseMask(BE8)
296 When linking for big-endian targets, generate a legacy BE32 format image.