--- a/gcc/config/arm/arm.opt	Sun Aug 21 07:07:55 2011 +0900
+++ b/gcc/config/arm/arm.opt	Fri Oct 27 22:46:09 2017 +0900
@@ -1,6 +1,6 @@
 ; Options for the ARM port of the compiler.
 
-; Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc.
+; Copyright (C) 2005-2017 Free Software Foundation, Inc.
 ;
 ; This file is part of GCC.
 ;
@@ -18,154 +18,279 @@
 ; along with GCC; see the file COPYING3.  If not see
 ; <http://www.gnu.org/licenses/>.
 
+HeaderInclude
+config/arm/arm-opts.h
+
+TargetSave
+const char *x_arm_arch_string
+
+TargetSave
+const char *x_arm_cpu_string
+
+TargetSave
+const char *x_arm_tune_string
+
+Enum
+Name(tls_type) Type(enum arm_tls_type)
+TLS dialect to use:
+
+EnumValue
+Enum(tls_type) String(gnu) Value(TLS_GNU)
+
+EnumValue
+Enum(tls_type) String(gnu2) Value(TLS_GNU2)
+
 mabi=
-Target RejectNegative Joined Var(target_abi_name)
-Specify an ABI
+Target RejectNegative Joined Enum(arm_abi_type) Var(arm_abi) Init(ARM_DEFAULT_ABI)
+Specify an ABI.
+
+Enum
+Name(arm_abi_type) Type(enum arm_abi_type)
+Known ARM ABIs (for use with the -mabi= option):
+
+EnumValue
+Enum(arm_abi_type) String(apcs-gnu) Value(ARM_ABI_APCS)
+
+EnumValue
+Enum(arm_abi_type) String(atpcs) Value(ARM_ABI_ATPCS)
+
+EnumValue
+Enum(arm_abi_type) String(aapcs) Value(ARM_ABI_AAPCS)
+
+EnumValue
+Enum(arm_abi_type) String(iwmmxt) Value(ARM_ABI_IWMMXT)
+
+EnumValue
+Enum(arm_abi_type) String(aapcs-linux) Value(ARM_ABI_AAPCS_LINUX)
 
 mabort-on-noreturn
 Target Report Mask(ABORT_NORETURN)
-Generate a call to abort if a noreturn function returns
+Generate a call to abort if a noreturn function returns.
 
 mapcs
-Target RejectNegative Mask(APCS_FRAME) MaskExists Undocumented
-
-mapcs-float
-Target Report Mask(APCS_FLOAT)
-Pass FP arguments in FP registers
+Target RejectNegative Mask(APCS_FRAME) Undocumented
 
 mapcs-frame
 Target Report Mask(APCS_FRAME)
-Generate APCS conformant stack frames
+Generate APCS conformant stack frames.
 
 mapcs-reentrant
 Target Report Mask(APCS_REENT)
-Generate re-entrant, PIC code
+Generate re-entrant, PIC code.
 
 mapcs-stack-check
 Target Report Mask(APCS_STACK) Undocumented
 
 march=
-Target RejectNegative Joined
-Specify the name of the target architecture
+Target RejectNegative ToLower Joined Var(arm_arch_string)
+Specify the name of the target architecture.
+
+; Other arm_arch values are loaded from arm-tables.opt
+; but that is a generated file and this is an odd-one-out.
+EnumValue
+Enum(arm_arch) String(native) Value(-1) DriverOnly
 
 marm
-Target RejectNegative InverseMask(THUMB) Undocumented
+Target Report RejectNegative Negative(mthumb) InverseMask(THUMB)
+Generate code in 32 bit ARM state.
 
 mbig-endian
-Target Report RejectNegative Mask(BIG_END)
-Assume target CPU is configured as big endian
+Target Report RejectNegative Negative(mlittle-endian) Mask(BIG_END)
+Assume target CPU is configured as big endian.
 
 mcallee-super-interworking
 Target Report Mask(CALLEE_INTERWORKING)
-Thumb: Assume non-static functions may be called from ARM code
+Thumb: Assume non-static functions may be called from ARM code.
 
 mcaller-super-interworking
 Target Report Mask(CALLER_INTERWORKING)
-Thumb: Assume function pointers may go to non-Thumb aware code
-
-mcirrus-fix-invalid-insns
-Target Report Mask(CIRRUS_FIX_INVALID_INSNS)
-Cirrus: Place NOPs to avoid invalid instruction combinations
+Thumb: Assume function pointers may go to non-Thumb aware code.
 
 mcpu=
-Target RejectNegative Joined
-Specify the name of the target CPU
+Target RejectNegative ToLower Joined Var(arm_cpu_string)
+Specify the name of the target CPU.
 
 mfloat-abi=
-Target RejectNegative Joined Var(target_float_abi_name)
-Specify if floating point hardware should be used
+Target RejectNegative Joined Enum(float_abi_type) Var(arm_float_abi) Init(TARGET_DEFAULT_FLOAT_ABI)
+Specify if floating point hardware should be used.
+
+mcmse
+Target RejectNegative Var(use_cmse)
+Specify that the compiler should target secure code as per ARMv8-M Security Extensions.
+
+Enum
+Name(float_abi_type) Type(enum float_abi_type)
+Known floating-point ABIs (for use with the -mfloat-abi= option):
 
-mfp=
-Target RejectNegative Joined Undocumented Var(target_fpe_name)
+EnumValue
+Enum(float_abi_type) String(soft) Value(ARM_FLOAT_ABI_SOFT)
+
+EnumValue
+Enum(float_abi_type) String(softfp) Value(ARM_FLOAT_ABI_SOFTFP)
+
+EnumValue
+Enum(float_abi_type) String(hard) Value(ARM_FLOAT_ABI_HARD)
+
+mflip-thumb
+Target Report Var(TARGET_FLIP_THUMB) Undocumented
+Switch ARM/Thumb modes on alternating functions for compiler testing.
 
 mfp16-format=
-Target RejectNegative Joined Var(target_fp16_format_name)
-Specify the __fp16 floating-point format
+Target RejectNegative Joined Enum(arm_fp16_format_type) Var(arm_fp16_format) Init(ARM_FP16_FORMAT_NONE)
+Specify the __fp16 floating-point format.
+
+Enum
+Name(arm_fp16_format_type) Type(enum arm_fp16_format_type)
+Known __fp16 formats (for use with the -mfp16-format= option):
 
-;; Now ignored.
-mfpe
-Target RejectNegative Mask(FPE) Undocumented
+EnumValue
+Enum(arm_fp16_format_type) String(none) Value(ARM_FP16_FORMAT_NONE)
 
-mfpe=
-Target RejectNegative Joined Undocumented Var(target_fpe_name)
+EnumValue
+Enum(arm_fp16_format_type) String(ieee) Value(ARM_FP16_FORMAT_IEEE)
+
+EnumValue
+Enum(arm_fp16_format_type) String(alternative) Value(ARM_FP16_FORMAT_ALTERNATIVE)
 
 mfpu=
-Target RejectNegative Joined Var(target_fpu_name)
-Specify the name of the target floating point hardware/format
+Target RejectNegative Joined Enum(arm_fpu) Var(arm_fpu_index) Init(TARGET_FPU_auto) Save
+Specify the name of the target floating point hardware/format.
 
 mhard-float
-Target RejectNegative
-Alias for -mfloat-abi=hard
+Target RejectNegative Alias(mfloat-abi=, hard) Undocumented
 
 mlittle-endian
-Target Report RejectNegative InverseMask(BIG_END)
-Assume target CPU is configured as little endian
+Target Report RejectNegative Negative(mbig-endian) InverseMask(BIG_END)
+Assume target CPU is configured as little endian.
 
 mlong-calls
 Target Report Mask(LONG_CALLS)
-Generate call insns as indirect calls, if necessary
+Generate call insns as indirect calls, if necessary.
+
+mpic-data-is-text-relative
+Target Report Var(arm_pic_data_is_text_relative) Init(TARGET_DEFAULT_PIC_DATA_IS_TEXT_RELATIVE)
+Assume data segments are relative to text segment.
 
 mpic-register=
 Target RejectNegative Joined Var(arm_pic_register_string)
-Specify the register to be used for PIC addressing
+Specify the register to be used for PIC addressing.
 
 mpoke-function-name
 Target Report Mask(POKE_FUNCTION_NAME)
-Store function names in object code
+Store function names in object code.
 
 msched-prolog
 Target Report Mask(SCHED_PROLOG)
-Permit scheduling of a function's prologue sequence
+Permit scheduling of a function's prologue sequence.
 
 msingle-pic-base
 Target Report Mask(SINGLE_PIC_BASE)
-Do not load the PIC register in function prologues
+Do not load the PIC register in function prologues.
 
 msoft-float
-Target RejectNegative
-Alias for -mfloat-abi=soft
+Target RejectNegative Alias(mfloat-abi=, soft) Undocumented
 
 mstructure-size-boundary=
-Target RejectNegative Joined Var(structure_size_string)
-Specify the minimum bit alignment of structures
+Target RejectNegative Joined UInteger Var(arm_structure_size_boundary) Init(DEFAULT_STRUCTURE_SIZE_BOUNDARY)
+Specify the minimum bit alignment of structures. (Deprecated).
 
 mthumb
-Target Report Mask(THUMB)
-Compile for the Thumb not the ARM
+Target Report RejectNegative Negative(marm) Mask(THUMB) Save
+Generate code for Thumb state.
 
 mthumb-interwork
 Target Report Mask(INTERWORK)
-Support calls between Thumb and ARM instruction sets
+Support calls between Thumb and ARM instruction sets.
+
+mtls-dialect=
+Target RejectNegative Joined Enum(tls_type) Var(target_tls_dialect) Init(TLS_GNU)
+Specify thread local storage scheme.
 
 mtp=
-Target RejectNegative Joined Var(target_thread_switch)
-Specify how to access the thread pointer
+Target RejectNegative Joined Enum(arm_tp_type) Var(target_thread_pointer) Init(TP_AUTO)
+Specify how to access the thread pointer.
+
+Enum
+Name(arm_tp_type) Type(enum arm_tp_type)
+Valid arguments to -mtp=:
+
+EnumValue
+Enum(arm_tp_type) String(soft) Value(TP_SOFT)
+
+EnumValue
+Enum(arm_tp_type) String(auto) Value(TP_AUTO)
+
+EnumValue
+Enum(arm_tp_type) String(cp15) Value(TP_CP15)
 
 mtpcs-frame
 Target Report Mask(TPCS_FRAME)
-Thumb: Generate (non-leaf) stack frames even if not needed
+Thumb: Generate (non-leaf) stack frames even if not needed.
 
 mtpcs-leaf-frame
 Target Report Mask(TPCS_LEAF_FRAME)
-Thumb: Generate (leaf) stack frames even if not needed
+Thumb: Generate (leaf) stack frames even if not needed.
 
 mtune=
-Target RejectNegative Joined
-Tune code for the given processor
+Target RejectNegative ToLower Joined Var(arm_tune_string)
+Tune code for the given processor.
 
-mwords-little-endian
-Target Report RejectNegative Mask(LITTLE_WORDS)
-Assume big endian bytes, little endian words
+mprint-tune-info
+Target Report RejectNegative Var(print_tune_info) Init(0)
+Print CPU tuning information as comment in assembler file.  This is
+an option used only for regression testing of the compiler and not
+intended for ordinary use in compiling code.
+
+; Other processor_type values are loaded from arm-tables.opt
+; but that is a generated file and this is an odd-one-out.
+EnumValue
+Enum(processor_type) String(native) Value(-1) DriverOnly
 
 mvectorize-with-neon-quad
-Target Report Mask(NEON_VECTORIZE_QUAD)
-Use Neon quad-word (rather than double-word) registers for vectorization
+Target Report RejectNegative InverseMask(NEON_VECTORIZE_DOUBLE)
+Use Neon quad-word (rather than double-word) registers for vectorization.
+
+mvectorize-with-neon-double
+Target Report RejectNegative Mask(NEON_VECTORIZE_DOUBLE)
+Use Neon double-word (rather than quad-word) registers for vectorization.
 
 mword-relocations
 Target Report Var(target_word_relocations) Init(TARGET_DEFAULT_WORD_RELOCATIONS)
 Only generate absolute relocations on word sized values.
 
+mrestrict-it
+Target Report Var(arm_restrict_it) Init(2) Save
+Generate IT blocks appropriate for ARMv8.
+
 mfix-cortex-m3-ldrd
 Target Report Var(fix_cm3_ldrd) Init(2)
 Avoid overlapping destination and address registers on LDRD instructions
 that may trigger Cortex-M3 errata.
+
+munaligned-access
+Target Report Var(unaligned_access) Init(2) Save
+Enable unaligned word and halfword accesses to packed data.
+
+mneon-for-64bits
+Target Report RejectNegative Var(use_neon_for_64bits) Init(0)
+Use Neon to perform 64-bits operations rather than core registers.
+
+mslow-flash-data
+Target Report Var(target_slow_flash_data) Init(0)
+Assume loading data from flash is slower than fetching instructions.
+
+masm-syntax-unified
+Target Report Var(inline_asm_unified) Init(0) Save
+Assume unified syntax for inline assembly code.
+
+mpure-code
+Target Report Var(target_pure_code) Init(0)
+Do not allow constant data to be placed in code sections.
+
+mbe8
+Target Report RejectNegative Negative(mbe32) Mask(BE8)
+When linking for big-endian targets, generate a BE8 format image.
+
+mbe32
+Target Report RejectNegative Negative(mbe8) InverseMask(BE8)
+When linking for big-endian targets, generate a legacy BE32 format image.