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comparison gcc/config/mips/p5600.md @ 111:04ced10e8804

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gcc 7
author kono
date Fri, 27 Oct 2017 22:46:09 +0900
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68:561a7518be6b 111:04ced10e8804
1 ;; DFA-based pipeline description for P5600.
2 ;;
3 ;; Copyright (C) 2007-2017 Free Software Foundation, Inc.
4 ;;
5 ;; This file is part of GCC.
6 ;;
7 ;; GCC is free software; you can redistribute it and/or modify it
8 ;; under the terms of the GNU General Public License as published
9 ;; by the Free Software Foundation; either version 3, or (at your
10 ;; option) any later version.
11
12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 ;; License for more details.
16
17 ;; You should have received a copy of the GNU General Public License
18 ;; along with GCC; see the file COPYING3. If not see
19 ;; <http://www.gnu.org/licenses/>.
20
21 (define_automaton "p5600_agen_alq_pipe, p5600_fpu_pipe")
22
23 ;; The address generation queue (AGQ) has AL2, CTISTD and LDSTA pipes
24 (define_cpu_unit "p5600_agq, p5600_al2, p5600_ctistd, p5600_ldsta,
25 p5600_gpdiv" "p5600_agen_alq_pipe")
26
27 ;; The arithmetic-logic-unit queue (ALQ) has ALU pipe
28 (define_cpu_unit "p5600_alq, p5600_alu" "p5600_agen_alq_pipe")
29
30 ;; The floating-point-unit queue (FPQ) has short and long pipes
31 (define_cpu_unit "p5600_fpu_short, p5600_fpu_long" "p5600_fpu_pipe")
32
33 ;; Short FPU pipeline
34 (define_cpu_unit "p5600_fpu_intadd, p5600_fpu_cmp, p5600_fpu_float,
35 p5600_fpu_logic_a, p5600_fpu_logic_b, p5600_fpu_div,
36 p5600_fpu_store" "p5600_fpu_pipe")
37
38 ;; Long FPU pipeline
39 (define_cpu_unit "p5600_fpu_logic, p5600_fpu_float_a, p5600_fpu_float_b,
40 p5600_fpu_float_c, p5600_fpu_float_d" "p5600_fpu_pipe")
41 (define_cpu_unit "p5600_fpu_mult, p5600_fpu_fdiv, p5600_fpu_load,
42 p5600_fpu_apu" "p5600_fpu_pipe")
43
44 (define_reservation "p5600_agq_al2" "p5600_agq, p5600_al2")
45 (define_reservation "p5600_agq_ctistd" "p5600_agq, p5600_ctistd")
46 (define_reservation "p5600_agq_ldsta" "p5600_agq, p5600_ldsta")
47 (define_reservation "p5600_alq_alu" "p5600_alq, p5600_alu")
48
49 ;;
50 ;; FPU-MSA pipe
51 ;;
52
53 ;; Arithmetic
54 ;; add, hadd, sub, hsub, average, min, max, compare
55 (define_insn_reservation "msa_short_int_add" 2
56 (and (eq_attr "cpu" "p5600")
57 (eq_attr "type" "simd_int_arith"))
58 "p5600_fpu_short, p5600_fpu_intadd")
59
60 ;; Bitwise Instructions
61 ;; and, or, xor, bit-clear, leading-bits-count, shift, shuffle
62 (define_insn_reservation "msa_short_logic" 2
63 (and (eq_attr "cpu" "p5600")
64 (eq_attr "type" "simd_shift,simd_bit,simd_splat,simd_fill,simd_shf,
65 simd_permute,simd_logic"))
66 "p5600_fpu_short, p5600_fpu_logic_a")
67
68 ;; move.v
69 (define_insn_reservation "msa_short_logic_move_v" 2
70 (and (eq_attr "cpu" "p5600")
71 (eq_attr "type" "simd_move"))
72 "p5600_fpu_short, p5600_fpu_logic_a")
73
74 ;; Float compare
75 (define_insn_reservation "msa_short_cmp" 2
76 (and (eq_attr "cpu" "p5600")
77 (eq_attr "type" "simd_fcmp"))
78 "p5600_fpu_short, p5600_fpu_cmp")
79
80 ;; Float exp2, min, max
81 (define_insn_reservation "msa_short_float2" 2
82 (and (eq_attr "cpu" "p5600")
83 (eq_attr "type" "simd_fexp2,simd_fminmax"))
84 "p5600_fpu_short, p5600_fpu_float")
85
86 ;; Vector sat
87 (define_insn_reservation "msa_short_logic3" 3
88 (and (eq_attr "cpu" "p5600")
89 (eq_attr "type" "simd_sat,simd_pcnt"))
90 "p5600_fpu_short, p5600_fpu_logic_a, p5600_fpu_logic_b")
91
92 ;; Vector copy, bz, bnz
93 (define_insn_reservation "msa_short_store4" 4
94 (and (eq_attr "cpu" "p5600")
95 (eq_attr "type" "simd_copy,simd_branch,simd_cmsa"))
96 "p5600_fpu_short, p5600_fpu_store")
97
98 ;; Vector load
99 (define_insn_reservation "msa_long_load" 10
100 (and (eq_attr "cpu" "p5600")
101 (eq_attr "type" "simd_load"))
102 "p5600_fpu_long, p5600_fpu_load")
103
104 ;; Vector store
105 (define_insn_reservation "msa_short_store" 2
106 (and (eq_attr "cpu" "p5600")
107 (eq_attr "type" "simd_store"))
108 "p5600_fpu_short, p5600_fpu_store")
109
110 ;; binsl, binsr, insert, vshf, sld
111 (define_insn_reservation "msa_long_logic" 2
112 (and (eq_attr "cpu" "p5600")
113 (eq_attr "type" "simd_bitins,simd_bitmov,simd_insert,simd_sld"))
114 "p5600_fpu_long, p5600_fpu_logic")
115
116 ;; Float fclass, flog2
117 (define_insn_reservation "msa_long_float2" 2
118 (and (eq_attr "cpu" "p5600")
119 (eq_attr "type" "simd_fclass,simd_flog2"))
120 "p5600_fpu_long, p5600_fpu_float_a")
121
122 ;; fadd, fsub
123 (define_insn_reservation "msa_long_float4" 4
124 (and (eq_attr "cpu" "p5600")
125 (eq_attr "type" "simd_fadd,simd_fcvt"))
126 "p5600_fpu_long, p5600_fpu_float_a, p5600_fpu_float_b")
127
128 ;; fmul
129 (define_insn_reservation "msa_long_float5" 5
130 (and (eq_attr "cpu" "p5600")
131 (eq_attr "type" "simd_fmul"))
132 "p5600_fpu_long, p5600_fpu_float_a, p5600_fpu_float_b, p5600_fpu_float_c")
133
134 ;; fmadd, fmsub
135 (define_insn_reservation "msa_long_float8" 8
136 (and (eq_attr "cpu" "p5600")
137 (eq_attr "type" "simd_fmadd"))
138 "p5600_fpu_long, p5600_fpu_float_a,
139 p5600_fpu_float_b, p5600_fpu_float_c, p5600_fpu_float_d")
140
141 ;; Vector mul, dotp, madd, msub
142 (define_insn_reservation "msa_long_mult" 5
143 (and (eq_attr "cpu" "p5600")
144 (eq_attr "type" "simd_mul"))
145 "p5600_fpu_long, p5600_fpu_mult")
146
147 ;; fdiv, fmod (semi-pipelined)
148 (define_insn_reservation "msa_long_fdiv" 10
149 (and (eq_attr "cpu" "p5600")
150 (eq_attr "type" "simd_fdiv"))
151 "p5600_fpu_long, nothing, nothing, p5600_fpu_fdiv*8")
152
153 ;; div, mod (non-pipelined)
154 (define_insn_reservation "msa_long_div" 10
155 (and (eq_attr "cpu" "p5600")
156 (eq_attr "type" "simd_div"))
157 "p5600_fpu_long, p5600_fpu_div*9, p5600_fpu_div + p5600_fpu_logic_a")
158
159 ;;
160 ;; FPU pipe
161 ;;
162
163 ;; fadd, fsub
164 (define_insn_reservation "p5600_fpu_fadd" 4
165 (and (eq_attr "cpu" "p5600")
166 (eq_attr "type" "fadd"))
167 "p5600_fpu_long, p5600_fpu_apu")
168
169 ;; fabs, fneg, fcmp, fmove
170 (define_insn_reservation "p5600_fpu_fabs" 2
171 (and (eq_attr "cpu" "p5600")
172 (eq_attr "type" "fabs,fneg,fcmp,fmove"))
173 "p5600_fpu_short, p5600_fpu_apu")
174
175 ;; fload
176 (define_insn_reservation "p5600_fpu_fload" 8
177 (and (eq_attr "cpu" "p5600")
178 (eq_attr "type" "fpload,fpidxload"))
179 "p5600_fpu_long, p5600_fpu_apu")
180
181 ;; fstore
182 (define_insn_reservation "p5600_fpu_fstore" 1
183 (and (eq_attr "cpu" "p5600")
184 (eq_attr "type" "fpstore,fpidxstore"))
185 "p5600_fpu_short, p5600_fpu_apu")
186
187 ;; fmadd
188 (define_insn_reservation "p5600_fpu_fmadd" 9
189 (and (eq_attr "cpu" "p5600")
190 (eq_attr "type" "fmadd"))
191 "p5600_fpu_long, p5600_fpu_apu")
192
193 ;; fmul
194 (define_insn_reservation "p5600_fpu_fmul" 5
195 (and (eq_attr "cpu" "p5600")
196 (eq_attr "type" "fmul"))
197 "p5600_fpu_long, p5600_fpu_apu")
198
199 ;; fdiv, fsqrt
200 (define_insn_reservation "p5600_fpu_div" 17
201 (and (eq_attr "cpu" "p5600")
202 (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt"))
203 "p5600_fpu_long, p5600_fpu_apu*17")
204
205 ;; fcvt
206 (define_insn_reservation "p5600_fpu_fcvt" 4
207 (and (eq_attr "cpu" "p5600")
208 (eq_attr "type" "fcvt"))
209 "p5600_fpu_long, p5600_fpu_apu")
210
211 ;; mtc
212 (define_insn_reservation "p5600_fpu_fmtc" 7
213 (and (eq_attr "cpu" "p5600")
214 (eq_attr "type" "mtc"))
215 "p5600_fpu_short, p5600_fpu_store")
216
217 ;; mfc
218 (define_insn_reservation "p5600_fpu_fmfc" 4
219 (and (eq_attr "cpu" "p5600")
220 (eq_attr "type" "mfc"))
221 "p5600_fpu_short, p5600_fpu_store")
222
223 ;; madd/msub feeding into the add source
224 ;; madd.fmt dst, x, y, z -> madd.fmt a, dst, b, c 5 cycles
225 (define_bypass 5 "p5600_fpu_fmadd" "p5600_fpu_fmadd" "mips_fmadd_bypass")
226
227 ;;
228 ;; Integer pipe
229 ;;
230
231 ;; and
232 (define_insn_reservation "p5600_int_and" 1
233 (and (eq_attr "cpu" "p5600")
234 (eq_attr "move_type" "logical"))
235 "p5600_alq_alu")
236
237 ;; lui
238 (define_insn_reservation "p5600_int_lui" 1
239 (and (eq_attr "cpu" "p5600")
240 (eq_attr "move_type" "const"))
241 "p5600_alq_alu")
242
243 ;; Load lb, lbu, lh, lhu, lq, lw, lw_i2f, lwxs
244 (define_insn_reservation "p5600_int_load" 4
245 (and (eq_attr "cpu" "p5600")
246 (eq_attr "move_type" "load"))
247 "p5600_agq_ldsta")
248
249 ;; store
250 (define_insn_reservation "p5600_int_store" 3
251 (and (eq_attr "cpu" "p5600")
252 (eq_attr "move_type" "store"))
253 "p5600_agq_ldsta")
254
255 ;; andi, sll, srl, seb, seh
256 (define_insn_reservation "p5600_int_arith_1" 1
257 (and (eq_attr "cpu" "p5600")
258 (eq_attr "move_type" "andi,sll0,signext"))
259 "p5600_alq_alu | p5600_agq_al2")
260
261 ;; addi, addiu, ori, xori, add, addu
262 (define_insn_reservation "p5600_int_arith_2" 1
263 (and (eq_attr "cpu" "p5600")
264 (eq_attr "alu_type" "add,or,xor"))
265 "p5600_alq_alu | p5600_agq_al2")
266
267 ;; nor, sub
268 (define_insn_reservation "p5600_int_arith_3" 1
269 (and (eq_attr "cpu" "p5600")
270 (eq_attr "alu_type" "nor,sub"))
271 "p5600_alq_alu")
272
273 ;; srl, sra, rotr, slt, sllv, srlv
274 (define_insn_reservation "p5600_int_arith_4" 1
275 (and (eq_attr "cpu" "p5600")
276 (eq_attr "type" "shift,slt,move"))
277 "p5600_alq_alu | p5600_agq_al2")
278
279 ;; nop
280 (define_insn_reservation "p5600_int_nop" 0
281 (and (eq_attr "cpu" "p5600")
282 (eq_attr "type" "nop"))
283 "p5600_agq_al2")
284
285 ;; clo, clz
286 (define_insn_reservation "p5600_int_countbits" 1
287 (and (eq_attr "cpu" "p5600")
288 (eq_attr "type" "clz"))
289 "p5600_agq_al2")
290
291 ;; Conditional moves
292 (define_insn_reservation "p5600_int_condmove" 1
293 (and (eq_attr "cpu" "p5600")
294 (eq_attr "type" "condmove"))
295 "p5600_agq_al2")
296
297 ;; madd, msub
298 (define_insn_reservation "p5600_dsp_mac" 5
299 (and (eq_attr "cpu" "p5600")
300 (eq_attr "type" "imadd"))
301 "p5600_agq_al2")
302
303 ;; mfhi/lo
304 (define_insn_reservation "p5600_dsp_mfhilo" 1
305 (and (eq_attr "cpu" "p5600")
306 (eq_attr "type" "mfhi,mflo"))
307 "p5600_agq_al2")
308
309 ;; mthi/lo
310 (define_insn_reservation "p5600_dsp_mthilo" 5
311 (and (eq_attr "cpu" "p5600")
312 (eq_attr "type" "mthi,mtlo"))
313 "p5600_agq_al2")
314
315 ;; mult, multu, mul
316 (define_insn_reservation "p5600_dsp_mult" 5
317 (and (eq_attr "cpu" "p5600")
318 (eq_attr "type" "imul3,imul"))
319 "p5600_agq_al2")
320
321 ;; branch and jump
322 (define_insn_reservation "p5600_int_branch" 1
323 (and (eq_attr "cpu" "p5600")
324 (eq_attr "type" "branch,jump"))
325 "p5600_agq_ctistd")
326
327 ;; prefetch
328 (define_insn_reservation "p5600_int_prefetch" 3
329 (and (eq_attr "cpu" "p5600")
330 (eq_attr "type" "prefetch,prefetchx"))
331 "p5600_agq_ldsta")
332
333 ;; divide
334 (define_insn_reservation "p5600_int_div" 8
335 (and (eq_attr "cpu" "p5600")
336 (eq_attr "type" "idiv"))
337 "p5600_agq_al2+p5600_gpdiv*8")
338
339 ;; arith
340 (define_insn_reservation "p5600_int_arith_5" 2
341 (and (eq_attr "cpu" "p5600")
342 (eq_attr "type" "arith"))
343 "p5600_agq_al2")
344
345 ;; call
346 (define_insn_reservation "p5600_int_call" 2
347 (and (eq_attr "cpu" "p5600")
348 (eq_attr "jal" "indirect,direct"))
349 "p5600_agq_ctistd")