111
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1 ;; DFA-based pipeline description for P5600.
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2 ;;
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3 ;; Copyright (C) 2007-2017 Free Software Foundation, Inc.
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4 ;;
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5 ;; This file is part of GCC.
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6 ;;
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7 ;; GCC is free software; you can redistribute it and/or modify it
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8 ;; under the terms of the GNU General Public License as published
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9 ;; by the Free Software Foundation; either version 3, or (at your
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10 ;; option) any later version.
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11
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12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
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13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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14 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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15 ;; License for more details.
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16
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17 ;; You should have received a copy of the GNU General Public License
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18 ;; along with GCC; see the file COPYING3. If not see
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19 ;; <http://www.gnu.org/licenses/>.
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20
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21 (define_automaton "p5600_agen_alq_pipe, p5600_fpu_pipe")
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22
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23 ;; The address generation queue (AGQ) has AL2, CTISTD and LDSTA pipes
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24 (define_cpu_unit "p5600_agq, p5600_al2, p5600_ctistd, p5600_ldsta,
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25 p5600_gpdiv" "p5600_agen_alq_pipe")
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26
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27 ;; The arithmetic-logic-unit queue (ALQ) has ALU pipe
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28 (define_cpu_unit "p5600_alq, p5600_alu" "p5600_agen_alq_pipe")
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29
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30 ;; The floating-point-unit queue (FPQ) has short and long pipes
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31 (define_cpu_unit "p5600_fpu_short, p5600_fpu_long" "p5600_fpu_pipe")
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32
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33 ;; Short FPU pipeline
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34 (define_cpu_unit "p5600_fpu_intadd, p5600_fpu_cmp, p5600_fpu_float,
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35 p5600_fpu_logic_a, p5600_fpu_logic_b, p5600_fpu_div,
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36 p5600_fpu_store" "p5600_fpu_pipe")
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37
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38 ;; Long FPU pipeline
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39 (define_cpu_unit "p5600_fpu_logic, p5600_fpu_float_a, p5600_fpu_float_b,
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40 p5600_fpu_float_c, p5600_fpu_float_d" "p5600_fpu_pipe")
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41 (define_cpu_unit "p5600_fpu_mult, p5600_fpu_fdiv, p5600_fpu_load,
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42 p5600_fpu_apu" "p5600_fpu_pipe")
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43
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44 (define_reservation "p5600_agq_al2" "p5600_agq, p5600_al2")
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45 (define_reservation "p5600_agq_ctistd" "p5600_agq, p5600_ctistd")
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46 (define_reservation "p5600_agq_ldsta" "p5600_agq, p5600_ldsta")
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47 (define_reservation "p5600_alq_alu" "p5600_alq, p5600_alu")
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48
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49 ;;
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50 ;; FPU-MSA pipe
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51 ;;
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52
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53 ;; Arithmetic
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54 ;; add, hadd, sub, hsub, average, min, max, compare
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55 (define_insn_reservation "msa_short_int_add" 2
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56 (and (eq_attr "cpu" "p5600")
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57 (eq_attr "type" "simd_int_arith"))
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58 "p5600_fpu_short, p5600_fpu_intadd")
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59
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60 ;; Bitwise Instructions
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61 ;; and, or, xor, bit-clear, leading-bits-count, shift, shuffle
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62 (define_insn_reservation "msa_short_logic" 2
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63 (and (eq_attr "cpu" "p5600")
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64 (eq_attr "type" "simd_shift,simd_bit,simd_splat,simd_fill,simd_shf,
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65 simd_permute,simd_logic"))
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66 "p5600_fpu_short, p5600_fpu_logic_a")
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67
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68 ;; move.v
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69 (define_insn_reservation "msa_short_logic_move_v" 2
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70 (and (eq_attr "cpu" "p5600")
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71 (eq_attr "type" "simd_move"))
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72 "p5600_fpu_short, p5600_fpu_logic_a")
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73
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74 ;; Float compare
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75 (define_insn_reservation "msa_short_cmp" 2
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76 (and (eq_attr "cpu" "p5600")
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77 (eq_attr "type" "simd_fcmp"))
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78 "p5600_fpu_short, p5600_fpu_cmp")
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79
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80 ;; Float exp2, min, max
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81 (define_insn_reservation "msa_short_float2" 2
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82 (and (eq_attr "cpu" "p5600")
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83 (eq_attr "type" "simd_fexp2,simd_fminmax"))
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84 "p5600_fpu_short, p5600_fpu_float")
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85
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86 ;; Vector sat
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87 (define_insn_reservation "msa_short_logic3" 3
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88 (and (eq_attr "cpu" "p5600")
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89 (eq_attr "type" "simd_sat,simd_pcnt"))
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90 "p5600_fpu_short, p5600_fpu_logic_a, p5600_fpu_logic_b")
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91
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92 ;; Vector copy, bz, bnz
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93 (define_insn_reservation "msa_short_store4" 4
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94 (and (eq_attr "cpu" "p5600")
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95 (eq_attr "type" "simd_copy,simd_branch,simd_cmsa"))
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96 "p5600_fpu_short, p5600_fpu_store")
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97
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98 ;; Vector load
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99 (define_insn_reservation "msa_long_load" 10
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100 (and (eq_attr "cpu" "p5600")
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101 (eq_attr "type" "simd_load"))
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102 "p5600_fpu_long, p5600_fpu_load")
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103
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104 ;; Vector store
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105 (define_insn_reservation "msa_short_store" 2
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106 (and (eq_attr "cpu" "p5600")
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107 (eq_attr "type" "simd_store"))
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108 "p5600_fpu_short, p5600_fpu_store")
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109
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110 ;; binsl, binsr, insert, vshf, sld
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111 (define_insn_reservation "msa_long_logic" 2
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112 (and (eq_attr "cpu" "p5600")
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113 (eq_attr "type" "simd_bitins,simd_bitmov,simd_insert,simd_sld"))
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114 "p5600_fpu_long, p5600_fpu_logic")
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115
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116 ;; Float fclass, flog2
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117 (define_insn_reservation "msa_long_float2" 2
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118 (and (eq_attr "cpu" "p5600")
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119 (eq_attr "type" "simd_fclass,simd_flog2"))
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120 "p5600_fpu_long, p5600_fpu_float_a")
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121
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122 ;; fadd, fsub
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123 (define_insn_reservation "msa_long_float4" 4
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124 (and (eq_attr "cpu" "p5600")
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125 (eq_attr "type" "simd_fadd,simd_fcvt"))
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126 "p5600_fpu_long, p5600_fpu_float_a, p5600_fpu_float_b")
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127
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128 ;; fmul
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129 (define_insn_reservation "msa_long_float5" 5
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130 (and (eq_attr "cpu" "p5600")
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131 (eq_attr "type" "simd_fmul"))
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132 "p5600_fpu_long, p5600_fpu_float_a, p5600_fpu_float_b, p5600_fpu_float_c")
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133
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134 ;; fmadd, fmsub
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135 (define_insn_reservation "msa_long_float8" 8
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136 (and (eq_attr "cpu" "p5600")
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137 (eq_attr "type" "simd_fmadd"))
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138 "p5600_fpu_long, p5600_fpu_float_a,
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139 p5600_fpu_float_b, p5600_fpu_float_c, p5600_fpu_float_d")
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140
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141 ;; Vector mul, dotp, madd, msub
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142 (define_insn_reservation "msa_long_mult" 5
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143 (and (eq_attr "cpu" "p5600")
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144 (eq_attr "type" "simd_mul"))
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145 "p5600_fpu_long, p5600_fpu_mult")
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146
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147 ;; fdiv, fmod (semi-pipelined)
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148 (define_insn_reservation "msa_long_fdiv" 10
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149 (and (eq_attr "cpu" "p5600")
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150 (eq_attr "type" "simd_fdiv"))
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151 "p5600_fpu_long, nothing, nothing, p5600_fpu_fdiv*8")
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152
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153 ;; div, mod (non-pipelined)
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154 (define_insn_reservation "msa_long_div" 10
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155 (and (eq_attr "cpu" "p5600")
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156 (eq_attr "type" "simd_div"))
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157 "p5600_fpu_long, p5600_fpu_div*9, p5600_fpu_div + p5600_fpu_logic_a")
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158
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159 ;;
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160 ;; FPU pipe
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161 ;;
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162
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163 ;; fadd, fsub
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164 (define_insn_reservation "p5600_fpu_fadd" 4
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165 (and (eq_attr "cpu" "p5600")
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166 (eq_attr "type" "fadd"))
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167 "p5600_fpu_long, p5600_fpu_apu")
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168
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169 ;; fabs, fneg, fcmp, fmove
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170 (define_insn_reservation "p5600_fpu_fabs" 2
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171 (and (eq_attr "cpu" "p5600")
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172 (eq_attr "type" "fabs,fneg,fcmp,fmove"))
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173 "p5600_fpu_short, p5600_fpu_apu")
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174
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175 ;; fload
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176 (define_insn_reservation "p5600_fpu_fload" 8
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177 (and (eq_attr "cpu" "p5600")
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178 (eq_attr "type" "fpload,fpidxload"))
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179 "p5600_fpu_long, p5600_fpu_apu")
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180
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181 ;; fstore
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182 (define_insn_reservation "p5600_fpu_fstore" 1
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183 (and (eq_attr "cpu" "p5600")
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184 (eq_attr "type" "fpstore,fpidxstore"))
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185 "p5600_fpu_short, p5600_fpu_apu")
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186
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187 ;; fmadd
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188 (define_insn_reservation "p5600_fpu_fmadd" 9
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189 (and (eq_attr "cpu" "p5600")
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190 (eq_attr "type" "fmadd"))
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191 "p5600_fpu_long, p5600_fpu_apu")
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192
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193 ;; fmul
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194 (define_insn_reservation "p5600_fpu_fmul" 5
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195 (and (eq_attr "cpu" "p5600")
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196 (eq_attr "type" "fmul"))
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197 "p5600_fpu_long, p5600_fpu_apu")
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198
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199 ;; fdiv, fsqrt
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200 (define_insn_reservation "p5600_fpu_div" 17
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201 (and (eq_attr "cpu" "p5600")
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202 (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt"))
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203 "p5600_fpu_long, p5600_fpu_apu*17")
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204
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205 ;; fcvt
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206 (define_insn_reservation "p5600_fpu_fcvt" 4
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207 (and (eq_attr "cpu" "p5600")
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208 (eq_attr "type" "fcvt"))
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209 "p5600_fpu_long, p5600_fpu_apu")
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210
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211 ;; mtc
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212 (define_insn_reservation "p5600_fpu_fmtc" 7
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213 (and (eq_attr "cpu" "p5600")
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214 (eq_attr "type" "mtc"))
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215 "p5600_fpu_short, p5600_fpu_store")
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216
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217 ;; mfc
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218 (define_insn_reservation "p5600_fpu_fmfc" 4
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219 (and (eq_attr "cpu" "p5600")
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220 (eq_attr "type" "mfc"))
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221 "p5600_fpu_short, p5600_fpu_store")
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222
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223 ;; madd/msub feeding into the add source
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224 ;; madd.fmt dst, x, y, z -> madd.fmt a, dst, b, c 5 cycles
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225 (define_bypass 5 "p5600_fpu_fmadd" "p5600_fpu_fmadd" "mips_fmadd_bypass")
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226
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227 ;;
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228 ;; Integer pipe
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229 ;;
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230
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231 ;; and
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232 (define_insn_reservation "p5600_int_and" 1
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233 (and (eq_attr "cpu" "p5600")
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234 (eq_attr "move_type" "logical"))
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235 "p5600_alq_alu")
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236
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237 ;; lui
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238 (define_insn_reservation "p5600_int_lui" 1
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239 (and (eq_attr "cpu" "p5600")
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240 (eq_attr "move_type" "const"))
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241 "p5600_alq_alu")
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242
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243 ;; Load lb, lbu, lh, lhu, lq, lw, lw_i2f, lwxs
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244 (define_insn_reservation "p5600_int_load" 4
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245 (and (eq_attr "cpu" "p5600")
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246 (eq_attr "move_type" "load"))
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247 "p5600_agq_ldsta")
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248
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249 ;; store
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250 (define_insn_reservation "p5600_int_store" 3
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251 (and (eq_attr "cpu" "p5600")
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252 (eq_attr "move_type" "store"))
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253 "p5600_agq_ldsta")
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254
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255 ;; andi, sll, srl, seb, seh
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256 (define_insn_reservation "p5600_int_arith_1" 1
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257 (and (eq_attr "cpu" "p5600")
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258 (eq_attr "move_type" "andi,sll0,signext"))
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259 "p5600_alq_alu | p5600_agq_al2")
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260
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261 ;; addi, addiu, ori, xori, add, addu
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262 (define_insn_reservation "p5600_int_arith_2" 1
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263 (and (eq_attr "cpu" "p5600")
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264 (eq_attr "alu_type" "add,or,xor"))
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265 "p5600_alq_alu | p5600_agq_al2")
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266
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267 ;; nor, sub
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268 (define_insn_reservation "p5600_int_arith_3" 1
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269 (and (eq_attr "cpu" "p5600")
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270 (eq_attr "alu_type" "nor,sub"))
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271 "p5600_alq_alu")
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272
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273 ;; srl, sra, rotr, slt, sllv, srlv
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274 (define_insn_reservation "p5600_int_arith_4" 1
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275 (and (eq_attr "cpu" "p5600")
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276 (eq_attr "type" "shift,slt,move"))
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277 "p5600_alq_alu | p5600_agq_al2")
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278
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279 ;; nop
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280 (define_insn_reservation "p5600_int_nop" 0
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281 (and (eq_attr "cpu" "p5600")
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282 (eq_attr "type" "nop"))
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283 "p5600_agq_al2")
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284
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285 ;; clo, clz
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286 (define_insn_reservation "p5600_int_countbits" 1
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287 (and (eq_attr "cpu" "p5600")
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288 (eq_attr "type" "clz"))
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289 "p5600_agq_al2")
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290
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291 ;; Conditional moves
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292 (define_insn_reservation "p5600_int_condmove" 1
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293 (and (eq_attr "cpu" "p5600")
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294 (eq_attr "type" "condmove"))
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295 "p5600_agq_al2")
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296
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297 ;; madd, msub
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298 (define_insn_reservation "p5600_dsp_mac" 5
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299 (and (eq_attr "cpu" "p5600")
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300 (eq_attr "type" "imadd"))
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301 "p5600_agq_al2")
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302
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303 ;; mfhi/lo
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304 (define_insn_reservation "p5600_dsp_mfhilo" 1
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305 (and (eq_attr "cpu" "p5600")
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306 (eq_attr "type" "mfhi,mflo"))
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307 "p5600_agq_al2")
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308
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309 ;; mthi/lo
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310 (define_insn_reservation "p5600_dsp_mthilo" 5
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311 (and (eq_attr "cpu" "p5600")
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312 (eq_attr "type" "mthi,mtlo"))
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313 "p5600_agq_al2")
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314
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315 ;; mult, multu, mul
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316 (define_insn_reservation "p5600_dsp_mult" 5
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317 (and (eq_attr "cpu" "p5600")
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318 (eq_attr "type" "imul3,imul"))
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319 "p5600_agq_al2")
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320
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321 ;; branch and jump
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322 (define_insn_reservation "p5600_int_branch" 1
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323 (and (eq_attr "cpu" "p5600")
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324 (eq_attr "type" "branch,jump"))
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325 "p5600_agq_ctistd")
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326
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327 ;; prefetch
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328 (define_insn_reservation "p5600_int_prefetch" 3
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329 (and (eq_attr "cpu" "p5600")
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330 (eq_attr "type" "prefetch,prefetchx"))
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331 "p5600_agq_ldsta")
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332
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333 ;; divide
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334 (define_insn_reservation "p5600_int_div" 8
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335 (and (eq_attr "cpu" "p5600")
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336 (eq_attr "type" "idiv"))
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337 "p5600_agq_al2+p5600_gpdiv*8")
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338
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339 ;; arith
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340 (define_insn_reservation "p5600_int_arith_5" 2
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341 (and (eq_attr "cpu" "p5600")
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342 (eq_attr "type" "arith"))
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343 "p5600_agq_al2")
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344
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345 ;; call
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346 (define_insn_reservation "p5600_int_call" 2
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347 (and (eq_attr "cpu" "p5600")
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348 (eq_attr "jal" "indirect,direct"))
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349 "p5600_agq_ctistd")
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