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comparison gcc/config/s390/2084.md @ 111:04ced10e8804

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gcc 7
author kono
date Fri, 27 Oct 2017 22:46:09 +0900
parents f6334be47118
children 84e7813d76e9
comparison
equal deleted inserted replaced
68:561a7518be6b 111:04ced10e8804
1 ;; Scheduling description for z990 (cpu 2084). 1 ;; Scheduling description for z990 (cpu 2084).
2 ;; Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2010 2 ;; Copyright (C) 2003-2017 Free Software Foundation, Inc.
3 ;; Free Software Foundation, Inc.
4 ;; Contributed by Hartmut Penner (hpenner@de.ibm.com) and 3 ;; Contributed by Hartmut Penner (hpenner@de.ibm.com) and
5 ;; Ulrich Weigand (uweigand@de.ibm.com). 4 ;; Ulrich Weigand (uweigand@de.ibm.com).
6 5
7 ;; This file is part of GCC. 6 ;; This file is part of GCC.
8 7
60 ;; 59 ;;
61 ;; Simple insns 60 ;; Simple insns
62 ;; 61 ;;
63 62
64 (define_insn_reservation "x_int" 1 63 (define_insn_reservation "x_int" 1
65 (and (eq_attr "cpu" "z990,z9_109") 64 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
66 (and (eq_attr "type" "integer") 65 (and (eq_attr "type" "integer")
67 (eq_attr "atype" "reg"))) 66 (eq_attr "atype" "reg")))
68 "x-e1-st,x-wr-st") 67 "x-e1-st,x-wr-st")
69 68
70 (define_insn_reservation "x_agen" 1 69 (define_insn_reservation "x_agen" 1
71 (and (eq_attr "cpu" "z990,z9_109") 70 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
72 (and (eq_attr "type" "integer") 71 (and (eq_attr "type" "integer")
73 (eq_attr "atype" "agen"))) 72 (eq_attr "atype" "agen")))
74 "x-e1-st,x-wr-st") 73 "x-e1-st,x-wr-st")
75 74
76 (define_insn_reservation "x_lr" 1 75 (define_insn_reservation "x_lr" 1
77 (and (eq_attr "cpu" "z990,z9_109") 76 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
78 (eq_attr "type" "lr")) 77 (eq_attr "type" "lr"))
79 "x-e1-st,x-wr-st") 78 "x-e1-st,x-wr-st")
80 79
81 (define_insn_reservation "x_la" 1 80 (define_insn_reservation "x_la" 1
82 (and (eq_attr "cpu" "z990,z9_109") 81 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
83 (eq_attr "type" "la")) 82 (eq_attr "type" "la"))
84 "x-e1-st,x-wr-st") 83 "x-e1-st,x-wr-st")
85 84
86 (define_insn_reservation "x_larl" 1 85 (define_insn_reservation "x_larl" 1
87 (and (eq_attr "cpu" "z990,z9_109") 86 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
88 (eq_attr "type" "larl")) 87 (eq_attr "type" "larl"))
89 "x-e1-st,x-wr-st") 88 "x-e1-st,x-wr-st")
90 89
91 (define_insn_reservation "x_load" 1 90 (define_insn_reservation "x_load" 1
92 (and (eq_attr "cpu" "z990,z9_109") 91 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
93 (eq_attr "type" "load")) 92 (eq_attr "type" "load"))
94 "x-e1-st+x-mem,x-wr-st") 93 "x-e1-st+x-mem,x-wr-st")
95 94
96 (define_insn_reservation "x_store" 1 95 (define_insn_reservation "x_store" 1
97 (and (eq_attr "cpu" "z990,z9_109") 96 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
98 (eq_attr "type" "store")) 97 (eq_attr "type" "store"))
99 "x-e1-st+x_store_tok,x-wr-st") 98 "x-e1-st+x_store_tok,x-wr-st")
100 99
101 (define_insn_reservation "x_branch" 1 100 (define_insn_reservation "x_branch" 1
102 (and (eq_attr "cpu" "z990,z9_109") 101 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
103 (eq_attr "type" "branch")) 102 (eq_attr "type" "branch"))
104 "x_e1_r,x_wr_r") 103 "x_e1_r,x_wr_r")
105 104
106 (define_insn_reservation "x_call" 5 105 (define_insn_reservation "x_call" 5
107 (and (eq_attr "cpu" "z990,z9_109") 106 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
108 (eq_attr "type" "jsr")) 107 (eq_attr "type" "jsr"))
109 "x-e1-np*5,x-wr-np") 108 "x-e1-np*5,x-wr-np")
110 109
111 (define_insn_reservation "x_mul_hi" 2 110 (define_insn_reservation "x_mul_hi" 2
112 (and (eq_attr "cpu" "z990,z9_109") 111 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
113 (eq_attr "type" "imulhi")) 112 (eq_attr "type" "imulhi"))
114 "x-e1-np*2,x-wr-np") 113 "x-e1-np*2,x-wr-np")
115 114
116 (define_insn_reservation "x_mul_sidi" 4 115 (define_insn_reservation "x_mul_sidi" 4
117 (and (eq_attr "cpu" "z990,z9_109") 116 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
118 (eq_attr "type" "imulsi,imuldi")) 117 (eq_attr "type" "imulsi,imuldi"))
119 "x-e1-np*4,x-wr-np") 118 "x-e1-np*4,x-wr-np")
120 119
121 (define_insn_reservation "x_div" 10 120 (define_insn_reservation "x_div" 10
122 (and (eq_attr "cpu" "z990,z9_109") 121 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
123 (eq_attr "type" "idiv")) 122 (eq_attr "type" "idiv"))
124 "x-e1-np*10,x-wr-np") 123 "x-e1-np*10,x-wr-np")
125 124
126 (define_insn_reservation "x_sem" 17 125 (define_insn_reservation "x_sem" 17
127 (and (eq_attr "cpu" "z990,z9_109") 126 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
128 (eq_attr "type" "sem")) 127 (eq_attr "type" "sem"))
129 "x-e1-np+x-mem,x-e1-np*16,x-wr-st") 128 "x-e1-np+x-mem,x-e1-np*16,x-wr-st")
130 129
131 ;; 130 ;;
132 ;; Multicycle insns 131 ;; Multicycle insns
133 ;; 132 ;;
134 133
135 (define_insn_reservation "x_cs" 1 134 (define_insn_reservation "x_cs" 1
136 (and (eq_attr "cpu" "z990,z9_109") 135 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
137 (eq_attr "type" "cs")) 136 (eq_attr "type" "cs"))
138 "x-e1-np,x-wr-np") 137 "x-e1-np,x-wr-np")
139 138
140 (define_insn_reservation "x_vs" 1 139 (define_insn_reservation "x_vs" 1
141 (and (eq_attr "cpu" "z990,z9_109") 140 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
142 (eq_attr "type" "vs")) 141 (eq_attr "type" "vs"))
143 "x-e1-np*10,x-wr-np") 142 "x-e1-np*10,x-wr-np")
144 143
145 (define_insn_reservation "x_stm" 1 144 (define_insn_reservation "x_stm" 1
146 (and (eq_attr "cpu" "z990,z9_109") 145 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
147 (eq_attr "type" "stm")) 146 (eq_attr "type" "stm"))
148 "(x-e1-np+x_store_tok)*10,x-wr-np") 147 "(x-e1-np+x_store_tok)*10,x-wr-np")
149 148
150 (define_insn_reservation "x_lm" 1 149 (define_insn_reservation "x_lm" 1
151 (and (eq_attr "cpu" "z990,z9_109") 150 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
152 (eq_attr "type" "lm")) 151 (eq_attr "type" "lm"))
153 "x-e1-np*10,x-wr-np") 152 "x-e1-np*10,x-wr-np")
154 153
155 (define_insn_reservation "x_other" 1 154 (define_insn_reservation "x_other" 1
156 (and (eq_attr "cpu" "z990,z9_109") 155 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
157 (eq_attr "type" "other")) 156 (eq_attr "type" "other"))
158 "x-e1-np,x-wr-np") 157 "x-e1-np,x-wr-np")
159 158
160 ;; 159 ;;
161 ;; Floating point insns 160 ;; Floating point insns
162 ;; 161 ;;
163 162
164 (define_insn_reservation "x_fsimptf" 7 163 (define_insn_reservation "x_fsimptf" 7
165 (and (eq_attr "cpu" "z990,z9_109") 164 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
166 (eq_attr "type" "fsimptf,fhex")) 165 (eq_attr "type" "fsimptf,fhex"))
167 "x_e1_t*2,x-wr-fp") 166 "x_e1_t*2,x-wr-fp")
168 167
169 (define_insn_reservation "x_fsimpdf" 6 168 (define_insn_reservation "x_fsimpdf" 6
170 (and (eq_attr "cpu" "z990,z9_109") 169 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
171 (eq_attr "type" "fsimpdf,fmuldf,fmadddf,fhex")) 170 (eq_attr "type" "fsimpdf,fmuldf,fmadddf,fhex"))
172 "x_e1_t,x-wr-fp") 171 "x_e1_t,x-wr-fp")
173 172
174 (define_insn_reservation "x_fsimpsf" 6 173 (define_insn_reservation "x_fsimpsf" 6
175 (and (eq_attr "cpu" "z990,z9_109") 174 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
176 (eq_attr "type" "fsimpsf,fmulsf,fmaddsf,fhex")) 175 (eq_attr "type" "fsimpsf,fmulsf,fmaddsf,fhex"))
177 "x_e1_t,x-wr-fp") 176 "x_e1_t,x-wr-fp")
178 177
179 178
180 (define_insn_reservation "x_fmultf" 33 179 (define_insn_reservation "x_fmultf" 33
181 (and (eq_attr "cpu" "z990,z9_109") 180 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
182 (eq_attr "type" "fmultf")) 181 (eq_attr "type" "fmultf"))
183 "x_e1_t*27,x-wr-fp") 182 "x_e1_t*27,x-wr-fp")
184 183
185 184
186 (define_insn_reservation "x_fdivtf" 82 185 (define_insn_reservation "x_fdivtf" 82
187 (and (eq_attr "cpu" "z990,z9_109") 186 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
188 (eq_attr "type" "fdivtf,fsqrttf")) 187 (eq_attr "type" "fdivtf,fsqrttf"))
189 "x_e1_t*76,x-wr-fp") 188 "x_e1_t*76,x-wr-fp")
190 189
191 (define_insn_reservation "x_fdivdf" 36 190 (define_insn_reservation "x_fdivdf" 36
192 (and (eq_attr "cpu" "z990,z9_109") 191 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
193 (eq_attr "type" "fdivdf,fsqrtdf")) 192 (eq_attr "type" "fdivdf,fsqrtdf"))
194 "x_e1_t*30,x-wr-fp") 193 "x_e1_t*30,x-wr-fp")
195 194
196 (define_insn_reservation "x_fdivsf" 36 195 (define_insn_reservation "x_fdivsf" 36
197 (and (eq_attr "cpu" "z990,z9_109") 196 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
198 (eq_attr "type" "fdivsf,fsqrtsf")) 197 (eq_attr "type" "fdivsf,fsqrtsf"))
199 "x_e1_t*30,x-wr-fp") 198 "x_e1_t*30,x-wr-fp")
200 199
201 200
202 (define_insn_reservation "x_floadtf" 6 201 (define_insn_reservation "x_floadtf" 6
203 (and (eq_attr "cpu" "z990,z9_109") 202 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
204 (eq_attr "type" "floadtf")) 203 (eq_attr "type" "floadtf"))
205 "x_e1_t,x-wr-fp") 204 "x_e1_t,x-wr-fp")
206 205
207 (define_insn_reservation "x_floaddf" 6 206 (define_insn_reservation "x_floaddf" 6
208 (and (eq_attr "cpu" "z990,z9_109") 207 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
209 (eq_attr "type" "floaddf")) 208 (eq_attr "type" "floaddf"))
210 "x_e1_t,x-wr-fp") 209 "x_e1_t,x-wr-fp")
211 210
212 (define_insn_reservation "x_floadsf" 6 211 (define_insn_reservation "x_floadsf" 6
213 (and (eq_attr "cpu" "z990,z9_109") 212 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
214 (eq_attr "type" "floadsf")) 213 (eq_attr "type" "floadsf"))
215 "x_e1_t,x-wr-fp") 214 "x_e1_t,x-wr-fp")
216 215
217 216
218 (define_insn_reservation "x_fstoredf" 1 217 (define_insn_reservation "x_fstoredf" 1
219 (and (eq_attr "cpu" "z990,z9_109") 218 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
220 (eq_attr "type" "fstoredf")) 219 (eq_attr "type" "fstoredf"))
221 "x_e1_t,x-wr-fp") 220 "x_e1_t,x-wr-fp")
222 221
223 (define_insn_reservation "x_fstoresf" 1 222 (define_insn_reservation "x_fstoresf" 1
224 (and (eq_attr "cpu" "z990,z9_109") 223 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
225 (eq_attr "type" "fstoresf")) 224 (eq_attr "type" "fstoresf"))
226 "x_e1_t,x-wr-fp") 225 "x_e1_t,x-wr-fp")
227 226
228 227
229 (define_insn_reservation "x_ftrunctf" 16 228 (define_insn_reservation "x_ftrunctf" 16
230 (and (eq_attr "cpu" "z990,z9_109") 229 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
231 (eq_attr "type" "ftrunctf")) 230 (eq_attr "type" "ftrunctf"))
232 "x_e1_t*10,x-wr-fp") 231 "x_e1_t*10,x-wr-fp")
233 232
234 (define_insn_reservation "x_ftruncdf" 11 233 (define_insn_reservation "x_ftruncdf" 11
235 (and (eq_attr "cpu" "z990,z9_109") 234 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
236 (eq_attr "type" "ftruncdf")) 235 (eq_attr "type" "ftruncdf"))
237 "x_e1_t*5,x-wr-fp") 236 "x_e1_t*5,x-wr-fp")
238 237
239 238
240 (define_insn_reservation "x_ftoi" 1 239 (define_insn_reservation "x_ftoi" 1
241 (and (eq_attr "cpu" "z990,z9_109") 240 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
242 (eq_attr "type" "ftoi")) 241 (eq_attr "type" "ftoi"))
243 "x_e1_t*3,x-wr-fp") 242 "x_e1_t*3,x-wr-fp")
244 243
245 (define_insn_reservation "x_itof" 7 244 (define_insn_reservation "x_itof" 7
246 (and (eq_attr "cpu" "z990,z9_109") 245 (and (eq_attr "cpu" "z990,z9_109,z9_ec")
247 (eq_attr "type" "itoftf,itofdf,itofsf")) 246 (eq_attr "type" "itoftf,itofdf,itofsf"))
248 "x_e1_t*3,x-wr-fp") 247 "x_e1_t*3,x-wr-fp")
249 248
250 (define_bypass 1 "x_fsimpdf" "x_fstoredf") 249 (define_bypass 1 "x_fsimpdf" "x_fstoredf")
251 250