Mercurial > hg > CbC > CbC_gcc
comparison gcc/config/sparc/sparc.opt @ 111:04ced10e8804
gcc 7
author | kono |
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date | Fri, 27 Oct 2017 22:46:09 +0900 |
parents | f6334be47118 |
children | 84e7813d76e9 |
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68:561a7518be6b | 111:04ced10e8804 |
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1 ; Options for the SPARC port of the compiler | 1 ; Options for the SPARC port of the compiler |
2 ; | 2 ; |
3 ; Copyright (C) 2005, 2007, 2010 Free Software Foundation, Inc. | 3 ; Copyright (C) 2005-2017 Free Software Foundation, Inc. |
4 ; | 4 ; |
5 ; This file is part of GCC. | 5 ; This file is part of GCC. |
6 ; | 6 ; |
7 ; GCC is free software; you can redistribute it and/or modify it under | 7 ; GCC is free software; you can redistribute it and/or modify it under |
8 ; the terms of the GNU General Public License as published by the Free | 8 ; the terms of the GNU General Public License as published by the Free |
16 ; | 16 ; |
17 ; You should have received a copy of the GNU General Public License | 17 ; You should have received a copy of the GNU General Public License |
18 ; along with GCC; see the file COPYING3. If not see | 18 ; along with GCC; see the file COPYING3. If not see |
19 ; <http://www.gnu.org/licenses/>. | 19 ; <http://www.gnu.org/licenses/>. |
20 | 20 |
21 HeaderInclude | |
22 config/sparc/sparc-opts.h | |
23 | |
24 ;; Debug flags | |
25 TargetVariable | |
26 unsigned int sparc_debug | |
27 | |
21 mfpu | 28 mfpu |
22 Target Report Mask(FPU) | 29 Target Report Mask(FPU) |
23 Use hardware FP | 30 Use hardware FP. |
24 | 31 |
25 mhard-float | 32 mhard-float |
26 Target RejectNegative Mask(FPU) MaskExists | 33 Target RejectNegative Mask(FPU) |
27 Use hardware FP | 34 Use hardware FP. |
28 | 35 |
29 msoft-float | 36 msoft-float |
30 Target RejectNegative InverseMask(FPU) | 37 Target RejectNegative InverseMask(FPU) |
31 Do not use hardware FP | 38 Do not use hardware FP. |
39 | |
40 mflat | |
41 Target Report Mask(FLAT) | |
42 Use flat register window model. | |
32 | 43 |
33 munaligned-doubles | 44 munaligned-doubles |
34 Target Report Mask(UNALIGNED_DOUBLES) | 45 Target Report Mask(UNALIGNED_DOUBLES) |
35 Assume possible double misalignment | 46 Assume possible double misalignment. |
36 | 47 |
37 mapp-regs | 48 mapp-regs |
38 Target Report Mask(APP_REGS) | 49 Target Report Mask(APP_REGS) |
39 Use ABI reserved registers | 50 Use ABI reserved registers. |
40 | 51 |
41 mhard-quad-float | 52 mhard-quad-float |
42 Target Report RejectNegative Mask(HARD_QUAD) | 53 Target Report RejectNegative Mask(HARD_QUAD) |
43 Use hardware quad FP instructions | 54 Use hardware quad FP instructions. |
44 | 55 |
45 msoft-quad-float | 56 msoft-quad-float |
46 Target Report RejectNegative InverseMask(HARD_QUAD) | 57 Target Report RejectNegative InverseMask(HARD_QUAD) |
47 Do not use hardware quad fp instructions | 58 Do not use hardware quad fp instructions. |
59 | |
60 mlra | |
61 Target Report Mask(LRA) | |
62 Enable Local Register Allocation. | |
48 | 63 |
49 mv8plus | 64 mv8plus |
50 Target Report Mask(V8PLUS) | 65 Target Report Mask(V8PLUS) |
51 Compile for V8+ ABI | 66 Compile for V8+ ABI. |
52 | 67 |
53 mvis | 68 mvis |
54 Target Report Mask(VIS) | 69 Target Report Mask(VIS) |
55 Use UltraSPARC Visual Instruction Set extensions | 70 Use UltraSPARC Visual Instruction Set version 1.0 extensions. |
71 | |
72 mvis2 | |
73 Target Report Mask(VIS2) | |
74 Use UltraSPARC Visual Instruction Set version 2.0 extensions. | |
75 | |
76 mvis3 | |
77 Target Report Mask(VIS3) | |
78 Use UltraSPARC Visual Instruction Set version 3.0 extensions. | |
79 | |
80 mvis4 | |
81 Target Report Mask(VIS4) | |
82 Use UltraSPARC Visual Instruction Set version 4.0 extensions. | |
83 | |
84 mvis4b | |
85 Target Report Mask(VIS4B) | |
86 Use additional VIS instructions introduced in OSA2017. | |
87 | |
88 mcbcond | |
89 Target Report Mask(CBCOND) | |
90 Use UltraSPARC Compare-and-Branch extensions. | |
91 | |
92 mfmaf | |
93 Target Report Mask(FMAF) | |
94 Use UltraSPARC Fused Multiply-Add extensions. | |
95 | |
96 mfsmuld | |
97 Target Report Mask(FSMULD) | |
98 Use Floating-point Multiply Single to Double (FsMULd) instruction. | |
99 | |
100 mpopc | |
101 Target Report Mask(POPC) | |
102 Use UltraSPARC Population-Count instruction. | |
103 | |
104 msubxc | |
105 Target Report Mask(SUBXC) | |
106 Use UltraSPARC Subtract-Extended-with-Carry instruction. | |
56 | 107 |
57 mptr64 | 108 mptr64 |
58 Target Report RejectNegative Mask(PTR64) | 109 Target Report RejectNegative Mask(PTR64) |
59 Pointers are 64-bit | 110 Pointers are 64-bit. |
60 | 111 |
61 mptr32 | 112 mptr32 |
62 Target Report RejectNegative InverseMask(PTR64) | 113 Target Report RejectNegative InverseMask(PTR64) |
63 Pointers are 32-bit | 114 Pointers are 32-bit. |
64 | 115 |
65 m64 | 116 m64 |
66 Target Report RejectNegative Mask(64BIT) | 117 Target Report RejectNegative Mask(64BIT) |
67 Use 64-bit ABI | 118 Use 64-bit ABI. |
68 | 119 |
69 m32 | 120 m32 |
70 Target Report RejectNegative InverseMask(64BIT) | 121 Target Report RejectNegative InverseMask(64BIT) |
71 Use 32-bit ABI | 122 Use 32-bit ABI. |
72 | 123 |
73 mstack-bias | 124 mstack-bias |
74 Target Report Mask(STACK_BIAS) | 125 Target Report Mask(STACK_BIAS) |
75 Use stack bias | 126 Use stack bias. |
76 | 127 |
77 mfaster-structs | 128 mfaster-structs |
78 Target Report Mask(FASTER_STRUCTS) | 129 Target Report Mask(FASTER_STRUCTS) |
79 Use structs on stronger alignment for double-word copies | 130 Use structs on stronger alignment for double-word copies. |
80 | 131 |
81 mrelax | 132 mrelax |
82 Target | 133 Target |
83 Optimize tail call instructions in assembler and linker | 134 Optimize tail call instructions in assembler and linker. |
135 | |
136 muser-mode | |
137 Target Report InverseMask(SV_MODE) | |
138 Do not generate code that can only run in supervisor mode (default). | |
84 | 139 |
85 mcpu= | 140 mcpu= |
86 Target RejectNegative Joined | 141 Target RejectNegative Joined Var(sparc_cpu_and_features) Enum(sparc_processor_type) Init(PROCESSOR_V7) |
87 Use features of and schedule code for given CPU | 142 Use features of and schedule code for given CPU. |
88 | 143 |
89 mtune= | 144 mtune= |
90 Target RejectNegative Joined | 145 Target RejectNegative Joined Var(sparc_cpu) Enum(sparc_processor_type) Init(PROCESSOR_V7) |
91 Schedule code for given CPU | 146 Schedule code for given CPU. |
147 | |
148 Enum | |
149 Name(sparc_processor_type) Type(enum processor_type) | |
150 | |
151 EnumValue | |
152 Enum(sparc_processor_type) String(native) Value(PROCESSOR_NATIVE) DriverOnly | |
153 | |
154 EnumValue | |
155 Enum(sparc_processor_type) String(v7) Value(PROCESSOR_V7) | |
156 | |
157 EnumValue | |
158 Enum(sparc_processor_type) String(cypress) Value(PROCESSOR_CYPRESS) | |
159 | |
160 EnumValue | |
161 Enum(sparc_processor_type) String(v8) Value(PROCESSOR_V8) | |
162 | |
163 EnumValue | |
164 Enum(sparc_processor_type) String(supersparc) Value(PROCESSOR_SUPERSPARC) | |
165 | |
166 EnumValue | |
167 Enum(sparc_processor_type) String(hypersparc) Value(PROCESSOR_HYPERSPARC) | |
168 | |
169 EnumValue | |
170 Enum(sparc_processor_type) String(leon) Value(PROCESSOR_LEON) | |
171 | |
172 EnumValue | |
173 Enum(sparc_processor_type) String(leon3) Value(PROCESSOR_LEON3) | |
174 | |
175 EnumValue | |
176 Enum(sparc_processor_type) String(leon3v7) Value(PROCESSOR_LEON3V7) | |
177 | |
178 EnumValue | |
179 Enum(sparc_processor_type) String(sparclite) Value(PROCESSOR_SPARCLITE) | |
180 | |
181 EnumValue | |
182 Enum(sparc_processor_type) String(f930) Value(PROCESSOR_F930) | |
183 | |
184 EnumValue | |
185 Enum(sparc_processor_type) String(f934) Value(PROCESSOR_F934) | |
186 | |
187 EnumValue | |
188 Enum(sparc_processor_type) String(sparclite86x) Value(PROCESSOR_SPARCLITE86X) | |
189 | |
190 EnumValue | |
191 Enum(sparc_processor_type) String(sparclet) Value(PROCESSOR_SPARCLET) | |
192 | |
193 EnumValue | |
194 Enum(sparc_processor_type) String(tsc701) Value(PROCESSOR_TSC701) | |
195 | |
196 EnumValue | |
197 Enum(sparc_processor_type) String(v9) Value(PROCESSOR_V9) | |
198 | |
199 EnumValue | |
200 Enum(sparc_processor_type) String(ultrasparc) Value(PROCESSOR_ULTRASPARC) | |
201 | |
202 EnumValue | |
203 Enum(sparc_processor_type) String(ultrasparc3) Value(PROCESSOR_ULTRASPARC3) | |
204 | |
205 EnumValue | |
206 Enum(sparc_processor_type) String(niagara) Value(PROCESSOR_NIAGARA) | |
207 | |
208 EnumValue | |
209 Enum(sparc_processor_type) String(niagara2) Value(PROCESSOR_NIAGARA2) | |
210 | |
211 EnumValue | |
212 Enum(sparc_processor_type) String(niagara3) Value(PROCESSOR_NIAGARA3) | |
213 | |
214 EnumValue | |
215 Enum(sparc_processor_type) String(niagara4) Value(PROCESSOR_NIAGARA4) | |
216 | |
217 EnumValue | |
218 Enum(sparc_processor_type) String(niagara7) Value(PROCESSOR_NIAGARA7) | |
219 | |
220 EnumValue | |
221 Enum(sparc_processor_type) String(m8) Value(PROCESSOR_M8) | |
92 | 222 |
93 mcmodel= | 223 mcmodel= |
94 Target RejectNegative Joined Var(sparc_cmodel_string) | 224 Target RejectNegative Joined Var(sparc_cmodel_string) |
95 Use given SPARC-V9 code model | 225 Use given SPARC-V9 code model. |
226 | |
227 mdebug= | |
228 Target RejectNegative Joined Var(sparc_debug_string) | |
229 Enable debug output. | |
96 | 230 |
97 mstd-struct-return | 231 mstd-struct-return |
98 Target Report RejectNegative Var(sparc_std_struct_return) | 232 Target Report Var(sparc_std_struct_return) |
99 Enable strict 32-bit psABI struct return checking. | 233 Enable strict 32-bit psABI struct return checking. |
100 | 234 |
101 Mask(LITTLE_ENDIAN) | 235 mfix-at697f |
102 ;; Generate code for little-endian | 236 Target Report RejectNegative Var(sparc_fix_at697f) |
237 Enable workaround for single erratum of AT697F processor | |
238 (corresponding to erratum #13 of AT697E processor). | |
239 | |
240 mfix-ut699 | |
241 Target Report RejectNegative Var(sparc_fix_ut699) | |
242 Enable workarounds for the errata of the UT699 processor. | |
243 | |
244 mfix-ut700 | |
245 Target Report RejectNegative Var(sparc_fix_ut700) | |
246 Enable workarounds for the errata of the UT699E/UT700 processor. | |
247 | |
248 mfix-gr712rc | |
249 Target Report RejectNegative Var(sparc_fix_gr712rc) | |
250 Enable workarounds for the errata of the GR712RC processor. | |
251 | |
252 ;; Enable workaround for back-to-back store errata | |
253 TargetVariable | |
254 unsigned int sparc_fix_b2bst | |
103 | 255 |
104 Mask(LONG_DOUBLE_128) | 256 Mask(LONG_DOUBLE_128) |
105 ;; Use 128-bit long double | 257 ;; Use 128-bit long double |
258 | |
259 Mask(LEON) | |
260 ;; Generate code for LEON | |
261 | |
262 Mask(LEON3) | |
263 ;; Generate code for LEON3 | |
106 | 264 |
107 Mask(SPARCLITE) | 265 Mask(SPARCLITE) |
108 ;; Generate code for SPARClite | 266 ;; Generate code for SPARClite |
109 | 267 |
110 Mask(SPARCLET) | 268 Mask(SPARCLET) |
117 ;; Generate code for SPARC-V9 | 275 ;; Generate code for SPARC-V9 |
118 | 276 |
119 Mask(DEPRECATED_V8_INSNS) | 277 Mask(DEPRECATED_V8_INSNS) |
120 ;; Generate code that uses the V8 instructions deprecated | 278 ;; Generate code that uses the V8 instructions deprecated |
121 ;; in the V9 architecture. | 279 ;; in the V9 architecture. |
280 | |
281 mmemory-model= | |
282 Target RejectNegative Joined Var(sparc_memory_model) Enum(sparc_memory_model) Init(SMM_DEFAULT) | |
283 Specify the memory model in effect for the program. | |
284 | |
285 Enum | |
286 Name(sparc_memory_model) Type(enum sparc_memory_model_type) | |
287 | |
288 EnumValue | |
289 Enum(sparc_memory_model) String(default) Value(SMM_DEFAULT) | |
290 | |
291 EnumValue | |
292 Enum(sparc_memory_model) String(rmo) Value(SMM_RMO) | |
293 | |
294 EnumValue | |
295 Enum(sparc_memory_model) String(pso) Value(SMM_PSO) | |
296 | |
297 EnumValue | |
298 Enum(sparc_memory_model) String(tso) Value(SMM_TSO) | |
299 | |
300 EnumValue | |
301 Enum(sparc_memory_model) String(sc) Value(SMM_SC) |