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1 ; Options for the SPARC port of the compiler
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2 ;
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3 ; Copyright (C) 2005-2017 Free Software Foundation, Inc.
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4 ;
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5 ; This file is part of GCC.
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6 ;
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7 ; GCC is free software; you can redistribute it and/or modify it under
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8 ; the terms of the GNU General Public License as published by the Free
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9 ; Software Foundation; either version 3, or (at your option) any later
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10 ; version.
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11 ;
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12 ; GCC is distributed in the hope that it will be useful, but WITHOUT
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13 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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14 ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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15 ; License for more details.
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16 ;
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17 ; You should have received a copy of the GNU General Public License
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18 ; along with GCC; see the file COPYING3. If not see
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19 ; <http://www.gnu.org/licenses/>.
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20
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111
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21 HeaderInclude
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22 config/sparc/sparc-opts.h
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23
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24 ;; Debug flags
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25 TargetVariable
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26 unsigned int sparc_debug
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27
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0
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28 mfpu
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29 Target Report Mask(FPU)
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111
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30 Use hardware FP.
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0
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31
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32 mhard-float
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111
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33 Target RejectNegative Mask(FPU)
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34 Use hardware FP.
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0
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35
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36 msoft-float
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37 Target RejectNegative InverseMask(FPU)
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111
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38 Do not use hardware FP.
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39
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40 mflat
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41 Target Report Mask(FLAT)
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42 Use flat register window model.
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0
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43
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44 munaligned-doubles
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45 Target Report Mask(UNALIGNED_DOUBLES)
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111
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46 Assume possible double misalignment.
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0
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47
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48 mapp-regs
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49 Target Report Mask(APP_REGS)
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111
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50 Use ABI reserved registers.
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0
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51
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52 mhard-quad-float
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53 Target Report RejectNegative Mask(HARD_QUAD)
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54 Use hardware quad FP instructions.
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55
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56 msoft-quad-float
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57 Target Report RejectNegative InverseMask(HARD_QUAD)
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111
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58 Do not use hardware quad fp instructions.
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59
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60 mlra
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61 Target Report Mask(LRA)
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62 Enable Local Register Allocation.
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63
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64 mv8plus
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65 Target Report Mask(V8PLUS)
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66 Compile for V8+ ABI.
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67
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68 mvis
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69 Target Report Mask(VIS)
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70 Use UltraSPARC Visual Instruction Set version 1.0 extensions.
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71
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72 mvis2
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73 Target Report Mask(VIS2)
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74 Use UltraSPARC Visual Instruction Set version 2.0 extensions.
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75
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76 mvis3
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77 Target Report Mask(VIS3)
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78 Use UltraSPARC Visual Instruction Set version 3.0 extensions.
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79
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80 mvis4
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81 Target Report Mask(VIS4)
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82 Use UltraSPARC Visual Instruction Set version 4.0 extensions.
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83
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84 mvis4b
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85 Target Report Mask(VIS4B)
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86 Use additional VIS instructions introduced in OSA2017.
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87
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88 mcbcond
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89 Target Report Mask(CBCOND)
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90 Use UltraSPARC Compare-and-Branch extensions.
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91
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92 mfmaf
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93 Target Report Mask(FMAF)
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94 Use UltraSPARC Fused Multiply-Add extensions.
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95
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96 mfsmuld
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97 Target Report Mask(FSMULD)
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98 Use Floating-point Multiply Single to Double (FsMULd) instruction.
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99
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100 mpopc
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101 Target Report Mask(POPC)
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102 Use UltraSPARC Population-Count instruction.
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103
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104 msubxc
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105 Target Report Mask(SUBXC)
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106 Use UltraSPARC Subtract-Extended-with-Carry instruction.
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0
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107
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108 mptr64
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109 Target Report RejectNegative Mask(PTR64)
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110 Pointers are 64-bit.
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0
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111
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112 mptr32
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113 Target Report RejectNegative InverseMask(PTR64)
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114 Pointers are 32-bit.
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115
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116 m64
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117 Target Report RejectNegative Mask(64BIT)
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118 Use 64-bit ABI.
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119
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120 m32
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121 Target Report RejectNegative InverseMask(64BIT)
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122 Use 32-bit ABI.
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123
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124 mstack-bias
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125 Target Report Mask(STACK_BIAS)
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126 Use stack bias.
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0
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127
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128 mfaster-structs
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129 Target Report Mask(FASTER_STRUCTS)
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130 Use structs on stronger alignment for double-word copies.
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131
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132 mrelax
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133 Target
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134 Optimize tail call instructions in assembler and linker.
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135
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136 muser-mode
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137 Target Report InverseMask(SV_MODE)
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138 Do not generate code that can only run in supervisor mode (default).
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0
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139
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140 mcpu=
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141 Target RejectNegative Joined Var(sparc_cpu_and_features) Enum(sparc_processor_type) Init(PROCESSOR_V7)
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142 Use features of and schedule code for given CPU.
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143
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144 mtune=
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145 Target RejectNegative Joined Var(sparc_cpu) Enum(sparc_processor_type) Init(PROCESSOR_V7)
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146 Schedule code for given CPU.
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147
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148 Enum
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149 Name(sparc_processor_type) Type(enum processor_type)
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150
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151 EnumValue
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152 Enum(sparc_processor_type) String(native) Value(PROCESSOR_NATIVE) DriverOnly
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153
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154 EnumValue
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155 Enum(sparc_processor_type) String(v7) Value(PROCESSOR_V7)
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156
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157 EnumValue
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158 Enum(sparc_processor_type) String(cypress) Value(PROCESSOR_CYPRESS)
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159
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160 EnumValue
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161 Enum(sparc_processor_type) String(v8) Value(PROCESSOR_V8)
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162
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163 EnumValue
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164 Enum(sparc_processor_type) String(supersparc) Value(PROCESSOR_SUPERSPARC)
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165
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166 EnumValue
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167 Enum(sparc_processor_type) String(hypersparc) Value(PROCESSOR_HYPERSPARC)
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168
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169 EnumValue
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170 Enum(sparc_processor_type) String(leon) Value(PROCESSOR_LEON)
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171
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172 EnumValue
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173 Enum(sparc_processor_type) String(leon3) Value(PROCESSOR_LEON3)
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174
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175 EnumValue
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176 Enum(sparc_processor_type) String(leon3v7) Value(PROCESSOR_LEON3V7)
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177
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178 EnumValue
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179 Enum(sparc_processor_type) String(sparclite) Value(PROCESSOR_SPARCLITE)
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180
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181 EnumValue
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182 Enum(sparc_processor_type) String(f930) Value(PROCESSOR_F930)
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183
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184 EnumValue
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185 Enum(sparc_processor_type) String(f934) Value(PROCESSOR_F934)
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186
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187 EnumValue
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188 Enum(sparc_processor_type) String(sparclite86x) Value(PROCESSOR_SPARCLITE86X)
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189
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190 EnumValue
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191 Enum(sparc_processor_type) String(sparclet) Value(PROCESSOR_SPARCLET)
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192
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193 EnumValue
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194 Enum(sparc_processor_type) String(tsc701) Value(PROCESSOR_TSC701)
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195
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196 EnumValue
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197 Enum(sparc_processor_type) String(v9) Value(PROCESSOR_V9)
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198
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199 EnumValue
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200 Enum(sparc_processor_type) String(ultrasparc) Value(PROCESSOR_ULTRASPARC)
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201
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202 EnumValue
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203 Enum(sparc_processor_type) String(ultrasparc3) Value(PROCESSOR_ULTRASPARC3)
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204
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205 EnumValue
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206 Enum(sparc_processor_type) String(niagara) Value(PROCESSOR_NIAGARA)
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207
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208 EnumValue
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209 Enum(sparc_processor_type) String(niagara2) Value(PROCESSOR_NIAGARA2)
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210
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211 EnumValue
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212 Enum(sparc_processor_type) String(niagara3) Value(PROCESSOR_NIAGARA3)
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213
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214 EnumValue
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215 Enum(sparc_processor_type) String(niagara4) Value(PROCESSOR_NIAGARA4)
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216
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217 EnumValue
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218 Enum(sparc_processor_type) String(niagara7) Value(PROCESSOR_NIAGARA7)
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219
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220 EnumValue
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221 Enum(sparc_processor_type) String(m8) Value(PROCESSOR_M8)
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0
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222
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223 mcmodel=
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224 Target RejectNegative Joined Var(sparc_cmodel_string)
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225 Use given SPARC-V9 code model.
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226
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227 mdebug=
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228 Target RejectNegative Joined Var(sparc_debug_string)
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229 Enable debug output.
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230
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231 mstd-struct-return
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232 Target Report Var(sparc_std_struct_return)
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233 Enable strict 32-bit psABI struct return checking.
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234
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235 mfix-at697f
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236 Target Report RejectNegative Var(sparc_fix_at697f)
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237 Enable workaround for single erratum of AT697F processor
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238 (corresponding to erratum #13 of AT697E processor).
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239
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240 mfix-ut699
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241 Target Report RejectNegative Var(sparc_fix_ut699)
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242 Enable workarounds for the errata of the UT699 processor.
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243
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244 mfix-ut700
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245 Target Report RejectNegative Var(sparc_fix_ut700)
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246 Enable workarounds for the errata of the UT699E/UT700 processor.
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247
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248 mfix-gr712rc
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249 Target Report RejectNegative Var(sparc_fix_gr712rc)
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250 Enable workarounds for the errata of the GR712RC processor.
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251
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252 ;; Enable workaround for back-to-back store errata
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253 TargetVariable
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254 unsigned int sparc_fix_b2bst
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255
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256 Mask(LONG_DOUBLE_128)
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257 ;; Use 128-bit long double
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258
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259 Mask(LEON)
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260 ;; Generate code for LEON
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261
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262 Mask(LEON3)
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263 ;; Generate code for LEON3
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264
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265 Mask(SPARCLITE)
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266 ;; Generate code for SPARClite
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267
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268 Mask(SPARCLET)
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269 ;; Generate code for SPARClet
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270
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271 Mask(V8)
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272 ;; Generate code for SPARC-V8
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273
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274 Mask(V9)
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275 ;; Generate code for SPARC-V9
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276
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277 Mask(DEPRECATED_V8_INSNS)
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278 ;; Generate code that uses the V8 instructions deprecated
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279 ;; in the V9 architecture.
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111
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280
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281 mmemory-model=
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282 Target RejectNegative Joined Var(sparc_memory_model) Enum(sparc_memory_model) Init(SMM_DEFAULT)
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283 Specify the memory model in effect for the program.
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284
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285 Enum
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286 Name(sparc_memory_model) Type(enum sparc_memory_model_type)
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287
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288 EnumValue
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289 Enum(sparc_memory_model) String(default) Value(SMM_DEFAULT)
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290
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291 EnumValue
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292 Enum(sparc_memory_model) String(rmo) Value(SMM_RMO)
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293
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294 EnumValue
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295 Enum(sparc_memory_model) String(pso) Value(SMM_PSO)
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296
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297 EnumValue
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298 Enum(sparc_memory_model) String(tso) Value(SMM_TSO)
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299
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300 EnumValue
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301 Enum(sparc_memory_model) String(sc) Value(SMM_SC)
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