Mercurial > hg > CbC > CbC_gcc

comparison gcc/config/nvptx/nvptx.md @ 145:1830386684a0

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
gcc-9.2.0
author anatofuz
date Thu, 13 Feb 2020 11:34:05 +0900
parents 84e7813d76e9
children
comparison
equal deleted inserted replaced
131:84e7813d76e9 145:1830386684a0
1 ;; Machine description for NVPTX. 1 ;; Machine description for NVPTX.
2 ;; Copyright (C) 2014-2018 Free Software Foundation, Inc. 2 ;; Copyright (C) 2014-2020 Free Software Foundation, Inc.
3 ;; Contributed by Bernd Schmidt <bernds@codesourcery.com> 3 ;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
4 ;; 4 ;;
5 ;; This file is part of GCC. 5 ;; This file is part of GCC.
6 ;; 6 ;;
7 ;; GCC is free software; you can redistribute it and/or modify 7 ;; GCC is free software; you can redistribute it and/or modify
66 66
67 UNSPECV_NOUNROLL 67 UNSPECV_NOUNROLL
68 68
69 UNSPECV_SIMT_ENTER 69 UNSPECV_SIMT_ENTER
70 UNSPECV_SIMT_EXIT 70 UNSPECV_SIMT_EXIT
71
72 UNSPECV_RED_PART
71 ]) 73 ])
72 74
73 (define_attr "subregs_ok" "false,true" 75 (define_attr "subregs_ok" "false,true"
74 (const_string "false")) 76 (const_string "false"))
75 77
741 "" 743 ""
742 "") 744 "")
743 745
744 ;; Calls 746 ;; Calls
745 747
746 (define_insn "call_insn" 748 (define_insn "call_insn_<mode>"
747 [(match_parallel 2 "call_operation" 749 [(match_parallel 2 "call_operation"
748 [(call (mem:QI (match_operand 0 "call_insn_operand" "Rs")) 750 [(call (mem:QI (match_operand:P 0 "call_insn_operand" "Rs"))
749 (match_operand 1))])] 751 (match_operand 1))])]
750 "" 752 ""
751 { 753 {
752 return nvptx_output_call_insn (insn, NULL_RTX, operands[0]); 754 return nvptx_output_call_insn (insn, NULL_RTX, operands[0]);
753 }) 755 })
754 756
755 (define_insn "call_value_insn" 757 (define_insn "call_value_insn_<mode>"
756 [(match_parallel 3 "call_operation" 758 [(match_parallel 3 "call_operation"
757 [(set (match_operand 0 "nvptx_register_operand" "=R") 759 [(set (match_operand 0 "nvptx_register_operand" "=R")
758 (call (mem:QI (match_operand 1 "call_insn_operand" "Rs")) 760 (call (mem:QI (match_operand:P 1 "call_insn_operand" "Rs"))
759 (match_operand 2)))])] 761 (match_operand 2)))])]
760 "" 762 ""
761 { 763 {
762 return nvptx_output_call_insn (insn, operands[0], operands[1]); 764 return nvptx_output_call_insn (insn, operands[0], operands[1]);
763 }) 765 })
1021 (define_expand "epilogue" 1023 (define_expand "epilogue"
1022 [(clobber (const_int 0))] 1024 [(clobber (const_int 0))]
1023 "" 1025 ""
1024 { 1026 {
1025 if (TARGET_SOFT_STACK) 1027 if (TARGET_SOFT_STACK)
1026 emit_insn (gen_set_softstack_insn (gen_rtx_REG (Pmode, 1028 emit_insn (gen_set_softstack (Pmode, gen_rtx_REG (Pmode,
1027 SOFTSTACK_PREV_REGNUM))); 1029 SOFTSTACK_PREV_REGNUM)));
1028 emit_jump_insn (gen_return ()); 1030 emit_jump_insn (gen_return ());
1029 DONE; 1031 DONE;
1030 }) 1032 })
1031 1033
1032 (define_expand "nonlocal_goto" 1034 (define_expand "nonlocal_goto"
1055 { 1057 {
1056 if (TARGET_SOFT_STACK) 1058 if (TARGET_SOFT_STACK)
1057 { 1059 {
1058 emit_move_insn (stack_pointer_rtx, 1060 emit_move_insn (stack_pointer_rtx,
1059 gen_rtx_MINUS (Pmode, stack_pointer_rtx, operands[1])); 1061 gen_rtx_MINUS (Pmode, stack_pointer_rtx, operands[1]));
1060 emit_insn (gen_set_softstack_insn (stack_pointer_rtx)); 1062 emit_insn (gen_set_softstack (Pmode, stack_pointer_rtx));
1061 emit_move_insn (operands[0], virtual_stack_dynamic_rtx); 1063 emit_move_insn (operands[0], virtual_stack_dynamic_rtx);
1062 DONE; 1064 DONE;
1063 } 1065 }
1064 /* The ptx documentation specifies an alloca intrinsic (for 32 bit 1066 /* The ptx documentation specifies an alloca intrinsic (for 32 bit
1065 only) but notes it is not implemented. The assembler emits a 1067 only) but notes it is not implemented. The assembler emits a
1067 sorry ("target cannot support alloca."); 1069 sorry ("target cannot support alloca.");
1068 emit_insn (gen_nop ()); 1070 emit_insn (gen_nop ());
1069 DONE; 1071 DONE;
1070 }) 1072 })
1071 1073
1072 (define_insn "set_softstack_insn" 1074 (define_insn "@set_softstack_<mode>"
1073 [(unspec [(match_operand 0 "nvptx_register_operand" "R")] 1075 [(unspec [(match_operand:P 0 "nvptx_register_operand" "R")]
1074 UNSPEC_SET_SOFTSTACK)] 1076 UNSPEC_SET_SOFTSTACK)]
1075 "TARGET_SOFT_STACK" 1077 "TARGET_SOFT_STACK"
1076 { 1078 {
1077 return nvptx_output_set_softstack (REGNO (operands[0])); 1079 return nvptx_output_set_softstack (REGNO (operands[0]));
1078 }) 1080 })
1083 "" 1085 ""
1084 { 1086 {
1085 if (TARGET_SOFT_STACK) 1087 if (TARGET_SOFT_STACK)
1086 { 1088 {
1087 emit_move_insn (operands[0], operands[1]); 1089 emit_move_insn (operands[0], operands[1]);
1088 emit_insn (gen_set_softstack_insn (operands[0])); 1090 emit_insn (gen_set_softstack (Pmode, operands[0]));
1089 } 1091 }
1090 DONE; 1092 DONE;
1091 }) 1093 })
1092 1094
1093 (define_expand "restore_stack_function" 1095 (define_expand "restore_stack_function"
1233 "" 1235 ""
1234 "%.\\tvote.ballot.b32\\t%0, %1;") 1236 "%.\\tvote.ballot.b32\\t%0, %1;")
1235 1237
1236 ;; Patterns for OpenMP SIMD-via-SIMT lowering 1238 ;; Patterns for OpenMP SIMD-via-SIMT lowering
1237 1239
1238 (define_insn "omp_simt_enter_insn" 1240 (define_insn "@omp_simt_enter_<mode>"
1239 [(set (match_operand 0 "nvptx_register_operand" "=R") 1241 [(set (match_operand:P 0 "nvptx_register_operand" "=R")
1240 (unspec_volatile [(match_operand 1 "nvptx_nonmemory_operand" "Ri") 1242 (unspec_volatile:P [(match_operand:P 1 "nvptx_nonmemory_operand" "Ri")
1241 (match_operand 2 "nvptx_nonmemory_operand" "Ri")] 1243 (match_operand:P 2 "nvptx_nonmemory_operand" "Ri")]
1242 UNSPECV_SIMT_ENTER))] 1244 UNSPECV_SIMT_ENTER))]
1243 "" 1245 ""
1244 { 1246 {
1245 return nvptx_output_simt_enter (operands[0], operands[1], operands[2]); 1247 return nvptx_output_simt_enter (operands[0], operands[1], operands[2]);
1246 }) 1248 })
1257 cfun->machine->simt_stack_size = MAX (UINTVAL (operands[1]), 1259 cfun->machine->simt_stack_size = MAX (UINTVAL (operands[1]),
1258 cfun->machine->simt_stack_size); 1260 cfun->machine->simt_stack_size);
1259 cfun->machine->simt_stack_align = MAX (UINTVAL (operands[2]), 1261 cfun->machine->simt_stack_align = MAX (UINTVAL (operands[2]),
1260 cfun->machine->simt_stack_align); 1262 cfun->machine->simt_stack_align);
1261 cfun->machine->has_simtreg = true; 1263 cfun->machine->has_simtreg = true;
1262 emit_insn (gen_omp_simt_enter_insn (operands[0], operands[1], operands[2])); 1264 emit_insn (gen_omp_simt_enter (Pmode, operands[0], operands[1], operands[2]));
1263 DONE; 1265 DONE;
1264 }) 1266 })
1265 1267
1266 (define_insn "omp_simt_exit" 1268 (define_expand "omp_simt_exit"
1267 [(unspec_volatile [(match_operand 0 "nvptx_register_operand" "R")] 1269 [(match_operand 0 "nvptx_register_operand" "R")]
1270 ""
1271 {
1272 emit_insn (gen_omp_simt_exit (Pmode, operands[0]));
1273 DONE;
1274 })
1275
1276 (define_insn "@omp_simt_exit_<mode>"
1277 [(unspec_volatile [(match_operand:P 0 "nvptx_register_operand" "R")]
1268 UNSPECV_SIMT_EXIT)] 1278 UNSPECV_SIMT_EXIT)]
1269 "" 1279 ""
1270 { 1280 {
1271 return nvptx_output_simt_exit (operands[0]); 1281 return nvptx_output_simt_exit (operands[0]);
1272 }) 1282 })
1452 "<MODE>mode == SImode || TARGET_SM35" 1462 "<MODE>mode == SImode || TARGET_SM35"
1453 "%.\\tatom%A1.b%T0.<logic>\\t%0, %1, %2;" 1463 "%.\\tatom%A1.b%T0.<logic>\\t%0, %1, %2;"
1454 [(set_attr "atomic" "true")]) 1464 [(set_attr "atomic" "true")])
1455 1465
1456 (define_insn "nvptx_barsync" 1466 (define_insn "nvptx_barsync"
1457 [(unspec_volatile [(match_operand:SI 0 "const_int_operand" "")] 1467 [(unspec_volatile [(match_operand:SI 0 "nvptx_nonmemory_operand" "Ri")
1468 (match_operand:SI 1 "const_int_operand")]
1458 UNSPECV_BARSYNC)] 1469 UNSPECV_BARSYNC)]
1459 "" 1470 ""
1460 "\\tbar.sync\\t%0;" 1471 {
1472 if (INTVAL (operands[1]) == 0)
1473 return "\\tbar.sync\\t%0;";
1474 else
1475 return "\\tbar.sync\\t%0, %1;";
1476 }
1461 [(set_attr "predicable" "false")]) 1477 [(set_attr "predicable" "false")])
1462 1478
1463 (define_expand "memory_barrier" 1479 (define_expand "memory_barrier"
1464 [(set (match_dup 0) 1480 [(set (match_dup 0)
1465 (unspec_volatile:BLK [(match_dup 0)] UNSPECV_MEMBAR))] 1481 (unspec_volatile:BLK [(match_dup 0)] UNSPECV_MEMBAR))]
1500 (define_insn "nvptx_nounroll" 1516 (define_insn "nvptx_nounroll"
1501 [(unspec_volatile [(const_int 0)] UNSPECV_NOUNROLL)] 1517 [(unspec_volatile [(const_int 0)] UNSPECV_NOUNROLL)]
1502 "" 1518 ""
1503 "\\t.pragma \\\"nounroll\\\";" 1519 "\\t.pragma \\\"nounroll\\\";"
1504 [(set_attr "predicable" "false")]) 1520 [(set_attr "predicable" "false")])
1521
1522 (define_insn "nvptx_red_partition"
1523 [(set (match_operand:DI 0 "nonimmediate_operand" "=R")
1524 (unspec_volatile:DI [(match_operand:DI 1 "const_int_operand")]
1525 UNSPECV_RED_PART))]
1526 ""
1527 {
1528 return nvptx_output_red_partition (operands[0], operands[1]);
1529 }
1530 [(set_attr "predicable" "false")])