diff gcc/config/nvptx/nvptx.md @ 145:1830386684a0

gcc-9.2.0
author anatofuz
date Thu, 13 Feb 2020 11:34:05 +0900
parents 84e7813d76e9
children
line wrap: on
line diff
--- a/gcc/config/nvptx/nvptx.md	Thu Oct 25 07:37:49 2018 +0900
+++ b/gcc/config/nvptx/nvptx.md	Thu Feb 13 11:34:05 2020 +0900
@@ -1,5 +1,5 @@
 ;; Machine description for NVPTX.
-;; Copyright (C) 2014-2018 Free Software Foundation, Inc.
+;; Copyright (C) 2014-2020 Free Software Foundation, Inc.
 ;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
 ;;
 ;; This file is part of GCC.
@@ -68,6 +68,8 @@
 
    UNSPECV_SIMT_ENTER
    UNSPECV_SIMT_EXIT
+
+   UNSPECV_RED_PART
 ])
 
 (define_attr "subregs_ok" "false,true"
@@ -743,19 +745,19 @@
 
 ;; Calls
 
-(define_insn "call_insn"
+(define_insn "call_insn_<mode>"
   [(match_parallel 2 "call_operation"
-    [(call (mem:QI (match_operand 0 "call_insn_operand" "Rs"))
+    [(call (mem:QI (match_operand:P 0 "call_insn_operand" "Rs"))
 	   (match_operand 1))])]
   ""
 {
   return nvptx_output_call_insn (insn, NULL_RTX, operands[0]);
 })
 
-(define_insn "call_value_insn"
+(define_insn "call_value_insn_<mode>"
   [(match_parallel 3 "call_operation"
     [(set (match_operand 0 "nvptx_register_operand" "=R")
-	  (call (mem:QI (match_operand 1 "call_insn_operand" "Rs"))
+	  (call (mem:QI (match_operand:P 1 "call_insn_operand" "Rs"))
 		(match_operand 2)))])]
   ""
 {
@@ -1023,8 +1025,8 @@
   ""
 {
   if (TARGET_SOFT_STACK)
-    emit_insn (gen_set_softstack_insn (gen_rtx_REG (Pmode,
-						    SOFTSTACK_PREV_REGNUM)));
+    emit_insn (gen_set_softstack (Pmode, gen_rtx_REG (Pmode,
+						      SOFTSTACK_PREV_REGNUM)));
   emit_jump_insn (gen_return ());
   DONE;
 })
@@ -1057,7 +1059,7 @@
     {
       emit_move_insn (stack_pointer_rtx,
 		      gen_rtx_MINUS (Pmode, stack_pointer_rtx, operands[1]));
-      emit_insn (gen_set_softstack_insn (stack_pointer_rtx));
+      emit_insn (gen_set_softstack (Pmode, stack_pointer_rtx));
       emit_move_insn (operands[0], virtual_stack_dynamic_rtx);
       DONE;
     }
@@ -1069,8 +1071,8 @@
   DONE;
 })
 
-(define_insn "set_softstack_insn"
-  [(unspec [(match_operand 0 "nvptx_register_operand" "R")]
+(define_insn "@set_softstack_<mode>"
+  [(unspec [(match_operand:P 0 "nvptx_register_operand" "R")]
 	   UNSPEC_SET_SOFTSTACK)]
   "TARGET_SOFT_STACK"
 {
@@ -1085,7 +1087,7 @@
   if (TARGET_SOFT_STACK)
     {
       emit_move_insn (operands[0], operands[1]);
-      emit_insn (gen_set_softstack_insn (operands[0]));
+      emit_insn (gen_set_softstack (Pmode, operands[0]));
     }
   DONE;
 })
@@ -1235,10 +1237,10 @@
 
 ;; Patterns for OpenMP SIMD-via-SIMT lowering
 
-(define_insn "omp_simt_enter_insn"
-  [(set (match_operand 0 "nvptx_register_operand" "=R")
-	(unspec_volatile [(match_operand 1 "nvptx_nonmemory_operand" "Ri")
-			    (match_operand 2 "nvptx_nonmemory_operand" "Ri")]
+(define_insn "@omp_simt_enter_<mode>"
+  [(set (match_operand:P 0 "nvptx_register_operand" "=R")
+	(unspec_volatile:P [(match_operand:P 1 "nvptx_nonmemory_operand" "Ri")
+			    (match_operand:P 2 "nvptx_nonmemory_operand" "Ri")]
 			   UNSPECV_SIMT_ENTER))]
   ""
 {
@@ -1259,12 +1261,20 @@
   cfun->machine->simt_stack_align = MAX (UINTVAL (operands[2]),
 					 cfun->machine->simt_stack_align);
   cfun->machine->has_simtreg = true;
-  emit_insn (gen_omp_simt_enter_insn (operands[0], operands[1], operands[2]));
+  emit_insn (gen_omp_simt_enter (Pmode, operands[0], operands[1], operands[2]));
   DONE;
 })
 
-(define_insn "omp_simt_exit"
-  [(unspec_volatile [(match_operand 0 "nvptx_register_operand" "R")]
+(define_expand "omp_simt_exit"
+  [(match_operand 0 "nvptx_register_operand" "R")]
+  ""
+{
+  emit_insn (gen_omp_simt_exit (Pmode, operands[0]));
+  DONE;
+})
+
+(define_insn "@omp_simt_exit_<mode>"
+  [(unspec_volatile [(match_operand:P 0 "nvptx_register_operand" "R")]
 		    UNSPECV_SIMT_EXIT)]
   ""
 {
@@ -1454,10 +1464,16 @@
   [(set_attr "atomic" "true")])
 
 (define_insn "nvptx_barsync"
-  [(unspec_volatile [(match_operand:SI 0 "const_int_operand" "")]
+  [(unspec_volatile [(match_operand:SI 0 "nvptx_nonmemory_operand" "Ri")
+		     (match_operand:SI 1 "const_int_operand")]
 		    UNSPECV_BARSYNC)]
   ""
-  "\\tbar.sync\\t%0;"
+  {
+    if (INTVAL (operands[1]) == 0)
+      return "\\tbar.sync\\t%0;";
+    else
+      return "\\tbar.sync\\t%0, %1;";
+  }
   [(set_attr "predicable" "false")])
 
 (define_expand "memory_barrier"
@@ -1502,3 +1518,13 @@
   ""
   "\\t.pragma \\\"nounroll\\\";"
   [(set_attr "predicable" "false")])
+
+(define_insn "nvptx_red_partition"
+  [(set (match_operand:DI 0 "nonimmediate_operand" "=R")
+	(unspec_volatile:DI [(match_operand:DI 1 "const_int_operand")]
+	 UNSPECV_RED_PART))]
+  ""
+  {
+    return nvptx_output_red_partition (operands[0], operands[1]);
+  }
+  [(set_attr "predicable" "false")])