Mercurial > hg > CbC > CbC_gcc
comparison gcc/lra-spills.c @ 145:1830386684a0
gcc-9.2.0
author | anatofuz |
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date | Thu, 13 Feb 2020 11:34:05 +0900 |
parents | 84e7813d76e9 |
children |
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131:84e7813d76e9 | 145:1830386684a0 |
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1 /* Change pseudos by memory. | 1 /* Change pseudos by memory. |
2 Copyright (C) 2010-2018 Free Software Foundation, Inc. | 2 Copyright (C) 2010-2020 Free Software Foundation, Inc. |
3 Contributed by Vladimir Makarov <vmakarov@redhat.com>. | 3 Contributed by Vladimir Makarov <vmakarov@redhat.com>. |
4 | 4 |
5 This file is part of GCC. | 5 This file is part of GCC. |
6 | 6 |
7 GCC is free software; you can redistribute it and/or modify it under | 7 GCC is free software; you can redistribute it and/or modify it under |
95 /* The stack slots for each spilled pseudo. Indexed by regnos. */ | 95 /* The stack slots for each spilled pseudo. Indexed by regnos. */ |
96 static struct pseudo_slot *pseudo_slots; | 96 static struct pseudo_slot *pseudo_slots; |
97 | 97 |
98 /* The structure describes a register or a stack slot which can be | 98 /* The structure describes a register or a stack slot which can be |
99 used for several spilled pseudos. */ | 99 used for several spilled pseudos. */ |
100 struct slot | 100 class slot |
101 { | 101 { |
102 public: | |
102 /* First pseudo with given stack slot. */ | 103 /* First pseudo with given stack slot. */ |
103 int regno; | 104 int regno; |
104 /* Hard reg into which the slot pseudos are spilled. The value is | 105 /* Hard reg into which the slot pseudos are spilled. The value is |
105 negative for pseudos spilled into memory. */ | 106 negative for pseudos spilled into memory. */ |
106 int hard_regno; | 107 int hard_regno; |
119 lra_live_range_t live_ranges; | 120 lra_live_range_t live_ranges; |
120 }; | 121 }; |
121 | 122 |
122 /* Array containing info about the stack slots. The array element is | 123 /* Array containing info about the stack slots. The array element is |
123 indexed by the stack slot number in the range [0..slots_num). */ | 124 indexed by the stack slot number in the range [0..slots_num). */ |
124 static struct slot *slots; | 125 static class slot *slots; |
125 /* The number of the stack slots currently existing. */ | 126 /* The number of the stack slots currently existing. */ |
126 static int slots_num; | 127 static int slots_num; |
127 | 128 |
128 /* Set up memory of the spilled pseudo I. The function can allocate | 129 /* Set up memory of the spilled pseudo I. The function can allocate |
129 the corresponding stack slot if it is not done yet. */ | 130 the corresponding stack slot if it is not done yet. */ |
230 rtx_insn *insn; | 231 rtx_insn *insn; |
231 rtx set; | 232 rtx set; |
232 basic_block bb; | 233 basic_block bb; |
233 HARD_REG_SET conflict_hard_regs; | 234 HARD_REG_SET conflict_hard_regs; |
234 bitmap setjump_crosses = regstat_get_setjmp_crosses (); | 235 bitmap setjump_crosses = regstat_get_setjmp_crosses (); |
235 /* Hard registers which can not be used for any purpose at given | 236 /* Hard registers which cannot be used for any purpose at given |
236 program point because they are unallocatable or already allocated | 237 program point because they are unallocatable or already allocated |
237 for other pseudos. */ | 238 for other pseudos. */ |
238 HARD_REG_SET *reserved_hard_regs; | 239 HARD_REG_SET *reserved_hard_regs; |
239 | 240 |
240 if (! lra_reg_spill_p) | 241 if (! lra_reg_spill_p) |
241 return n; | 242 return n; |
242 /* Set up reserved hard regs for every program point. */ | 243 /* Set up reserved hard regs for every program point. */ |
243 reserved_hard_regs = XNEWVEC (HARD_REG_SET, lra_live_max_point); | 244 reserved_hard_regs = XNEWVEC (HARD_REG_SET, lra_live_max_point); |
244 for (p = 0; p < lra_live_max_point; p++) | 245 for (p = 0; p < lra_live_max_point; p++) |
245 COPY_HARD_REG_SET (reserved_hard_regs[p], lra_no_alloc_regs); | 246 reserved_hard_regs[p] = lra_no_alloc_regs; |
246 for (i = FIRST_PSEUDO_REGISTER; i < regs_num; i++) | 247 for (i = FIRST_PSEUDO_REGISTER; i < regs_num; i++) |
247 if (lra_reg_info[i].nrefs != 0 | 248 if (lra_reg_info[i].nrefs != 0 |
248 && (hard_regno = lra_get_regno_hard_regno (i)) >= 0) | 249 && (hard_regno = lra_get_regno_hard_regno (i)) >= 0) |
249 for (r = lra_reg_info[i].live_ranges; r != NULL; r = r->next) | 250 for (r = lra_reg_info[i].live_ranges; r != NULL; r = r->next) |
250 for (p = r->start; p <= r->finish; p++) | 251 for (p = r->start; p <= r->finish; p++) |
271 { | 272 { |
272 pseudo_regnos[res++] = regno; | 273 pseudo_regnos[res++] = regno; |
273 continue; | 274 continue; |
274 } | 275 } |
275 lra_assert (spill_class != NO_REGS); | 276 lra_assert (spill_class != NO_REGS); |
276 COPY_HARD_REG_SET (conflict_hard_regs, | 277 conflict_hard_regs = lra_reg_info[regno].conflict_hard_regs; |
277 lra_reg_info[regno].conflict_hard_regs); | |
278 for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next) | 278 for (r = lra_reg_info[regno].live_ranges; r != NULL; r = r->next) |
279 for (p = r->start; p <= r->finish; p++) | 279 for (p = r->start; p <= r->finish; p++) |
280 IOR_HARD_REG_SET (conflict_hard_regs, reserved_hard_regs[p]); | 280 conflict_hard_regs |= reserved_hard_regs[p]; |
281 spill_class_size = ira_class_hard_regs_num[spill_class]; | 281 spill_class_size = ira_class_hard_regs_num[spill_class]; |
282 mode = lra_reg_info[regno].biggest_mode; | 282 mode = lra_reg_info[regno].biggest_mode; |
283 for (k = 0; k < spill_class_size; k++) | 283 for (k = 0; k < spill_class_size; k++) |
284 { | 284 { |
285 hard_regno = ira_class_hard_regs[spill_class][k]; | 285 hard_regno = ira_class_hard_regs[spill_class][k]; |
286 if (TEST_HARD_REG_BIT (eliminable_regset, hard_regno) | |
287 || !targetm.hard_regno_mode_ok (hard_regno, mode)) | |
288 continue; | |
286 if (! overlaps_hard_reg_set_p (conflict_hard_regs, mode, hard_regno)) | 289 if (! overlaps_hard_reg_set_p (conflict_hard_regs, mode, hard_regno)) |
287 break; | 290 break; |
288 } | 291 } |
289 if (k >= spill_class_size) | 292 if (k >= spill_class_size) |
290 { | 293 { |
546 bitmap_and_compl_into (df_get_live_out (bb), spilled_pseudos); | 549 bitmap_and_compl_into (df_get_live_out (bb), spilled_pseudos); |
547 } | 550 } |
548 } | 551 } |
549 } | 552 } |
550 | 553 |
554 /* Return true if we need scratch reg assignments. */ | |
555 bool | |
556 lra_need_for_scratch_reg_p (void) | |
557 { | |
558 int i; max_regno = max_reg_num (); | |
559 | |
560 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | |
561 if (lra_reg_info[i].nrefs != 0 && lra_get_regno_hard_regno (i) < 0 | |
562 && lra_former_scratch_p (i)) | |
563 return true; | |
564 return false; | |
565 } | |
566 | |
551 /* Return true if we need to change some pseudos into memory. */ | 567 /* Return true if we need to change some pseudos into memory. */ |
552 bool | 568 bool |
553 lra_need_for_spills_p (void) | 569 lra_need_for_spills_p (void) |
554 { | 570 { |
555 int i; max_regno = max_reg_num (); | 571 int i; max_regno = max_reg_num (); |
584 for (i = FIRST_PSEUDO_REGISTER; i < regs_num; i++) | 600 for (i = FIRST_PSEUDO_REGISTER; i < regs_num; i++) |
585 { | 601 { |
586 spill_hard_reg[i] = NULL_RTX; | 602 spill_hard_reg[i] = NULL_RTX; |
587 pseudo_slots[i].mem = NULL_RTX; | 603 pseudo_slots[i].mem = NULL_RTX; |
588 } | 604 } |
589 slots = XNEWVEC (struct slot, regs_num); | 605 slots = XNEWVEC (class slot, regs_num); |
590 /* Sort regnos according their usage frequencies. */ | 606 /* Sort regnos according their usage frequencies. */ |
591 qsort (pseudo_regnos, n, sizeof (int), regno_freq_compare); | 607 qsort (pseudo_regnos, n, sizeof (int), regno_freq_compare); |
592 n = assign_spill_hard_regs (pseudo_regnos, n); | 608 n = assign_spill_hard_regs (pseudo_regnos, n); |
593 assign_stack_slot_num_and_sort_pseudos (pseudo_regnos, n); | 609 assign_stack_slot_num_and_sort_pseudos (pseudo_regnos, n); |
594 for (i = 0; i < n; i++) | 610 for (i = 0; i < n; i++) |
738 lra_final_code_change (void) | 754 lra_final_code_change (void) |
739 { | 755 { |
740 int i, hard_regno; | 756 int i, hard_regno; |
741 basic_block bb; | 757 basic_block bb; |
742 rtx_insn *insn, *curr; | 758 rtx_insn *insn, *curr; |
759 rtx set; | |
743 int max_regno = max_reg_num (); | 760 int max_regno = max_reg_num (); |
744 | 761 |
745 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | 762 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) |
746 if (lra_reg_info[i].nrefs != 0 | 763 if (lra_reg_info[i].nrefs != 0 |
747 && (hard_regno = lra_get_regno_hard_regno (i)) >= 0) | 764 && (hard_regno = lra_get_regno_hard_regno (i)) >= 0) |
816 lra_update_dup (id, i); | 833 lra_update_dup (id, i); |
817 insn_change_p = true; | 834 insn_change_p = true; |
818 } | 835 } |
819 if (insn_change_p) | 836 if (insn_change_p) |
820 lra_update_operator_dups (id); | 837 lra_update_operator_dups (id); |
821 } | 838 |
822 } | 839 if ((set = single_set (insn)) != NULL |
840 && REG_P (SET_SRC (set)) && REG_P (SET_DEST (set)) | |
841 && REGNO (SET_SRC (set)) == REGNO (SET_DEST (set))) | |
842 { | |
843 /* Remove an useless move insn. IRA can generate move | |
844 insns involving pseudos. It is better remove them | |
845 earlier to speed up compiler a bit. It is also | |
846 better to do it here as they might not pass final RTL | |
847 check in LRA, (e.g. insn moving a control register | |
848 into itself). */ | |
849 lra_invalidate_insn_data (insn); | |
850 delete_insn (insn); | |
851 } | |
852 } | |
853 } |