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comparison gcc/config/sparc/linux-unwind.h @ 55:77e2b8dfacca gcc-4.4.5

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update it from 4.4.3 to 4.5.0
author ryoma <e075725@ie.u-ryukyu.ac.jp>
date Fri, 12 Feb 2010 23:39:51 +0900
parents a06113de4d67
children
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52:c156f1bd5cd9 55:77e2b8dfacca
20 You should have received a copy of the GNU General Public License and 20 You should have received a copy of the GNU General Public License and
21 a copy of the GCC Runtime Library Exception along with this program; 21 a copy of the GCC Runtime Library Exception along with this program;
22 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see 22 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
23 <http://www.gnu.org/licenses/>. */ 23 <http://www.gnu.org/licenses/>. */
24 24
25
26 /* Do code reading to identify a signal frame, and set the frame 25 /* Do code reading to identify a signal frame, and set the frame
27 state data appropriately. See unwind-dw2.c for the structs. */ 26 state data appropriately. See unwind-dw2.c for the structs. */
28 27
29 /* Handle multilib correctly. */
30 #if defined(__arch64__) 28 #if defined(__arch64__)
31 29
32 /* 64-bit SPARC version */ 30 /* 64-bit SPARC version */
33 #define MD_FALLBACK_FRAME_STATE_FOR sparc64_fallback_frame_state 31 #define MD_FALLBACK_FRAME_STATE_FOR sparc64_fallback_frame_state
34 32
35 static _Unwind_Reason_Code 33 static _Unwind_Reason_Code
36 sparc64_fallback_frame_state (struct _Unwind_Context *context, 34 sparc64_fallback_frame_state (struct _Unwind_Context *context,
37 _Unwind_FrameState *fs) 35 _Unwind_FrameState *fs)
38 { 36 {
39 unsigned int *pc = context->ra; 37 unsigned int *pc = context->ra;
40 long new_cfa, i; 38 long this_cfa = (long) context->cfa;
39 long new_cfa, ra_location, shifted_ra_location;
41 long regs_off, fpu_save_off; 40 long regs_off, fpu_save_off;
42 long this_cfa, fpu_save; 41 long fpu_save;
43 42 int i;
44 if (pc[0] != 0x82102065 /* mov NR_rt_sigreturn, %g1 */ 43
45 || pc[1] != 0x91d0206d) /* ta 0x6d */ 44 if (pc[0] != 0x82102065 /* mov NR_rt_sigreturn, %g1 */
45 || pc[1] != 0x91d0206d) /* ta 0x6d */
46 return _URC_END_OF_STACK; 46 return _URC_END_OF_STACK;
47
47 regs_off = 192 + 128; 48 regs_off = 192 + 128;
48 fpu_save_off = regs_off + (16 * 8) + (3 * 8) + (2 * 4); 49 fpu_save_off = regs_off + (16 * 8) + (3 * 8) + (2 * 4);
49 this_cfa = (long) context->cfa; 50
50 new_cfa = *(long *)((context->cfa) + (regs_off + (14 * 8))); 51 new_cfa = *(long *)(this_cfa + regs_off + (14 * 8));
51 new_cfa += 2047; /* Stack bias */ 52 new_cfa += 2047; /* Stack bias */
52 fpu_save = *(long *)((this_cfa) + (fpu_save_off)); 53 fpu_save = *(long *)(this_cfa + fpu_save_off);
53 fs->regs.cfa_how = CFA_REG_OFFSET; 54 fs->regs.cfa_how = CFA_REG_OFFSET;
54 fs->regs.cfa_reg = 14; 55 fs->regs.cfa_reg = __builtin_dwarf_sp_column ();
55 fs->regs.cfa_offset = new_cfa - (long) context->cfa; 56 fs->regs.cfa_offset = new_cfa - this_cfa;
56 for (i = 1; i < 16; ++i) 57
57 { 58 for (i = 1; i < 16; i++)
59 {
60 /* We never restore %sp as everything is purely CFA-based. */
61 if ((unsigned int) i == __builtin_dwarf_sp_column ())
62 continue;
63
58 fs->regs.reg[i].how = REG_SAVED_OFFSET; 64 fs->regs.reg[i].how = REG_SAVED_OFFSET;
59 fs->regs.reg[i].loc.offset = 65 fs->regs.reg[i].loc.offset
60 this_cfa + (regs_off + (i * 8)) - new_cfa; 66 = this_cfa + regs_off + (i * 8) - new_cfa;
61 } 67 }
62 for (i = 0; i < 16; ++i) 68 for (i = 0; i < 16; i++)
63 { 69 {
64 fs->regs.reg[i + 16].how = REG_SAVED_OFFSET; 70 fs->regs.reg[i + 16].how = REG_SAVED_OFFSET;
65 fs->regs.reg[i + 16].loc.offset = 71 fs->regs.reg[i + 16].loc.offset
66 this_cfa + (i * 8) - new_cfa; 72 = this_cfa + (i * 8) - new_cfa;
67 } 73 }
68 if (fpu_save) 74 if (fpu_save)
69 { 75 {
70 for (i = 0; i < 64; ++i) 76 for (i = 0; i < 64; i++)
71 { 77 {
72 if (i > 32 && (i & 0x1)) 78 if (i > 32 && (i & 0x1))
73 continue; 79 continue;
74 fs->regs.reg[i + 32].how = REG_SAVED_OFFSET; 80 fs->regs.reg[i + 32].how = REG_SAVED_OFFSET;
75 fs->regs.reg[i + 32].loc.offset = 81 fs->regs.reg[i + 32].loc.offset
76 (fpu_save + (i * 4)) - new_cfa; 82 = fpu_save + (i * 4) - new_cfa;
77 } 83 }
78 } 84 }
79 /* Stick return address into %g0, same trick Alpha uses. */ 85
86 /* State the rules to find the kernel's code "return address", which is
87 the address of the active instruction when the signal was caught.
88 On the SPARC, since RETURN_ADDR_OFFSET (essentially 8) is defined, we
89 need to preventively subtract it from the purported return address. */
90 ra_location = this_cfa + regs_off + 17 * 8;
91 shifted_ra_location = this_cfa + regs_off + 19 * 8; /* Y register */
92 *(long *)shifted_ra_location = *(long *)ra_location - 8;
93 fs->retaddr_column = 0;
80 fs->regs.reg[0].how = REG_SAVED_OFFSET; 94 fs->regs.reg[0].how = REG_SAVED_OFFSET;
81 fs->regs.reg[0].loc.offset = 95 fs->regs.reg[0].loc.offset = shifted_ra_location - new_cfa;
82 this_cfa + (regs_off + (16 * 8) + 8) - new_cfa; 96 fs->signal_frame = 1;
83 fs->retaddr_column = 0; 97
84 return _URC_NO_REASON; 98 return _URC_NO_REASON;
99 }
100
101 #define MD_FROB_UPDATE_CONTEXT sparc64_frob_update_context
102
103 static void
104 sparc64_frob_update_context (struct _Unwind_Context *context,
105 _Unwind_FrameState *fs)
106 {
107 /* The column of %sp contains the old CFA, not the old value of %sp.
108 The CFA offset already comprises the stack bias so, when %sp is the
109 CFA register, we must avoid counting the stack bias twice. Do not
110 do that for signal frames as the offset is artificial for them. */
111 if (fs->regs.cfa_reg == __builtin_dwarf_sp_column ()
112 && fs->regs.cfa_how == CFA_REG_OFFSET
113 && fs->regs.cfa_offset != 0
114 && !fs->signal_frame)
115 context->cfa -= 2047;
85 } 116 }
86 117
87 #else 118 #else
88 119
89 /* 32-bit SPARC version */ 120 /* 32-bit SPARC version */
92 static _Unwind_Reason_Code 123 static _Unwind_Reason_Code
93 sparc_fallback_frame_state (struct _Unwind_Context *context, 124 sparc_fallback_frame_state (struct _Unwind_Context *context,
94 _Unwind_FrameState *fs) 125 _Unwind_FrameState *fs)
95 { 126 {
96 unsigned int *pc = context->ra; 127 unsigned int *pc = context->ra;
97 int new_cfa, i, oldstyle; 128 int this_cfa = (int) context->cfa;
129 int new_cfa, ra_location, shifted_ra_location;
98 int regs_off, fpu_save_off; 130 int regs_off, fpu_save_off;
99 int fpu_save, this_cfa; 131 int fpu_save;
100 132 int old_style, i;
101 if (pc[1] != 0x91d02010) /* ta 0x10 */ 133
134 if (pc[1] != 0x91d02010) /* ta 0x10 */
102 return _URC_END_OF_STACK; 135 return _URC_END_OF_STACK;
103 if (pc[0] == 0x821020d8) /* mov NR_sigreturn, %g1 */ 136
104 oldstyle = 1; 137 if (pc[0] == 0x821020d8) /* mov NR_sigreturn, %g1 */
138 old_style = 1;
105 else if (pc[0] == 0x82102065) /* mov NR_rt_sigreturn, %g1 */ 139 else if (pc[0] == 0x82102065) /* mov NR_rt_sigreturn, %g1 */
106 oldstyle = 0; 140 old_style = 0;
107 else 141 else
108 return _URC_END_OF_STACK; 142 return _URC_END_OF_STACK;
109 if (oldstyle) 143
144 if (old_style)
110 { 145 {
111 regs_off = 96; 146 regs_off = 96;
112 fpu_save_off = regs_off + (4 * 4) + (16 * 4); 147 fpu_save_off = regs_off + (4 * 4) + (16 * 4);
113 } 148 }
114 else 149 else
115 { 150 {
116 regs_off = 96 + 128; 151 regs_off = 96 + 128;
117 fpu_save_off = regs_off + (4 * 4) + (16 * 4) + (2 * 4); 152 fpu_save_off = regs_off + (4 * 4) + (16 * 4) + (2 * 4);
118 } 153 }
119 this_cfa = (int) context->cfa; 154
120 new_cfa = *(int *)((context->cfa) + (regs_off+(4*4)+(14 * 4))); 155 new_cfa = *(int *)(this_cfa + regs_off + (4 * 4) + (14 * 4));
121 fpu_save = *(int *)((this_cfa) + (fpu_save_off)); 156 fpu_save = *(int *)(this_cfa + fpu_save_off);
122 fs->regs.cfa_how = CFA_REG_OFFSET; 157 fs->regs.cfa_how = CFA_REG_OFFSET;
123 fs->regs.cfa_reg = 14; 158 fs->regs.cfa_reg = __builtin_dwarf_sp_column ();
124 fs->regs.cfa_offset = new_cfa - (int) context->cfa; 159 fs->regs.cfa_offset = new_cfa - this_cfa;
125 for (i = 1; i < 16; ++i) 160
126 { 161 for (i = 1; i < 16; i++)
127 if (i == 14) 162 {
163 /* We never restore %sp as everything is purely CFA-based. */
164 if ((unsigned int) i == __builtin_dwarf_sp_column ())
128 continue; 165 continue;
166
129 fs->regs.reg[i].how = REG_SAVED_OFFSET; 167 fs->regs.reg[i].how = REG_SAVED_OFFSET;
130 fs->regs.reg[i].loc.offset = 168 fs->regs.reg[i].loc.offset
131 this_cfa + (regs_off+(4 * 4)+(i * 4)) - new_cfa; 169 = this_cfa + regs_off + (4 * 4) + (i * 4) - new_cfa;
132 } 170 }
133 for (i = 0; i < 16; ++i) 171 for (i = 0; i < 16; i++)
134 { 172 {
135 fs->regs.reg[i + 16].how = REG_SAVED_OFFSET; 173 fs->regs.reg[i + 16].how = REG_SAVED_OFFSET;
136 fs->regs.reg[i + 16].loc.offset = 174 fs->regs.reg[i + 16].loc.offset
137 this_cfa + (i * 4) - new_cfa; 175 = this_cfa + (i * 4) - new_cfa;
138 } 176 }
139 if (fpu_save) 177 if (fpu_save)
140 { 178 {
141 for (i = 0; i < 32; ++i) 179 for (i = 0; i < 32; i++)
142 { 180 {
143 fs->regs.reg[i + 32].how = REG_SAVED_OFFSET; 181 fs->regs.reg[i + 32].how = REG_SAVED_OFFSET;
144 fs->regs.reg[i + 32].loc.offset = 182 fs->regs.reg[i + 32].loc.offset
145 (fpu_save + (i * 4)) - new_cfa; 183 = fpu_save + (i * 4) - new_cfa;
146 } 184 }
147 } 185 }
148 /* Stick return address into %g0, same trick Alpha uses. */ 186
187 /* State the rules to find the kernel's code "return address", which is
188 the address of the active instruction when the signal was caught.
189 On the SPARC, since RETURN_ADDR_OFFSET (essentially 8) is defined, we
190 need to preventively subtract it from the purported return address. */
191 ra_location = this_cfa + regs_off + 4;
192 shifted_ra_location = this_cfa + regs_off + 3 * 4; /* Y register */
193 *(int *)shifted_ra_location = *(int *)ra_location - 8;
194 fs->retaddr_column = 0;
149 fs->regs.reg[0].how = REG_SAVED_OFFSET; 195 fs->regs.reg[0].how = REG_SAVED_OFFSET;
150 fs->regs.reg[0].loc.offset = this_cfa+(regs_off+4)-new_cfa; 196 fs->regs.reg[0].loc.offset = shifted_ra_location - new_cfa;
151 fs->retaddr_column = 0; 197 fs->signal_frame = 1;
198
152 return _URC_NO_REASON; 199 return _URC_NO_REASON;
153 } 200 }
154 201
155 #endif 202 #endif