Mercurial > hg > CbC > CbC_gcc

annotate gcc/config/sparc/linux-unwind.h @ 55:77e2b8dfacca gcc-4.4.5

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update it from 4.4.3 to 4.5.0
author ryoma <e075725@ie.u-ryukyu.ac.jp>
date Fri, 12 Feb 2010 23:39:51 +0900
parents a06113de4d67
children
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1 /* DWARF2 EH unwinding support for SPARC Linux.
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2 Copyright 2004, 2005, 2009 Free Software Foundation, Inc.
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3
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4 This file is part of GCC.
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5
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6 GCC is free software; you can redistribute it and/or modify
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7 it under the terms of the GNU General Public License as published by
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8 the Free Software Foundation; either version 3, or (at your option)
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9 any later version.
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10
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11 GCC is distributed in the hope that it will be useful,
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12 but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 GNU General Public License for more details.
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15
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16 Under Section 7 of GPL version 3, you are granted additional
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17 permissions described in the GCC Runtime Library Exception, version
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18 3.1, as published by the Free Software Foundation.
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19
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20 You should have received a copy of the GNU General Public License and
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21 a copy of the GCC Runtime Library Exception along with this program;
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22 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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23 <http://www.gnu.org/licenses/>. */
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24
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25 /* Do code reading to identify a signal frame, and set the frame
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26 state data appropriately. See unwind-dw2.c for the structs. */
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27
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28 #if defined(__arch64__)
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29
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30 /* 64-bit SPARC version */
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31 #define MD_FALLBACK_FRAME_STATE_FOR sparc64_fallback_frame_state
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32
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33 static _Unwind_Reason_Code
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34 sparc64_fallback_frame_state (struct _Unwind_Context *context,
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35 _Unwind_FrameState *fs)
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36 {
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37 unsigned int *pc = context->ra;
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38 long this_cfa = (long) context->cfa;
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39 long new_cfa, ra_location, shifted_ra_location;
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40 long regs_off, fpu_save_off;
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41 long fpu_save;
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42 int i;
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43
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44 if (pc[0] != 0x82102065 /* mov NR_rt_sigreturn, %g1 */
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45 || pc[1] != 0x91d0206d) /* ta 0x6d */
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46 return _URC_END_OF_STACK;
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47
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48 regs_off = 192 + 128;
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49 fpu_save_off = regs_off + (16 * 8) + (3 * 8) + (2 * 4);
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50
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51 new_cfa = *(long *)(this_cfa + regs_off + (14 * 8));
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52 new_cfa += 2047; /* Stack bias */
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53 fpu_save = *(long *)(this_cfa + fpu_save_off);
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54 fs->regs.cfa_how = CFA_REG_OFFSET;
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55 fs->regs.cfa_reg = __builtin_dwarf_sp_column ();
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56 fs->regs.cfa_offset = new_cfa - this_cfa;
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57
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58 for (i = 1; i < 16; i++)
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59 {
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60 /* We never restore %sp as everything is purely CFA-based. */
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61 if ((unsigned int) i == __builtin_dwarf_sp_column ())
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62 continue;
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63
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64 fs->regs.reg[i].how = REG_SAVED_OFFSET;
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65 fs->regs.reg[i].loc.offset
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66 = this_cfa + regs_off + (i * 8) - new_cfa;
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67 }
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68 for (i = 0; i < 16; i++)
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69 {
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70 fs->regs.reg[i + 16].how = REG_SAVED_OFFSET;
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71 fs->regs.reg[i + 16].loc.offset
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72 = this_cfa + (i * 8) - new_cfa;
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73 }
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74 if (fpu_save)
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75 {
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76 for (i = 0; i < 64; i++)
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77 {
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78 if (i > 32 && (i & 0x1))
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79 continue;
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80 fs->regs.reg[i + 32].how = REG_SAVED_OFFSET;
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81 fs->regs.reg[i + 32].loc.offset
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82 = fpu_save + (i * 4) - new_cfa;
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83 }
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84 }
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85
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86 /* State the rules to find the kernel's code "return address", which is
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87 the address of the active instruction when the signal was caught.
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88 On the SPARC, since RETURN_ADDR_OFFSET (essentially 8) is defined, we
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89 need to preventively subtract it from the purported return address. */
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90 ra_location = this_cfa + regs_off + 17 * 8;
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91 shifted_ra_location = this_cfa + regs_off + 19 * 8; /* Y register */
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92 *(long *)shifted_ra_location = *(long *)ra_location - 8;
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93 fs->retaddr_column = 0;
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94 fs->regs.reg[0].how = REG_SAVED_OFFSET;
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95 fs->regs.reg[0].loc.offset = shifted_ra_location - new_cfa;
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96 fs->signal_frame = 1;
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97
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98 return _URC_NO_REASON;
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99 }
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100
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101 #define MD_FROB_UPDATE_CONTEXT sparc64_frob_update_context
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102
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103 static void
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104 sparc64_frob_update_context (struct _Unwind_Context *context,
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105 _Unwind_FrameState *fs)
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106 {
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107 /* The column of %sp contains the old CFA, not the old value of %sp.
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108 The CFA offset already comprises the stack bias so, when %sp is the
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109 CFA register, we must avoid counting the stack bias twice. Do not
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110 do that for signal frames as the offset is artificial for them. */
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111 if (fs->regs.cfa_reg == __builtin_dwarf_sp_column ()
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112 && fs->regs.cfa_how == CFA_REG_OFFSET
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113 && fs->regs.cfa_offset != 0
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114 && !fs->signal_frame)
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115 context->cfa -= 2047;
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116 }
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117
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118 #else
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119
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120 /* 32-bit SPARC version */
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121 #define MD_FALLBACK_FRAME_STATE_FOR sparc_fallback_frame_state
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122
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123 static _Unwind_Reason_Code
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124 sparc_fallback_frame_state (struct _Unwind_Context *context,
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125 _Unwind_FrameState *fs)
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126 {
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127 unsigned int *pc = context->ra;
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128 int this_cfa = (int) context->cfa;
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129 int new_cfa, ra_location, shifted_ra_location;
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130 int regs_off, fpu_save_off;
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131 int fpu_save;
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132 int old_style, i;
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133
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134 if (pc[1] != 0x91d02010) /* ta 0x10 */
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135 return _URC_END_OF_STACK;
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136
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137 if (pc[0] == 0x821020d8) /* mov NR_sigreturn, %g1 */
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138 old_style = 1;
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139 else if (pc[0] == 0x82102065) /* mov NR_rt_sigreturn, %g1 */
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140 old_style = 0;
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141 else
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142 return _URC_END_OF_STACK;
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143
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144 if (old_style)
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145 {
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146 regs_off = 96;
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147 fpu_save_off = regs_off + (4 * 4) + (16 * 4);
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148 }
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149 else
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150 {
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151 regs_off = 96 + 128;
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152 fpu_save_off = regs_off + (4 * 4) + (16 * 4) + (2 * 4);
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153 }
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154
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155 new_cfa = *(int *)(this_cfa + regs_off + (4 * 4) + (14 * 4));
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156 fpu_save = *(int *)(this_cfa + fpu_save_off);
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157 fs->regs.cfa_how = CFA_REG_OFFSET;
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158 fs->regs.cfa_reg = __builtin_dwarf_sp_column ();
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159 fs->regs.cfa_offset = new_cfa - this_cfa;
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160
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161 for (i = 1; i < 16; i++)
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162 {
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163 /* We never restore %sp as everything is purely CFA-based. */
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164 if ((unsigned int) i == __builtin_dwarf_sp_column ())
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165 continue;
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166
0
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167 fs->regs.reg[i].how = REG_SAVED_OFFSET;
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168 fs->regs.reg[i].loc.offset
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169 = this_cfa + regs_off + (4 * 4) + (i * 4) - new_cfa;
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170 }
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171 for (i = 0; i < 16; i++)
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172 {
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173 fs->regs.reg[i + 16].how = REG_SAVED_OFFSET;
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174 fs->regs.reg[i + 16].loc.offset
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175 = this_cfa + (i * 4) - new_cfa;
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176 }
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177 if (fpu_save)
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178 {
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179 for (i = 0; i < 32; i++)
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180 {
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181 fs->regs.reg[i + 32].how = REG_SAVED_OFFSET;
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182 fs->regs.reg[i + 32].loc.offset
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183 = fpu_save + (i * 4) - new_cfa;
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184 }
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185 }
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186
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187 /* State the rules to find the kernel's code "return address", which is
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188 the address of the active instruction when the signal was caught.
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189 On the SPARC, since RETURN_ADDR_OFFSET (essentially 8) is defined, we
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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190 need to preventively subtract it from the purported return address. */
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191 ra_location = this_cfa + regs_off + 4;
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192 shifted_ra_location = this_cfa + regs_off + 3 * 4; /* Y register */
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193 *(int *)shifted_ra_location = *(int *)ra_location - 8;
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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194 fs->retaddr_column = 0;
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195 fs->regs.reg[0].how = REG_SAVED_OFFSET;
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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196 fs->regs.reg[0].loc.offset = shifted_ra_location - new_cfa;
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197 fs->signal_frame = 1;
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198
0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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199 return _URC_NO_REASON;
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200 }
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201
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202 #endif