CbC/CbC_gcc: gcc/rtl.def comparison

comparison gcc/rtl.def @ 55:77e2b8dfacca gcc-4.4.5

update it from 4.4.3 to 4.5.0

author	ryoma <e075725@ie.u-ryukyu.ac.jp>
date	Fri, 12 Feb 2010 23:39:51 +0900
parents	a06113de4d67
children	b7f97abdc517

comparison

equal deleted inserted replaced

-:c156f1bd5cd9
+:77e2b8dfacca
 /* This file contains the definitions and documentation for the
 Register Transfer Expressions (rtx's) that make up the
 Register Transfer Language (rtl) used in the Back End of the GNU compiler.
 Copyright (C) 1987, 1988, 1992, 1994, 1995, 1997, 1998, 1999, 2000, 2004,
-2005, 2006, 2007, 2008
+2005, 2006, 2007, 2008, 2009
 Free Software Foundation, Inc.
 This file is part of GCC.
 GCC is free software; you can redistribute it and/or modify it under
 By convention these are the internal (field 1) names in lower_case.
 3.  The print format, and type of each rtx->u.fld[] (field) in this rtx.
 These formats are stored in rtx_format[].
 The meaning of the formats is documented in front of this array in rtl.c
 4.  The class of the rtx.  These are stored in rtx_class and are accessed
 via the GET_RTX_CLASS macro.  They are defined as follows:
 RTX_CONST_OBJ
 an rtx code that can be used to represent a constant object
 /* Unknown, or no such operation; the enumeration constant should have
 value zero.  */
 DEF_RTL_EXPR(UNKNOWN, "UnKnown", "*", RTX_EXTRA)
+/* Used in the cselib routines to describe a value.  Objects of this
+kind are only allocated in cselib.c, in an alloc pool instead of in
+GC memory.  The only operand of a VALUE is a cselib_val_struct.
+var-tracking requires this to have a distinct integral value from
+DECL codes in trees.  */
+DEF_RTL_EXPR(VALUE, "value", "0", RTX_OBJ)
+/* The RTL generated for a DEBUG_EXPR_DECL.  It links back to the
+DEBUG_EXPR_DECL in the first operand.  */
+DEF_RTL_EXPR(DEBUG_EXPR, "debug_expr", "0", RTX_OBJ)
 /* ---------------------------------------------------------------------
 Expressions used in constructing lists.
 --------------------------------------------------------------------- */
 /* a linked list of expressions */
 Each insn expression holds an rtl instruction and its semantics
 during back-end processing.
 See macros's in "rtl.h" for the meaning of each rtx->u.fld[].
 ---------------------------------------------------------------------- */
+/* An annotation for variable assignment tracking.  */
+DEF_RTL_EXPR(DEBUG_INSN, "debug_insn", "iuuBieie", RTX_INSN)
 /* An instruction that cannot jump.  */
 DEF_RTL_EXPR(INSN, "insn", "iuuBieie", RTX_INSN)
 /* An instruction that can possibly jump.
 DEF_RTL_EXPR(NOTE, "note", "iuuB0ni", RTX_EXTRA)
 /* ----------------------------------------------------------------------
 Top level constituents of INSN, JUMP_INSN and CALL_INSN.
 ---------------------------------------------------------------------- */
 /* Conditionally execute code.
 Operand 0 is the condition that if true, the code is executed.
 Operand 1 is the code to be executed (typically a SET).
 Semantics are that there are no side effects if the condition
 is false.  This pattern is created automatically by the if_convert
 pass run after reload or by target-specific splitters.  */
 DEF_RTL_EXPR(COND_EXEC, "cond_exec", "ee", RTX_EXTRA)
 is made for each output; this integer distinguishes them.
 4th is a vector of values of input operands.
 5th is a vector of modes and constraints for the input operands.
 Each element is an ASM_INPUT containing a constraint string
 and whose mode indicates the mode of the input operand.
-6th is the source line number.  */
+6th is a vector of labels that may be branched to by the asm.
-DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEi", RTX_EXTRA)
+7th is the source line number.  */
+DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEEi", RTX_EXTRA)
 /* A machine-specific operation.
 1st operand is a vector of operands being used by the operation so that
 any needed reloads can be done.
 2nd operand is a unique value saying which of a number of machine-specific
 operations is to be performed.
 (Note that the vector must be the first operand because of the way that
 genrecog.c record positions within an insn.)
 UNSPEC can occur all by itself in a PATTERN, as a component of a PARALLEL,
 or inside an expression.
 UNSPEC by itself or as a component of a PARALLEL
 is currently considered not deletable.
 FIXME: Replace all uses of UNSPEC that appears by itself or as a component
 of a PARALLEL with USE.
 scale: scaling that is necessary to make offsets fit into the mode.
 The third, fourth and fifth operands are only valid when
 CASE_VECTOR_SHORTEN_MODE is defined, and only in an optimizing
 compilations.  */
 DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eEee0", RTX_EXTRA)
 /* Memory prefetch, with attributes supported on some targets.
 Operand 1 is the address of the memory to fetch.
 Operand 2 is 1 for a write access, 0 otherwise.
 under PARALLEL.  */
 DEF_RTL_EXPR(SET, "set", "ee", RTX_EXTRA)
 /* Indicate something is used in a way that we don't want to explain.
 For example, subroutine calls will use the register
 in which the static chain is passed.
 USE can not appear as an operand of other rtx except for PARALLEL.
 USE is not deletable, as it indicates that the operand
 is used in some unknown way.  */
 DEF_RTL_EXPR(USE, "use", "e", RTX_EXTRA)
 /* Indicate something is clobbered in a way that we don't want to explain.
 For example, subroutine calls will clobber some physical registers
 (the ones that are by convention not saved).
 CLOBBER can not appear as an operand of other rtx except for PARALLEL.
 CLOBBER of a hard register appearing by itself (not within PARALLEL)
 is considered undeletable before reload.  */
 DEF_RTL_EXPR(CLOBBER, "clobber", "e", RTX_EXTRA)
 DEF_RTL_EXPR(CALL, "call", "ee", RTX_EXTRA)
 /* Return from a subroutine.  */
 DEF_RTL_EXPR(RETURN, "return", "", RTX_EXTRA)
+/* Special for EH return from subroutine.  */
+DEF_RTL_EXPR(EH_RETURN, "eh_return", "", RTX_EXTRA)
 /* Conditional trap.
 Operand 1 is the condition.
 Operand 2 is the trap code.
 For an unconditional trap, make the condition (const_int 1).  */
 DEF_RTL_EXPR(TRAP_IF, "trap_if", "ee", RTX_EXTRA)
-/* Placeholder for _Unwind_Resume before we know if a function call
-or a branch is needed.  Operand 1 is the exception region from
-which control is flowing.  */
-DEF_RTL_EXPR(RESX, "resx", "i", RTX_EXTRA)
 /* ----------------------------------------------------------------------
 Primitive values for use in expressions.
 ---------------------------------------------------------------------- */
 /* numeric integer constant */
 DEF_RTL_EXPR(CONST, "const", "e", RTX_CONST_OBJ)
 /* program counter.  Ordinary jumps are represented
 by a SET whose first operand is (PC).  */
 DEF_RTL_EXPR(PC, "pc", "", RTX_OBJ)
-/* Used in the cselib routines to describe a value.  Objects of this
-kind are only allocated in cselib.c, in an alloc pool instead of
-in GC memory.  The only operand of a VALUE is a cselib_val_struct.  */
-DEF_RTL_EXPR(VALUE, "value", "0", RTX_OBJ)
 /* A register.  The "operand" is the register number, accessed with
 the REGNO macro.  If this number is less than FIRST_PSEUDO_REGISTER
 than a hardware register is being referred to.  The second operand
 holds the original register number - this will be different for a
 /* Reference to an assembler label in the code for this function.
 The operand is a CODE_LABEL found in the insn chain.  */
 DEF_RTL_EXPR(LABEL_REF, "label_ref", "u", RTX_CONST_OBJ)
 /* Reference to a named label:
 Operand 0: label name
 Operand 1: flags (see SYMBOL_FLAG_* in rtl.h)
 Operand 2: tree from which this symbol is derived, or null.
 This is either a DECL node, or some kind of constant.  */
 DEF_RTL_EXPR(SYMBOL_REF, "symbol_ref", "s00", RTX_CONST_OBJ)
 /* Describes an operation that converts a small vector into a larger one by
 duplicating the input values.  The output vector mode must have the same
 submodes as the input vector mode, and the number of output parts must be
 an integer multiple of the number of input parts.  */
 DEF_RTL_EXPR(VEC_DUPLICATE, "vec_duplicate", "e", RTX_UNARY)
 /* Addition with signed saturation */
 DEF_RTL_EXPR(SS_PLUS, "ss_plus", "ee", RTX_COMM_ARITH)
 /* Addition with unsigned saturation */
 DEF_RTL_EXPR(US_PLUS, "us_plus", "ee", RTX_COMM_ARITH)
 /* Match a PARALLEL of arbitrary length.  The predicate is applied
 to the PARALLEL and the initial expressions in the PARALLEL are matched.
 Operand 0 is the operand-number, as in match_operand.
 Operand 1 is a predicate to apply to the PARALLEL.
 Operand 2 is a vector of expressions, each of which must match the
 corresponding element in the PARALLEL.  */
 DEF_RTL_EXPR(MATCH_PARALLEL, "match_parallel", "isE", RTX_MATCH)
 /* Match only something equal to what is stored in the operand table
 at the index specified by the argument.  Use with MATCH_OPERAND.  */
 3: is the action to execute if this pattern is matched.
 If this assembler code template starts with a * then it is a fragment of
 C code to run to decide on a template to use.  Otherwise, it is the
 template to use.
 4: C expression that must be true for split.  This may start with "&&"
 in which case the split condition is the logical and of the insn
 condition and what follows the "&&" of this operand.
 5: vector of insn patterns to place into a SEQUENCE
 6: optionally, some C code to execute before generating the
 	insns.  This might, for example, create some RTX's and store them in
 	elements of `recog_data.operand' for use by the vector of
 	insn-patterns.
 	(`operands' is an alias here for `recog_data.operand').
 7: optionally, a vector of attributes for this insn.  */
 DEF_RTL_EXPR(DEFINE_INSN_AND_SPLIT, "define_insn_and_split", "sEsTsESV", RTX_EXTRA)
 /* Definition of an RTL peephole operation.
 Follows the same arguments as define_split.  */
 	This might, for example, create some RTX's and store them in
 	elements of `recog_data.operand' for use by the vector of
 	insn-patterns.
 	(`operands' is an alias here for `recog_data.operand').  */
 DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEss", RTX_EXTRA)
 /* Define a requirement for delay slots.
 1st operand: Condition involving insn attributes that, if true,
 	        indicates that the insn requires the number of delay slots
 		shown.
 2nd operand: Vector whose length is the three times the number of delay
 		slots required.
 	        Each entry gives three conditions, each involving attributes.
 		The first must be true for an insn to occupy that delay slot
 		location.  The second is true for all insns that can be
 		annulled if the branch is true and the third is true for all
 		insns that can be annulled if the branch is false.
 Multiple DEFINE_DELAYs may be present.  They indicate differing
 requirements for delay slots.  */
 DEF_RTL_EXPR(DEFINE_DELAY, "define_delay", "eE", RTX_EXTRA)
 DEFINE_ADDRESS_CONSTRAINT tells reload that this constraint can be made
 to match, if it doesn't already, by converting the operand to the form
 (reg X) where X is a base register.  It is suitable for constraints that
 describe a subset of all address references.
 When in doubt, use plain DEFINE_CONSTRAINT.
 Operand:
 0: The name of the constraint (often, but not always, a single letter).
 1: A docstring for this constraint, in Texinfo syntax; not currently
 used, in future will be incorporated into the manual's list of
 Do not use ival/hval/lval/rval if op is not the appropriate kind of
 RTL object.  */
 DEF_RTL_EXPR(DEFINE_CONSTRAINT, "define_constraint", "sse", RTX_EXTRA)
 DEF_RTL_EXPR(DEFINE_MEMORY_CONSTRAINT, "define_memory_constraint", "sse", RTX_EXTRA)
 DEF_RTL_EXPR(DEFINE_ADDRESS_CONSTRAINT, "define_address_constraint", "sse", RTX_EXTRA)
 /* Constructions for CPU pipeline description described by NDFAs.  */
 /* (define_cpu_unit string [string]) describes cpu functional
 units (separated by comma).
 the first string can not be reserved unless at least one of pattern
 of units whose names are in the second string is reserved.  This is
 an asymmetric relation.  CPU units or unit patterns in the strings
 are separated by commas.  Pattern is one unit name or unit names
 separated by white-spaces.
 For example, it is useful for description that slot1 is reserved
 after slot0 reservation for a VLIW processor.  We could describe it
 by the following construction
 (presence_set "slot1" "slot0")
 changed.  The first state is a source state, the second one is a
 result state.  Checking for `presence_set' is done on the source
 state reservation, checking for `final_presence_set' is done on the
 result reservation.  This construction is useful to describe a
 reservation which is actually two subsequent reservations.  For
 example, if we use
 (presence_set "slot1" "slot0")
 the following insn will be never issued (because slot1 requires
 slot0 which is absent in the source state).
 string.  Insn names in the strings are separated by commas.  The
 third operand is optional name of function which is additional
 guard for the bypass.  The function will get the two insns as
 parameters.  If the function returns zero the bypass will be
 ignored for this case.  Additional guard is necessary to recognize
-complicated bypasses, e.g. when consumer is load address.  */
+complicated bypasses, e.g. when consumer is load address.  If there
+are more one bypass with the same output and input insns, the
+chosen bypass is the first bypass with a guard in description whose
+guard function returns nonzero.  If there is no such bypass, then
+bypass without the guard function is chosen.  */
 DEF_RTL_EXPR(DEFINE_BYPASS, "define_bypass", "issS", RTX_EXTRA)
 /* (define_automaton string) describes names of automata generated and
 used for pipeline hazards recognition.  The names are separated by
 comma.  Actually it is possibly to generate the single automaton
 is only worth to do when we are debugging the description and
 need to look more accurately at reservations of states.
 o "time" which means printing additional time statistics about
 generation of automata.
 o "v" which means generation of file describing the result
 automata.  The file has suffix `.dfa' and can be used for the
 description verification and debugging.
 o "w" which means generation of warning instead of error for
 oneof = oneof "|" allof
 | allof
 allof = allof "+" repeat
 | repeat
 repeat = element "*" number
 | element
 element = cpu_function_unit_name
 | reservation_name

Mercurial > hg > CbC > CbC_gcc

comparison gcc/rtl.def @ 55:77e2b8dfacca gcc-4.4.5