Mercurial > hg > CbC > CbC_gcc
comparison gcc/config/i386/cpuid.h @ 131:84e7813d76e9
gcc-8.2
author | mir3636 |
---|---|
date | Thu, 25 Oct 2018 07:37:49 +0900 |
parents | 04ced10e8804 |
children | 1830386684a0 |
comparison
equal
deleted
inserted
replaced
111:04ced10e8804 | 131:84e7813d76e9 |
---|---|
1 /* | 1 /* |
2 * Copyright (C) 2007-2017 Free Software Foundation, Inc. | 2 * Copyright (C) 2007-2018 Free Software Foundation, Inc. |
3 * | 3 * |
4 * This file is free software; you can redistribute it and/or modify it | 4 * This file is free software; you can redistribute it and/or modify it |
5 * under the terms of the GNU General Public License as published by the | 5 * under the terms of the GNU General Public License as published by the |
6 * Free Software Foundation; either version 3, or (at your option) any | 6 * Free Software Foundation; either version 3, or (at your option) any |
7 * later version. | 7 * later version. |
65 #define bit_3DNOWP (1 << 30) | 65 #define bit_3DNOWP (1 << 30) |
66 #define bit_3DNOW (1u << 31) | 66 #define bit_3DNOW (1u << 31) |
67 | 67 |
68 /* %ebx */ | 68 /* %ebx */ |
69 #define bit_CLZERO (1 << 0) | 69 #define bit_CLZERO (1 << 0) |
70 #define bit_WBNOINVD (1 << 9) | |
70 | 71 |
71 /* Extended Features (%eax == 7) */ | 72 /* Extended Features (%eax == 7) */ |
72 /* %ebx */ | 73 /* %ebx */ |
73 #define bit_FSGSBASE (1 << 0) | 74 #define bit_FSGSBASE (1 << 0) |
74 #define bit_SGX (1 << 2) | 75 #define bit_SGX (1 << 2) |
95 /* %ecx */ | 96 /* %ecx */ |
96 #define bit_PREFETCHWT1 (1 << 0) | 97 #define bit_PREFETCHWT1 (1 << 0) |
97 #define bit_AVX512VBMI (1 << 1) | 98 #define bit_AVX512VBMI (1 << 1) |
98 #define bit_PKU (1 << 3) | 99 #define bit_PKU (1 << 3) |
99 #define bit_OSPKE (1 << 4) | 100 #define bit_OSPKE (1 << 4) |
101 #define bit_WAITPKG (1 << 5) | |
102 #define bit_AVX512VBMI2 (1 << 6) | |
100 #define bit_SHSTK (1 << 7) | 103 #define bit_SHSTK (1 << 7) |
101 #define bit_GFNI (1 << 8) | 104 #define bit_GFNI (1 << 8) |
105 #define bit_VAES (1 << 9) | |
106 #define bit_AVX512VNNI (1 << 11) | |
107 #define bit_VPCLMULQDQ (1 << 10) | |
108 #define bit_AVX512BITALG (1 << 12) | |
102 #define bit_AVX512VPOPCNTDQ (1 << 14) | 109 #define bit_AVX512VPOPCNTDQ (1 << 14) |
103 #define bit_RDPID (1 << 22) | 110 #define bit_RDPID (1 << 22) |
111 #define bit_MOVDIRI (1 << 27) | |
112 #define bit_MOVDIR64B (1 << 28) | |
113 #define bit_CLDEMOTE (1 << 25) | |
104 | 114 |
105 /* %edx */ | 115 /* %edx */ |
106 #define bit_AVX5124VNNIW (1 << 2) | 116 #define bit_AVX5124VNNIW (1 << 2) |
107 #define bit_AVX5124FMAPS (1 << 3) | 117 #define bit_AVX5124FMAPS (1 << 3) |
108 #define bit_IBT (1 << 20) | 118 #define bit_IBT (1 << 20) |
109 | 119 #define bit_PCONFIG (1 << 18) |
110 /* XFEATURE_ENABLED_MASK register bits (%eax == 13, %ecx == 0) */ | 120 /* XFEATURE_ENABLED_MASK register bits (%eax == 13, %ecx == 0) */ |
111 #define bit_BNDREGS (1 << 3) | 121 #define bit_BNDREGS (1 << 3) |
112 #define bit_BNDCSR (1 << 4) | 122 #define bit_BNDCSR (1 << 4) |
113 | 123 |
114 /* Extended State Enumeration Sub-leaf (%eax == 13, %ecx == 1) */ | 124 /* Extended State Enumeration Sub-leaf (%eax == 13, %ecx == 1) */ |