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comparison gcc/testsuite/g++.target/aarch64/sve/catch_5.C @ 131:84e7813d76e9

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gcc-8.2
author mir3636
date Thu, 25 Oct 2018 07:37:49 +0900
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111:04ced10e8804 131:84e7813d76e9
1 /* { dg-do run { target aarch64_sve_hw } } */
2 /* { dg-options "-O3 -fopenmp-simd -fno-omit-frame-pointer" } */
3
4 /* Invoke X (P##n) for n in [0, 7]. */
5 #define REPEAT8(X, P) \
6 X (P##0) X (P##1) X (P##2) X (P##3) X (P##4) X (P##5) X (P##6) X (P##7)
7
8 /* Invoke X (n) for all octal n in [0, 39]. */
9 #define REPEAT40(X) \
10 REPEAT8 (X, 0) REPEAT8 (X, 1) REPEAT8 (X, 2) REPEAT8 (X, 3) REPEAT8 (X, 4)
11
12 volatile int testi, sink;
13 volatile void *ptr;
14
15 /* Take 2 stack arguments and throw to f3. */
16 void __attribute__ ((weak))
17 f1 (int x[40][100], int *y, int z1, int z2, int z3, int z4,
18 int z5, int z6, int z7, int z8)
19 {
20 /* A wild write to x and y. */
21 sink = z1;
22 sink = z2;
23 sink = z3;
24 sink = z4;
25 sink = z5;
26 sink = z6;
27 sink = z7;
28 sink = z8;
29 asm volatile ("" ::: "memory");
30 if (y[testi] == x[testi][testi])
31 throw 100;
32 }
33
34 /* Expect vector work to be done, with spilling of vector registers. */
35 void __attribute__ ((weak))
36 f2 (int x[40][100], int *y)
37 {
38 /* Create a true variable-sized frame. */
39 ptr = __builtin_alloca (testi + 40);
40 /* Try to force some spilling. */
41 #define DECLARE(N) int y##N = y[N];
42 REPEAT40 (DECLARE);
43 for (int j = 0; j < 20; ++j)
44 {
45 f1 (x, y, 1, 2, 3, 4, 5, 6, 7, 8);
46 #pragma omp simd
47 for (int i = 0; i < 100; ++i)
48 {
49 #define INC(N) x[N][i] += y##N;
50 REPEAT40 (INC);
51 }
52 }
53 }
54
55 /* Catch an exception thrown from f1, via f2. */
56 void __attribute__ ((weak))
57 f3 (int x[40][100], int *y, int *z)
58 {
59 volatile int extra = 111;
60 try
61 {
62 f2 (x, y);
63 }
64 catch (int val)
65 {
66 *z = val + extra;
67 }
68 }
69
70 static int x[40][100];
71 static int y[40];
72 static int z;
73
74 int
75 main (void)
76 {
77 f3 (x, y, &z);
78 if (z != 211)
79 __builtin_abort ();
80 return 0;
81 }