Mercurial > hg > CbC > CbC_gcc
comparison gcc/config/i386/i386.opt @ 0:a06113de4d67
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author | kent <kent@cr.ie.u-ryukyu.ac.jp> |
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date | Fri, 17 Jul 2009 14:47:48 +0900 |
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children | 77e2b8dfacca |
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1 ; Options for the IA-32 and AMD64 ports of the compiler. | |
2 | |
3 ; Copyright (C) 2005, 2006, 2007, 2008 Free Software Foundation, Inc. | |
4 ; | |
5 ; This file is part of GCC. | |
6 ; | |
7 ; GCC is free software; you can redistribute it and/or modify it under | |
8 ; the terms of the GNU General Public License as published by the Free | |
9 ; Software Foundation; either version 3, or (at your option) any later | |
10 ; version. | |
11 ; | |
12 ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
13 ; WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 ; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 ; for more details. | |
16 ; | |
17 ; You should have received a copy of the GNU General Public License | |
18 ; along with GCC; see the file COPYING3. If not see | |
19 ; <http://www.gnu.org/licenses/>. | |
20 | |
21 ;; Definitions to add to the cl_target_option structure | |
22 ;; -march= processor | |
23 TargetSave | |
24 unsigned char arch | |
25 | |
26 ;; -mtune= processor | |
27 TargetSave | |
28 unsigned char tune | |
29 | |
30 ;; -mfpath= | |
31 TargetSave | |
32 unsigned char fpmath | |
33 | |
34 ;; CPU schedule model | |
35 TargetSave | |
36 unsigned char schedule | |
37 | |
38 ;; branch cost | |
39 TargetSave | |
40 unsigned char branch_cost | |
41 | |
42 ;; which flags were passed by the user | |
43 TargetSave | |
44 int ix86_isa_flags_explicit | |
45 | |
46 ;; which flags were passed by the user | |
47 TargetSave | |
48 int target_flags_explicit | |
49 | |
50 ;; whether -mtune was not specified | |
51 TargetSave | |
52 unsigned char tune_defaulted | |
53 | |
54 ;; whether -march was specified | |
55 TargetSave | |
56 unsigned char arch_specified | |
57 | |
58 ;; x86 options | |
59 m128bit-long-double | |
60 Target RejectNegative Report Mask(128BIT_LONG_DOUBLE) Save | |
61 sizeof(long double) is 16 | |
62 | |
63 m80387 | |
64 Target Report Mask(80387) Save | |
65 Use hardware fp | |
66 | |
67 m96bit-long-double | |
68 Target RejectNegative Report InverseMask(128BIT_LONG_DOUBLE) Save | |
69 sizeof(long double) is 12 | |
70 | |
71 maccumulate-outgoing-args | |
72 Target Report Mask(ACCUMULATE_OUTGOING_ARGS) Save | |
73 Reserve space for outgoing arguments in the function prologue | |
74 | |
75 malign-double | |
76 Target Report Mask(ALIGN_DOUBLE) Save | |
77 Align some doubles on dword boundary | |
78 | |
79 malign-functions= | |
80 Target RejectNegative Joined Var(ix86_align_funcs_string) | |
81 Function starts are aligned to this power of 2 | |
82 | |
83 malign-jumps= | |
84 Target RejectNegative Joined Var(ix86_align_jumps_string) | |
85 Jump targets are aligned to this power of 2 | |
86 | |
87 malign-loops= | |
88 Target RejectNegative Joined Var(ix86_align_loops_string) | |
89 Loop code aligned to this power of 2 | |
90 | |
91 malign-stringops | |
92 Target RejectNegative Report InverseMask(NO_ALIGN_STRINGOPS, ALIGN_STRINGOPS) Save | |
93 Align destination of the string operations | |
94 | |
95 march= | |
96 Target RejectNegative Joined Var(ix86_arch_string) | |
97 Generate code for given CPU | |
98 | |
99 masm= | |
100 Target RejectNegative Joined Var(ix86_asm_string) | |
101 Use given assembler dialect | |
102 | |
103 mbranch-cost= | |
104 Target RejectNegative Joined Var(ix86_branch_cost_string) | |
105 Branches are this expensive (1-5, arbitrary units) | |
106 | |
107 mlarge-data-threshold= | |
108 Target RejectNegative Joined Var(ix86_section_threshold_string) | |
109 Data greater than given threshold will go into .ldata section in x86-64 medium model | |
110 | |
111 mcmodel= | |
112 Target RejectNegative Joined Var(ix86_cmodel_string) | |
113 Use given x86-64 code model | |
114 | |
115 mfancy-math-387 | |
116 Target RejectNegative Report InverseMask(NO_FANCY_MATH_387, USE_FANCY_MATH_387) Save | |
117 Generate sin, cos, sqrt for FPU | |
118 | |
119 mforce-drap | |
120 Target Report Var(ix86_force_drap) | |
121 Always use Dynamic Realigned Argument Pointer (DRAP) to realign stack | |
122 | |
123 mfp-ret-in-387 | |
124 Target Report Mask(FLOAT_RETURNS) Save | |
125 Return values of functions in FPU registers | |
126 | |
127 mfpmath= | |
128 Target RejectNegative Joined Var(ix86_fpmath_string) | |
129 Generate floating point mathematics using given instruction set | |
130 | |
131 mhard-float | |
132 Target RejectNegative Mask(80387) MaskExists Save | |
133 Use hardware fp | |
134 | |
135 mieee-fp | |
136 Target Report Mask(IEEE_FP) Save | |
137 Use IEEE math for fp comparisons | |
138 | |
139 minline-all-stringops | |
140 Target Report Mask(INLINE_ALL_STRINGOPS) Save | |
141 Inline all known string operations | |
142 | |
143 minline-stringops-dynamically | |
144 Target Report Mask(INLINE_STRINGOPS_DYNAMICALLY) Save | |
145 Inline memset/memcpy string operations, but perform inline version only for small blocks | |
146 | |
147 mintel-syntax | |
148 Target Undocumented | |
149 ;; Deprecated | |
150 | |
151 mms-bitfields | |
152 Target Report Mask(MS_BITFIELD_LAYOUT) Save | |
153 Use native (MS) bitfield layout | |
154 | |
155 mno-align-stringops | |
156 Target RejectNegative Report Mask(NO_ALIGN_STRINGOPS) Undocumented Save | |
157 | |
158 mno-fancy-math-387 | |
159 Target RejectNegative Report Mask(NO_FANCY_MATH_387) Undocumented Save | |
160 | |
161 mno-push-args | |
162 Target RejectNegative Report Mask(NO_PUSH_ARGS) Undocumented Save | |
163 | |
164 mno-red-zone | |
165 Target RejectNegative Report Mask(NO_RED_ZONE) Undocumented Save | |
166 | |
167 momit-leaf-frame-pointer | |
168 Target Report Mask(OMIT_LEAF_FRAME_POINTER) Save | |
169 Omit the frame pointer in leaf functions | |
170 | |
171 mpc | |
172 Target RejectNegative Report Joined Var(ix87_precision_string) | |
173 Set 80387 floating-point precision (-mpc32, -mpc64, -mpc80) | |
174 | |
175 mpreferred-stack-boundary= | |
176 Target RejectNegative Joined Var(ix86_preferred_stack_boundary_string) | |
177 Attempt to keep stack aligned to this power of 2 | |
178 | |
179 mincoming-stack-boundary= | |
180 Target RejectNegative Joined Var(ix86_incoming_stack_boundary_string) | |
181 Assume incoming stack aligned to this power of 2 | |
182 | |
183 mpush-args | |
184 Target Report InverseMask(NO_PUSH_ARGS, PUSH_ARGS) Save | |
185 Use push instructions to save outgoing arguments | |
186 | |
187 mred-zone | |
188 Target RejectNegative Report InverseMask(NO_RED_ZONE, RED_ZONE) Save | |
189 Use red-zone in the x86-64 code | |
190 | |
191 mregparm= | |
192 Target RejectNegative Joined Var(ix86_regparm_string) | |
193 Number of registers used to pass integer arguments | |
194 | |
195 mrtd | |
196 Target Report Mask(RTD) Save | |
197 Alternate calling convention | |
198 | |
199 msoft-float | |
200 Target InverseMask(80387) Save | |
201 Do not use hardware fp | |
202 | |
203 msseregparm | |
204 Target RejectNegative Mask(SSEREGPARM) Save | |
205 Use SSE register passing conventions for SF and DF mode | |
206 | |
207 mstackrealign | |
208 Target Report Var(ix86_force_align_arg_pointer) Init(-1) | |
209 Realign stack in prologue | |
210 | |
211 mstack-arg-probe | |
212 Target Report Mask(STACK_PROBE) Save | |
213 Enable stack probing | |
214 | |
215 mstringop-strategy= | |
216 Target RejectNegative Joined Var(ix86_stringop_string) | |
217 Chose strategy to generate stringop using | |
218 | |
219 mtls-dialect= | |
220 Target RejectNegative Joined Var(ix86_tls_dialect_string) | |
221 Use given thread-local storage dialect | |
222 | |
223 mtls-direct-seg-refs | |
224 Target Report Mask(TLS_DIRECT_SEG_REFS) | |
225 Use direct references against %gs when accessing tls data | |
226 | |
227 mtune= | |
228 Target RejectNegative Joined Var(ix86_tune_string) | |
229 Schedule code for given CPU | |
230 | |
231 mveclibabi= | |
232 Target RejectNegative Joined Var(ix86_veclibabi_string) | |
233 Vector library ABI to use | |
234 | |
235 mrecip | |
236 Target Report Mask(RECIP) Save | |
237 Generate reciprocals instead of divss and sqrtss. | |
238 | |
239 mcld | |
240 Target Report Mask(CLD) Save | |
241 Generate cld instruction in the function prologue. | |
242 | |
243 mno-fused-madd | |
244 Target RejectNegative Report Mask(NO_FUSED_MADD) Undocumented Save | |
245 | |
246 mfused-madd | |
247 Target Report InverseMask(NO_FUSED_MADD, FUSED_MADD) Save | |
248 Enable automatic generation of fused floating point multiply-add instructions | |
249 if the ISA supports such instructions. The -mfused-madd option is on by | |
250 default. | |
251 | |
252 ;; ISA support | |
253 | |
254 m32 | |
255 Target RejectNegative Negative(m64) Report InverseMask(ISA_64BIT) Var(ix86_isa_flags) VarExists Save | |
256 Generate 32bit i386 code | |
257 | |
258 m64 | |
259 Target RejectNegative Negative(m32) Report Mask(ISA_64BIT) Var(ix86_isa_flags) VarExists Save | |
260 Generate 64bit x86-64 code | |
261 | |
262 mmmx | |
263 Target Report Mask(ISA_MMX) Var(ix86_isa_flags) VarExists Save | |
264 Support MMX built-in functions | |
265 | |
266 m3dnow | |
267 Target Report Mask(ISA_3DNOW) Var(ix86_isa_flags) VarExists Save | |
268 Support 3DNow! built-in functions | |
269 | |
270 m3dnowa | |
271 Target Undocumented Mask(ISA_3DNOW_A) Var(ix86_isa_flags) VarExists Save | |
272 Support Athlon 3Dnow! built-in functions | |
273 | |
274 msse | |
275 Target Report Mask(ISA_SSE) Var(ix86_isa_flags) VarExists Save | |
276 Support MMX and SSE built-in functions and code generation | |
277 | |
278 msse2 | |
279 Target Report Mask(ISA_SSE2) Var(ix86_isa_flags) VarExists Save | |
280 Support MMX, SSE and SSE2 built-in functions and code generation | |
281 | |
282 msse3 | |
283 Target Report Mask(ISA_SSE3) Var(ix86_isa_flags) VarExists Save | |
284 Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation | |
285 | |
286 mssse3 | |
287 Target Report Mask(ISA_SSSE3) Var(ix86_isa_flags) VarExists Save | |
288 Support MMX, SSE, SSE2, SSE3 and SSSE3 built-in functions and code generation | |
289 | |
290 msse4.1 | |
291 Target Report Mask(ISA_SSE4_1) Var(ix86_isa_flags) VarExists Save | |
292 Support MMX, SSE, SSE2, SSE3, SSSE3 and SSE4.1 built-in functions and code generation | |
293 | |
294 msse4.2 | |
295 Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) VarExists Save | |
296 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation | |
297 | |
298 msse4 | |
299 Target RejectNegative Report Mask(ISA_SSE4_2) MaskExists Var(ix86_isa_flags) VarExists Save | |
300 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation | |
301 | |
302 mno-sse4 | |
303 Target RejectNegative Report InverseMask(ISA_SSE4_1) MaskExists Var(ix86_isa_flags) VarExists Save | |
304 Do not support SSE4.1 and SSE4.2 built-in functions and code generation | |
305 | |
306 mavx | |
307 Target Report Mask(ISA_AVX) Var(ix86_isa_flags) VarExists | |
308 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2 and AVX built-in functions and code generation | |
309 | |
310 mfma | |
311 Target Report Mask(ISA_FMA) Var(ix86_isa_flags) VarExists | |
312 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation | |
313 | |
314 msse4a | |
315 Target Report Mask(ISA_SSE4A) Var(ix86_isa_flags) VarExists Save | |
316 Support MMX, SSE, SSE2, SSE3 and SSE4A built-in functions and code generation | |
317 | |
318 msse5 | |
319 Target Report Mask(ISA_SSE5) Var(ix86_isa_flags) VarExists Save | |
320 Support SSE5 built-in functions and code generation | |
321 | |
322 mabm | |
323 Target Report Mask(ISA_ABM) Var(ix86_isa_flags) VarExists Save | |
324 Support code generation of Advanced Bit Manipulation (ABM) instructions. | |
325 | |
326 mpopcnt | |
327 Target Report Mask(ISA_POPCNT) Var(ix86_isa_flags) VarExists Save | |
328 Support code generation of popcnt instruction. | |
329 | |
330 mcx16 | |
331 Target Report Mask(ISA_CX16) Var(ix86_isa_flags) VarExists Save | |
332 Support code generation of cmpxchg16b instruction. | |
333 | |
334 msahf | |
335 Target Report Mask(ISA_SAHF) Var(ix86_isa_flags) VarExists Save | |
336 Support code generation of sahf instruction in 64bit x86-64 code. | |
337 | |
338 maes | |
339 Target Report Mask(ISA_AES) Var(ix86_isa_flags) VarExists Save | |
340 Support AES built-in functions and code generation | |
341 | |
342 mpclmul | |
343 Target Report Mask(ISA_PCLMUL) Var(ix86_isa_flags) VarExists Save | |
344 Support PCLMUL built-in functions and code generation | |
345 | |
346 msse2avx | |
347 Target Report Var(ix86_sse2avx) | |
348 Encode SSE instructions with VEX prefix |