Mercurial > hg > CbC > CbC_gcc

comparison gcc/config/ia64/ia64-modes.def @ 0:a06113de4d67

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
first commit
author kent <kent@cr.ie.u-ryukyu.ac.jp>
date Fri, 17 Jul 2009 14:47:48 +0900
parents
children 04ced10e8804
comparison
equal deleted inserted replaced
-1:000000000000 0:a06113de4d67
1 /* Definitions of target machine GNU compiler. IA-64 version.
2 Copyright (C) 2002, 2003, 2004, 2005, 2007 Free Software Foundation, Inc.
3 Contributed by James E. Wilson <wilson@cygnus.com> and
4 David Mosberger <davidm@hpl.hp.com>.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
12
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 /* IA64 requires both XF and TF modes.
23 XFmode is __float80 is IEEE extended; TFmode is __float128
24 is IEEE quad. Both these modes occupy 16 bytes, but XFmode
25 only has 80 significant bits. RFmode is __fpreg is IA64 internal
26 register format with 82 significant bits but otherwise handled like
27 XFmode. */
28
29 FRACTIONAL_FLOAT_MODE (XF, 80, 16, ieee_extended_intel_128_format);
30 FRACTIONAL_FLOAT_MODE (RF, 82, 16, ieee_extended_intel_128_format);
31 FLOAT_MODE (TF, 16, ieee_quad_format);
32
33 /* The above produces:
34
35 mode ILP32 size/align LP64 size/align
36 XF 16/16 16/16
37 TF 16/16 16/16
38
39 psABI expectations:
40
41 mode ILP32 size/align LP64 size/align
42 XF 12/4 -
43 TF - -
44
45 HPUX expectations:
46
47 mode ILP32 size/align LP64 size/align
48 XF - -
49 TF 16/8 -
50
51 We fix this up here. */
52
53 ADJUST_FLOAT_FORMAT (XF, (TARGET_ILP32 && !TARGET_HPUX)
54 ? &ieee_extended_intel_96_format
55 : &ieee_extended_intel_128_format);
56 ADJUST_BYTESIZE (XF, (TARGET_ILP32 && !TARGET_HPUX) ? 12 : 16);
57 ADJUST_ALIGNMENT (XF, (TARGET_ILP32 && !TARGET_HPUX) ? 4 : 16);
58
59 ADJUST_FLOAT_FORMAT (RF, (TARGET_ILP32 && !TARGET_HPUX)
60 ? &ieee_extended_intel_96_format
61 : &ieee_extended_intel_128_format);
62 ADJUST_BYTESIZE (RF, (TARGET_ILP32 && !TARGET_HPUX) ? 12 : 16);
63 ADJUST_ALIGNMENT (RF, (TARGET_ILP32 && !TARGET_HPUX) ? 4 : 16);
64
65 ADJUST_ALIGNMENT (TF, (TARGET_ILP32 && TARGET_HPUX) ? 8 : 16);
66
67 /* 256-bit integer mode is needed for STACK_SAVEAREA_MODE. */
68 INT_MODE (OI, 32);
69
70 /* Add any extra modes needed to represent the condition code.
71
72 CCImode is used to mark a single predicate register instead
73 of a register pair. This is currently only used in reg_raw_mode
74 so that flow doesn't do something stupid. */
75
76 CC_MODE (CCI);
77
78 /* Vector modes. */
79 VECTOR_MODES (INT, 4); /* V4QI V2HI */
80 VECTOR_MODES (INT, 8); /* V8QI V4HI V2SI */
81 VECTOR_MODE (INT, QI, 16);
82 VECTOR_MODE (INT, HI, 8);
83 VECTOR_MODE (INT, SI, 4);
84 VECTOR_MODE (FLOAT, SF, 2);
85 VECTOR_MODE (FLOAT, SF, 4);
86