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comparison gcc/config/m32c/predicates.md @ 0:a06113de4d67

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author kent <kent@cr.ie.u-ryukyu.ac.jp>
date Fri, 17 Jul 2009 14:47:48 +0900
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1 ;; Machine Descriptions for R8C/M16C/M32C
2 ;; Copyright (C) 2005, 2007, 2008
3 ;; Free Software Foundation, Inc.
4 ;; Contributed by Red Hat.
5 ;;
6 ;; This file is part of GCC.
7 ;;
8 ;; GCC is free software; you can redistribute it and/or modify it
9 ;; under the terms of the GNU General Public License as published
10 ;; by the Free Software Foundation; either version 3, or (at your
11 ;; option) any later version.
12 ;;
13 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
14 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 ;; License for more details.
17 ;;
18 ;; You should have received a copy of the GNU General Public License
19 ;; along with GCC; see the file COPYING3. If not see
20 ;; <http://www.gnu.org/licenses/>.
21
22 ;; Predicates
23
24 ; TRUE for any valid operand. We do this because general_operand
25 ; refuses to match volatile memory refs.
26
27 (define_predicate "m32c_any_operand"
28 (ior (match_operand 0 "general_operand")
29 (match_operand 1 "memory_operand"))
30 {
31 return ! m32c_illegal_subreg_p (op);
32 }
33 )
34
35 ; Likewise for nonimmediate_operand.
36
37 (define_predicate "m32c_nonimmediate_operand"
38 (ior (match_operand 0 "nonimmediate_operand")
39 (match_operand 1 "memory_operand")))
40
41 ; TRUE if the operand is a pseudo-register.
42 (define_predicate "m32c_pseudo"
43 (ior (and (match_code "reg")
44 (match_test "REGNO(op) >= FIRST_PSEUDO_REGISTER"))
45 (and (match_code "subreg")
46 (and (match_test "GET_CODE (XEXP (op, 0)) == REG")
47 (match_test "REGNO(XEXP (op,0)) >= FIRST_PSEUDO_REGISTER")))))
48
49
50 ; Returning true causes many predicates to NOT match. We allow
51 ; subregs for type changing, but not for size changing.
52 (define_predicate "m32c_wide_subreg"
53 (and (match_code "subreg")
54 (not (match_operand 0 "m32c_pseudo")))
55 {
56 unsigned int sizeo = GET_MODE_SIZE (GET_MODE (op));
57 unsigned int sizei = GET_MODE_SIZE (GET_MODE (XEXP (op, 0)));
58 sizeo = (sizeo + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
59 sizei = (sizei + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
60 return sizeo != sizei;
61 })
62
63 ; TRUE for r0 through r3, or a pseudo that reload could put in r0
64 ; through r3 (likewise for the next couple too)
65 (define_predicate "r0123_operand"
66 (ior (match_operand 0 "m32c_pseudo" "")
67 (and (match_code "reg")
68 (match_test "REGNO(op) <= R3_REGNO"))))
69
70 ; TRUE for r0
71 (define_predicate "m32c_r0_operand"
72 (ior (match_operand 0 "m32c_pseudo" "")
73 (and (match_code "reg")
74 (match_test "REGNO(op) == R0_REGNO"))))
75
76 ; TRUE for r1
77 (define_predicate "m32c_r1_operand"
78 (ior (match_operand 0 "m32c_pseudo" "")
79 (and (match_code "reg")
80 (match_test "REGNO(op) == R1_REGNO"))))
81
82 ; TRUE for HL_CLASS (r0 or r1)
83 (define_predicate "m32c_hl_operand"
84 (ior (match_operand 0 "m32c_pseudo" "")
85 (and (match_code "reg")
86 (match_test "REGNO(op) == R0_REGNO || REGNO(op) == R1_REGNO"))))
87
88
89 ; TRUE for r2
90 (define_predicate "m32c_r2_operand"
91 (ior (match_operand 0 "m32c_pseudo" "")
92 (and (match_code "reg")
93 (match_test "REGNO(op) == R2_REGNO"))))
94
95 ; TRUE for r3
96 (define_predicate "m32c_r3_operand"
97 (ior (match_operand 0 "m32c_pseudo" "")
98 (and (match_code "reg")
99 (match_test "REGNO(op) == R3_REGNO"))))
100
101 ; TRUE for any general operand except r2.
102 (define_predicate "m32c_notr2_operand"
103 (and (match_operand 0 "general_operand")
104 (ior (not (match_code "reg"))
105 (match_test "REGNO(op) != R2_REGNO"))))
106
107 ; TRUE for the stack pointer.
108 (define_predicate "m32c_sp_operand"
109 (ior (match_operand 0 "m32c_pseudo" "")
110 (and (match_code "reg")
111 (match_test "REGNO(op) == SP_REGNO"))))
112
113 ; TRUE for control registers.
114 (define_predicate "cr_operand"
115 (match_code "reg")
116 "return (REGNO (op) >= SB_REGNO
117 && REGNO (op) <= FLG_REGNO);")
118
119 ; TRUE for $a0 or $a1.
120 (define_predicate "a_operand"
121 (and (match_code "reg")
122 (match_test "REGNO (op) == A0_REGNO || REGNO (op) == A1_REGNO")))
123
124 ; TRUE for $a0 or $a1 or a pseudo
125 (define_predicate "ap_operand"
126 (ior (match_operand 0 "m32c_pseudo" "")
127 (and (match_code "reg")
128 (match_test "REGNO (op) == A0_REGNO || REGNO (op) == A1_REGNO"))))
129
130 ; TRUE for r0 through r3, or a0 or a1.
131 (define_predicate "ra_operand"
132 (and (and (match_operand 0 "register_operand" "")
133 (not (match_operand 1 "cr_operand" "")))
134 (not (match_operand 2 "m32c_wide_subreg" ""))))
135
136 ; Likewise, plus TRUE for memory references.
137 (define_predicate "mra_operand"
138 (and (and (match_operand 0 "nonimmediate_operand" "")
139 (not (match_operand 1 "cr_operand" "")))
140 (not (match_operand 2 "m32c_wide_subreg" ""))))
141
142 ; Likewise, plus TRUE for subregs.
143 (define_predicate "mras_operand"
144 (and (match_operand 0 "nonimmediate_operand" "")
145 (not (match_operand 1 "cr_operand" ""))))
146
147 ; As above, but no push/pop operations
148 (define_predicate "mra_nopp_operand"
149 (match_operand 0 "mra_operand" "")
150 {
151 if (GET_CODE (op) == MEM
152 && (GET_CODE (XEXP (op, 0)) == PRE_DEC
153 || (GET_CODE (XEXP (op, 0)) == POST_INC)))
154 return 0;
155 return 1;
156 })
157
158 ; TRUE for memory, r0..r3, a0..a1, or immediates.
159 (define_predicate "mrai_operand"
160 (and (and (match_operand 0 "m32c_any_operand" "")
161 (not (match_operand 1 "cr_operand" "")))
162 (not (match_operand 2 "m32c_wide_subreg" ""))))
163
164 ; Likewise, plus true for subregs.
165 (define_predicate "mrasi_operand"
166 (and (match_operand 0 "general_operand" "")
167 (not (match_operand 1 "cr_operand" ""))))
168
169 ; TRUE for r0..r3 or memory.
170 (define_predicate "mr_operand"
171 (and (match_operand 0 "mra_operand" "")
172 (not (match_operand 1 "a_operand" ""))))
173
174 ; TRUE for a0..a1 or memory.
175 (define_predicate "ma_operand"
176 (ior (match_operand 0 "a_operand" "")
177 (match_operand 1 "memory_operand" "")))
178
179 ; TRUE for memory operands that are not indexed
180 (define_predicate "memsym_operand"
181 (and (match_operand 0 "memory_operand" "")
182 (match_test "m32c_extra_constraint_p (op, 'S', \"Si\")")))
183
184 ; TRUE for memory operands with small integer addresses
185 (define_predicate "memimmed_operand"
186 (and (match_operand 0 "memory_operand" "")
187 (match_test "m32c_extra_constraint_p (op, 'S', \"Sp\")")))
188
189 ; TRUE for r1h. This is complicated since r1h isn't a register GCC
190 ; normally knows about.
191 (define_predicate "r1h_operand"
192 (match_code "zero_extract")
193 {
194 rtx reg = XEXP (op, 0);
195 rtx size = XEXP (op, 1);
196 rtx pos = XEXP (op, 2);
197 return (GET_CODE (reg) == REG
198 && REGNO (reg) == R1_REGNO
199 && GET_CODE (size) == CONST_INT
200 && INTVAL (size) == 8
201 && GET_CODE (pos) == CONST_INT
202 && INTVAL (pos) == 8);
203 })
204
205 ; TRUE if we can shift by this amount. Constant shift counts have a
206 ; limited range.
207 (define_predicate "shiftcount_operand"
208 (ior (match_operand 0 "mra_operand" "")
209 (and (match_operand 2 "const_int_operand" "")
210 (match_test "-8 <= INTVAL (op) && INTVAL (op) && INTVAL (op) <= 8"))))
211 (define_predicate "longshiftcount_operand"
212 (ior (match_operand 0 "mra_operand" "")
213 (and (match_operand 2 "const_int_operand" "")
214 (match_test "-32 <= INTVAL (op) && INTVAL (op) && INTVAL (op) <= 32"))))
215
216 ; TRUE for r0..r3, a0..a1, or sp.
217 (define_predicate "mra_or_sp_operand"
218 (and (ior (match_operand 0 "mra_operand")
219 (match_operand 1 "m32c_sp_operand"))
220 (not (match_operand 2 "m32c_wide_subreg" ""))))
221
222
223 ; TRUE for r2 or r3.
224 (define_predicate "m32c_r2r3_operand"
225 (ior (and (match_code "reg")
226 (ior (match_test "REGNO(op) == R2_REGNO")
227 (match_test "REGNO(op) == R3_REGNO")))
228 (and (match_code "subreg")
229 (match_test "GET_CODE (XEXP (op, 0)) == REG && (REGNO (XEXP (op, 0)) == R2_REGNO || REGNO (XEXP (op, 0)) == R3_REGNO)"))))
230
231 ; Likewise, plus TRUE for a0..a1.
232 (define_predicate "m32c_r2r3a_operand"
233 (ior (match_operand 0 "m32c_r2r3_operand" "")
234 (match_operand 0 "a_operand" "")))
235
236 ; These two are only for movqi - no subreg limit
237 (define_predicate "mra_qi_operand"
238 (and (and (match_operand 0 "m32c_nonimmediate_operand" "")
239 (not (match_operand 1 "cr_operand" "")))
240 (not (match_operand 1 "m32c_r2r3a_operand" ""))))
241
242 (define_predicate "mrai_qi_operand"
243 (and (and (match_operand 0 "m32c_any_operand" "")
244 (not (match_operand 1 "cr_operand" "")))
245 (not (match_operand 1 "m32c_r2r3a_operand" ""))))
246
247 (define_predicate "a_qi_operand"
248 (ior (match_operand 0 "m32c_pseudo" "")
249 (match_operand 1 "a_operand" "")))
250
251 ; TRUE for comparisons we support.
252 (define_predicate "m32c_cmp_operator"
253 (match_code "eq,ne,gt,gtu,lt,ltu,ge,geu,le,leu"))
254
255 (define_predicate "m32c_eqne_operator"
256 (match_code "eq,ne"))
257
258 ; TRUE for mem0
259 (define_predicate "m32c_mem0_operand"
260 (ior (match_operand 0 "m32c_pseudo" "")
261 (and (match_code "reg")
262 (match_test "REGNO(op) == MEM0_REGNO"))))
263
264 ; TRUE for things the call patterns can return.
265 (define_predicate "m32c_return_operand"
266 (ior (match_operand 0 "m32c_r0_operand")
267 (ior (match_operand 0 "m32c_mem0_operand")
268 (match_code "parallel"))))
269
270 ; TRUE for constants we can multiply pointers by
271 (define_predicate "m32c_psi_scale"
272 (and (match_operand 0 "const_int_operand")
273 (match_test "m32c_const_ok_for_constraint_p(INTVAL(op), 'I', \"Ilb\")")))
274
275 ; TRUE for one bit set (bit) or clear (mask) out of N bits.
276
277 (define_predicate "m32c_1bit8_operand"
278 (and (match_operand 0 "const_int_operand")
279 (match_test "m32c_const_ok_for_constraint_p(INTVAL(op), 'I', \"Ilb\")")))
280
281 (define_predicate "m32c_1bit16_operand"
282 (and (match_operand 0 "const_int_operand")
283 (match_test "m32c_const_ok_for_constraint_p(INTVAL(op), 'I', \"Ilw\")")))
284
285 (define_predicate "m32c_1mask8_operand"
286 (and (match_operand 0 "const_int_operand")
287 (match_test "m32c_const_ok_for_constraint_p(INTVAL(op), 'I', \"ImB\")")))
288
289 (define_predicate "m32c_1mask16_operand"
290 (and (match_operand 0 "const_int_operand")
291 (match_test "m32c_const_ok_for_constraint_p(INTVAL(op), 'I', \"Imw\")")))