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comparison gcc/config/rs6000/rs6000.opt @ 0:a06113de4d67

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author kent <kent@cr.ie.u-ryukyu.ac.jp>
date Fri, 17 Jul 2009 14:47:48 +0900
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1 ; Options for the rs6000 port of the compiler
2 ;
3 ; Copyright (C) 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
4 ; Contributed by Aldy Hernandez <aldy@quesejoda.com>.
5 ;
6 ; This file is part of GCC.
7 ;
8 ; GCC is free software; you can redistribute it and/or modify it under
9 ; the terms of the GNU General Public License as published by the Free
10 ; Software Foundation; either version 3, or (at your option) any later
11 ; version.
12 ;
13 ; GCC is distributed in the hope that it will be useful, but WITHOUT
14 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 ; License for more details.
17 ;
18 ; You should have received a copy of the GNU General Public License
19 ; along with GCC; see the file COPYING3. If not see
20 ; <http://www.gnu.org/licenses/>.
21
22 mpower
23 Target Report RejectNegative Mask(POWER)
24 Use POWER instruction set
25
26 mno-power
27 Target Report RejectNegative
28 Do not use POWER instruction set
29
30 mpower2
31 Target Report Mask(POWER2)
32 Use POWER2 instruction set
33
34 mpowerpc
35 Target Report RejectNegative Mask(POWERPC)
36 Use PowerPC instruction set
37
38 mno-powerpc
39 Target Report RejectNegative
40 Do not use PowerPC instruction set
41
42 mpowerpc64
43 Target Report Mask(POWERPC64)
44 Use PowerPC-64 instruction set
45
46 mpowerpc-gpopt
47 Target Report Mask(PPC_GPOPT)
48 Use PowerPC General Purpose group optional instructions
49
50 mpowerpc-gfxopt
51 Target Report Mask(PPC_GFXOPT)
52 Use PowerPC Graphics group optional instructions
53
54 mmfcrf
55 Target Report Mask(MFCRF)
56 Use PowerPC V2.01 single field mfcr instruction
57
58 mpopcntb
59 Target Report Mask(POPCNTB)
60 Use PowerPC V2.02 popcntb instruction
61
62 mfprnd
63 Target Report Mask(FPRND)
64 Use PowerPC V2.02 floating point rounding instructions
65
66 mcmpb
67 Target Report Mask(CMPB)
68 Use PowerPC V2.05 compare bytes instruction
69
70 mmfpgpr
71 Target Report Mask(MFPGPR)
72 Use extended PowerPC V2.05 move floating point to/from GPR instructions
73
74 maltivec
75 Target Report Mask(ALTIVEC)
76 Use AltiVec instructions
77
78 mhard-dfp
79 Target Report Mask(DFP)
80 Use decimal floating point instructions
81
82 mmulhw
83 Target Report Mask(MULHW)
84 Use 4xx half-word multiply instructions
85
86 mdlmzb
87 Target Report Mask(DLMZB)
88 Use 4xx string-search dlmzb instruction
89
90 mmultiple
91 Target Report Mask(MULTIPLE)
92 Generate load/store multiple instructions
93
94 mstring
95 Target Report Mask(STRING)
96 Generate string instructions for block moves
97
98 mnew-mnemonics
99 Target Report RejectNegative Mask(NEW_MNEMONICS)
100 Use new mnemonics for PowerPC architecture
101
102 mold-mnemonics
103 Target Report RejectNegative InverseMask(NEW_MNEMONICS)
104 Use old mnemonics for PowerPC architecture
105
106 msoft-float
107 Target Report RejectNegative Mask(SOFT_FLOAT)
108 Do not use hardware floating point
109
110 mhard-float
111 Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT)
112 Use hardware floating point
113
114 mno-update
115 Target Report RejectNegative Mask(NO_UPDATE)
116 Do not generate load/store with update instructions
117
118 mupdate
119 Target Report RejectNegative InverseMask(NO_UPDATE, UPDATE)
120 Generate load/store with update instructions
121
122 mavoid-indexed-addresses
123 Target Report Var(TARGET_AVOID_XFORM) Init(-1)
124 Avoid generation of indexed load/store instructions when possible
125
126 mno-fused-madd
127 Target Report RejectNegative Mask(NO_FUSED_MADD)
128 Do not generate fused multiply/add instructions
129
130 mfused-madd
131 Target Report RejectNegative InverseMask(NO_FUSED_MADD, FUSED_MADD)
132 Generate fused multiply/add instructions
133
134 msched-prolog
135 Target Report Var(TARGET_SCHED_PROLOG) Init(1)
136 Schedule the start and end of the procedure
137
138 msched-epilog
139 Target Undocumented Var(TARGET_SCHED_PROLOG) VarExists
140
141 maix-struct-return
142 Target Report RejectNegative Var(aix_struct_return)
143 Return all structures in memory (AIX default)
144
145 msvr4-struct-return
146 Target Report RejectNegative Var(aix_struct_return,0) VarExists
147 Return small structures in registers (SVR4 default)
148
149 mxl-compat
150 Target Report Var(TARGET_XL_COMPAT)
151 Conform more closely to IBM XLC semantics
152
153 mrecip
154 Target Report Var(TARGET_RECIP)
155 Generate software reciprocal sqrt for better throughput
156
157 mno-fp-in-toc
158 Target Report RejectNegative Var(TARGET_NO_FP_IN_TOC)
159 Do not place floating point constants in TOC
160
161 mfp-in-toc
162 Target Report RejectNegative Var(TARGET_NO_FP_IN_TOC,0)
163 Place floating point constants in TOC
164
165 mno-sum-in-toc
166 Target RejectNegative Var(TARGET_NO_SUM_IN_TOC)
167 Do not place symbol+offset constants in TOC
168
169 msum-in-toc
170 Target RejectNegative Var(TARGET_NO_SUM_IN_TOC,0) VarExists
171 Place symbol+offset constants in TOC
172
173 ; Output only one TOC entry per module. Normally linking fails if
174 ; there are more than 16K unique variables/constants in an executable. With
175 ; this option, linking fails only if there are more than 16K modules, or
176 ; if there are more than 16K unique variables/constant in a single module.
177 ;
178 ; This is at the cost of having 2 extra loads and one extra store per
179 ; function, and one less allocable register.
180 mminimal-toc
181 Target Report Mask(MINIMAL_TOC)
182 Use only one TOC entry per procedure
183
184 mfull-toc
185 Target Report
186 Put everything in the regular TOC
187
188 mvrsave
189 Target Report Var(TARGET_ALTIVEC_VRSAVE)
190 Generate VRSAVE instructions when generating AltiVec code
191
192 mvrsave=
193 Target RejectNegative Joined
194 -mvrsave=yes/no Deprecated option. Use -mvrsave/-mno-vrsave instead
195
196 misel
197 Target
198 Generate isel instructions
199
200 misel=
201 Target RejectNegative Joined
202 -misel=yes/no Deprecated option. Use -misel/-mno-isel instead
203
204 mspe
205 Target
206 Generate SPE SIMD instructions on E500
207
208 mpaired
209 Target Var(rs6000_paired_float)
210 Generate PPC750CL paired-single instructions
211
212 mspe=
213 Target RejectNegative Joined
214 -mspe=yes/no Deprecated option. Use -mspe/-mno-spe instead
215
216 mdebug=
217 Target RejectNegative Joined
218 -mdebug= Enable debug output
219
220 mabi=
221 Target RejectNegative Joined
222 -mabi= Specify ABI to use
223
224 mcpu=
225 Target RejectNegative Joined
226 -mcpu= Use features of and schedule code for given CPU
227
228 mtune=
229 Target RejectNegative Joined
230 -mtune= Schedule code for given CPU
231
232 mtraceback=
233 Target RejectNegative Joined
234 -mtraceback= Select full, part, or no traceback table
235
236 mlongcall
237 Target Report Var(rs6000_default_long_calls)
238 Avoid all range limits on call instructions
239
240 mgen-cell-microcode
241 Target Report Var(rs6000_gen_cell_microcode) Init(-1)
242 Generate Cell microcode
243
244 mwarn-cell-microcode
245 Target Var(rs6000_warn_cell_microcode) Init(0) Warning
246 Warn when a Cell microcoded instruction is emitted
247
248 mwarn-altivec-long
249 Target Var(rs6000_warn_altivec_long) Init(1)
250 Warn about deprecated 'vector long ...' AltiVec type usage
251
252 mfloat-gprs=
253 Target RejectNegative Joined
254 -mfloat-gprs= Select GPR floating point method
255
256 mlong-double-
257 Target RejectNegative Joined UInteger
258 -mlong-double-<n> Specify size of long double (64 or 128 bits)
259
260 msched-costly-dep=
261 Target RejectNegative Joined
262 Determine which dependences between insns are considered costly
263
264 minsert-sched-nops=
265 Target RejectNegative Joined
266 Specify which post scheduling nop insertion scheme to apply
267
268 malign-
269 Target RejectNegative Joined
270 Specify alignment of structure fields default/natural
271
272 mprioritize-restricted-insns=
273 Target RejectNegative Joined UInteger Var(rs6000_sched_restricted_insns_priority)
274 Specify scheduling priority for dispatch slot restricted insns
275
276 msingle-float
277 Target RejectNegative Var(rs6000_single_float)
278 Single-precision floating point unit
279
280 mdouble-float
281 Target RejectNegative Var(rs6000_double_float)
282 Double-precision floating point unit
283
284 msimple-fpu
285 Target RejectNegative Var(rs6000_simple_fpu)
286 Floating point unit does not support divide & sqrt
287
288 mfpu=
289 Target RejectNegative Joined
290 -mfpu= Specify FP (sp, dp, sp-lite, dp-lite) (implies -mxilinx-fpu)
291
292 mxilinx-fpu
293 Target Var(rs6000_xilinx_fpu)
294 Specify Xilinx FPU.
295
296