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1 ; Options for the rs6000 port of the compiler
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2 ;
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3 ; Copyright (C) 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
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4 ; Contributed by Aldy Hernandez <aldy@quesejoda.com>.
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5 ;
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6 ; This file is part of GCC.
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7 ;
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8 ; GCC is free software; you can redistribute it and/or modify it under
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9 ; the terms of the GNU General Public License as published by the Free
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10 ; Software Foundation; either version 3, or (at your option) any later
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11 ; version.
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12 ;
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13 ; GCC is distributed in the hope that it will be useful, but WITHOUT
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14 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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15 ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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16 ; License for more details.
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17 ;
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18 ; You should have received a copy of the GNU General Public License
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19 ; along with GCC; see the file COPYING3. If not see
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20 ; <http://www.gnu.org/licenses/>.
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21
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22 mpower
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23 Target Report RejectNegative Mask(POWER)
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24 Use POWER instruction set
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25
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26 mno-power
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27 Target Report RejectNegative
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28 Do not use POWER instruction set
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29
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30 mpower2
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31 Target Report Mask(POWER2)
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32 Use POWER2 instruction set
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33
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34 mpowerpc
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35 Target Report RejectNegative Mask(POWERPC)
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36 Use PowerPC instruction set
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37
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38 mno-powerpc
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39 Target Report RejectNegative
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40 Do not use PowerPC instruction set
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41
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42 mpowerpc64
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43 Target Report Mask(POWERPC64)
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44 Use PowerPC-64 instruction set
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45
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46 mpowerpc-gpopt
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47 Target Report Mask(PPC_GPOPT)
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48 Use PowerPC General Purpose group optional instructions
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49
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50 mpowerpc-gfxopt
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51 Target Report Mask(PPC_GFXOPT)
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52 Use PowerPC Graphics group optional instructions
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53
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54 mmfcrf
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55 Target Report Mask(MFCRF)
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56 Use PowerPC V2.01 single field mfcr instruction
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57
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58 mpopcntb
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59 Target Report Mask(POPCNTB)
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60 Use PowerPC V2.02 popcntb instruction
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61
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62 mfprnd
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63 Target Report Mask(FPRND)
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64 Use PowerPC V2.02 floating point rounding instructions
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65
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66 mcmpb
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67 Target Report Mask(CMPB)
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68 Use PowerPC V2.05 compare bytes instruction
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69
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70 mmfpgpr
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71 Target Report Mask(MFPGPR)
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72 Use extended PowerPC V2.05 move floating point to/from GPR instructions
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73
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74 maltivec
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75 Target Report Mask(ALTIVEC)
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76 Use AltiVec instructions
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77
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78 mhard-dfp
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79 Target Report Mask(DFP)
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80 Use decimal floating point instructions
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81
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82 mmulhw
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83 Target Report Mask(MULHW)
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84 Use 4xx half-word multiply instructions
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85
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86 mdlmzb
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87 Target Report Mask(DLMZB)
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88 Use 4xx string-search dlmzb instruction
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89
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90 mmultiple
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91 Target Report Mask(MULTIPLE)
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92 Generate load/store multiple instructions
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93
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94 mstring
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95 Target Report Mask(STRING)
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96 Generate string instructions for block moves
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97
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98 mnew-mnemonics
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99 Target Report RejectNegative Mask(NEW_MNEMONICS)
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100 Use new mnemonics for PowerPC architecture
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101
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102 mold-mnemonics
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103 Target Report RejectNegative InverseMask(NEW_MNEMONICS)
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104 Use old mnemonics for PowerPC architecture
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105
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106 msoft-float
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107 Target Report RejectNegative Mask(SOFT_FLOAT)
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108 Do not use hardware floating point
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109
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110 mhard-float
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111 Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT)
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112 Use hardware floating point
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113
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114 mno-update
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115 Target Report RejectNegative Mask(NO_UPDATE)
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116 Do not generate load/store with update instructions
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117
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118 mupdate
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119 Target Report RejectNegative InverseMask(NO_UPDATE, UPDATE)
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120 Generate load/store with update instructions
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121
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122 mavoid-indexed-addresses
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123 Target Report Var(TARGET_AVOID_XFORM) Init(-1)
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124 Avoid generation of indexed load/store instructions when possible
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125
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126 mno-fused-madd
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127 Target Report RejectNegative Mask(NO_FUSED_MADD)
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128 Do not generate fused multiply/add instructions
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129
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130 mfused-madd
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131 Target Report RejectNegative InverseMask(NO_FUSED_MADD, FUSED_MADD)
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132 Generate fused multiply/add instructions
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133
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134 msched-prolog
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135 Target Report Var(TARGET_SCHED_PROLOG) Init(1)
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136 Schedule the start and end of the procedure
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137
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138 msched-epilog
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139 Target Undocumented Var(TARGET_SCHED_PROLOG) VarExists
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140
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141 maix-struct-return
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142 Target Report RejectNegative Var(aix_struct_return)
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143 Return all structures in memory (AIX default)
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144
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145 msvr4-struct-return
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146 Target Report RejectNegative Var(aix_struct_return,0) VarExists
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147 Return small structures in registers (SVR4 default)
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148
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149 mxl-compat
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150 Target Report Var(TARGET_XL_COMPAT)
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151 Conform more closely to IBM XLC semantics
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152
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153 mrecip
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154 Target Report Var(TARGET_RECIP)
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155 Generate software reciprocal sqrt for better throughput
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156
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157 mno-fp-in-toc
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158 Target Report RejectNegative Var(TARGET_NO_FP_IN_TOC)
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159 Do not place floating point constants in TOC
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160
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161 mfp-in-toc
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162 Target Report RejectNegative Var(TARGET_NO_FP_IN_TOC,0)
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163 Place floating point constants in TOC
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164
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165 mno-sum-in-toc
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166 Target RejectNegative Var(TARGET_NO_SUM_IN_TOC)
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167 Do not place symbol+offset constants in TOC
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168
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169 msum-in-toc
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170 Target RejectNegative Var(TARGET_NO_SUM_IN_TOC,0) VarExists
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171 Place symbol+offset constants in TOC
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172
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173 ; Output only one TOC entry per module. Normally linking fails if
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174 ; there are more than 16K unique variables/constants in an executable. With
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175 ; this option, linking fails only if there are more than 16K modules, or
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176 ; if there are more than 16K unique variables/constant in a single module.
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177 ;
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178 ; This is at the cost of having 2 extra loads and one extra store per
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179 ; function, and one less allocable register.
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180 mminimal-toc
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181 Target Report Mask(MINIMAL_TOC)
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182 Use only one TOC entry per procedure
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183
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184 mfull-toc
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185 Target Report
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186 Put everything in the regular TOC
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187
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188 mvrsave
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189 Target Report Var(TARGET_ALTIVEC_VRSAVE)
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190 Generate VRSAVE instructions when generating AltiVec code
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191
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192 mvrsave=
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193 Target RejectNegative Joined
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194 -mvrsave=yes/no Deprecated option. Use -mvrsave/-mno-vrsave instead
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195
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196 misel
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197 Target
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198 Generate isel instructions
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199
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200 misel=
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201 Target RejectNegative Joined
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202 -misel=yes/no Deprecated option. Use -misel/-mno-isel instead
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203
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204 mspe
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205 Target
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206 Generate SPE SIMD instructions on E500
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207
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208 mpaired
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209 Target Var(rs6000_paired_float)
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210 Generate PPC750CL paired-single instructions
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211
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212 mspe=
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213 Target RejectNegative Joined
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214 -mspe=yes/no Deprecated option. Use -mspe/-mno-spe instead
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215
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216 mdebug=
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217 Target RejectNegative Joined
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218 -mdebug= Enable debug output
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219
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220 mabi=
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221 Target RejectNegative Joined
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222 -mabi= Specify ABI to use
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223
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224 mcpu=
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225 Target RejectNegative Joined
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226 -mcpu= Use features of and schedule code for given CPU
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227
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228 mtune=
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229 Target RejectNegative Joined
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230 -mtune= Schedule code for given CPU
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231
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232 mtraceback=
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233 Target RejectNegative Joined
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234 -mtraceback= Select full, part, or no traceback table
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235
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236 mlongcall
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237 Target Report Var(rs6000_default_long_calls)
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238 Avoid all range limits on call instructions
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239
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240 mgen-cell-microcode
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241 Target Report Var(rs6000_gen_cell_microcode) Init(-1)
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242 Generate Cell microcode
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243
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244 mwarn-cell-microcode
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245 Target Var(rs6000_warn_cell_microcode) Init(0) Warning
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246 Warn when a Cell microcoded instruction is emitted
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247
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248 mwarn-altivec-long
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249 Target Var(rs6000_warn_altivec_long) Init(1)
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250 Warn about deprecated 'vector long ...' AltiVec type usage
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251
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252 mfloat-gprs=
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253 Target RejectNegative Joined
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254 -mfloat-gprs= Select GPR floating point method
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255
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256 mlong-double-
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257 Target RejectNegative Joined UInteger
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258 -mlong-double-<n> Specify size of long double (64 or 128 bits)
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259
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260 msched-costly-dep=
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261 Target RejectNegative Joined
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262 Determine which dependences between insns are considered costly
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263
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264 minsert-sched-nops=
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265 Target RejectNegative Joined
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266 Specify which post scheduling nop insertion scheme to apply
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267
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268 malign-
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269 Target RejectNegative Joined
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270 Specify alignment of structure fields default/natural
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271
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272 mprioritize-restricted-insns=
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273 Target RejectNegative Joined UInteger Var(rs6000_sched_restricted_insns_priority)
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274 Specify scheduling priority for dispatch slot restricted insns
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275
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276 msingle-float
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277 Target RejectNegative Var(rs6000_single_float)
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278 Single-precision floating point unit
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279
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280 mdouble-float
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281 Target RejectNegative Var(rs6000_double_float)
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282 Double-precision floating point unit
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283
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284 msimple-fpu
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285 Target RejectNegative Var(rs6000_simple_fpu)
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286 Floating point unit does not support divide & sqrt
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287
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288 mfpu=
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289 Target RejectNegative Joined
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290 -mfpu= Specify FP (sp, dp, sp-lite, dp-lite) (implies -mxilinx-fpu)
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291
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292 mxilinx-fpu
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293 Target Var(rs6000_xilinx_fpu)
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294 Specify Xilinx FPU.
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295
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296
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