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comparison gcc/config/i386/driver-i386.c @ 67:f6334be47118

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update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
author nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
date Tue, 22 Mar 2011 17:18:12 +0900
parents b7f97abdc517
children 04ced10e8804
comparison
equal deleted inserted replaced
65:65488c3d617d 67:f6334be47118
1 /* Subroutines for the gcc driver. 1 /* Subroutines for the gcc driver.
2 Copyright (C) 2006, 2007, 2008 Free Software Foundation, Inc. 2 Copyright (C) 2006, 2007, 2008, 2010 Free Software Foundation, Inc.
3 3
4 This file is part of GCC. 4 This file is part of GCC.
5 5
6 GCC is free software; you can redistribute it and/or modify 6 GCC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by 7 it under the terms of the GNU General Public License as published by
19 19
20 #include "config.h" 20 #include "config.h"
21 #include "system.h" 21 #include "system.h"
22 #include "coretypes.h" 22 #include "coretypes.h"
23 #include "tm.h" 23 #include "tm.h"
24 #include <stdlib.h>
25 24
26 const char *host_detect_local_cpu (int argc, const char **argv); 25 const char *host_detect_local_cpu (int argc, const char **argv);
27 26
28 #ifdef __GNUC__ 27 #ifdef __GNUC__
29 #include "cpuid.h" 28 #include "cpuid.h"
395 unsigned int has_longmode = 0, has_3dnowp = 0, has_3dnow = 0; 394 unsigned int has_longmode = 0, has_3dnowp = 0, has_3dnow = 0;
396 unsigned int has_movbe = 0, has_sse4_1 = 0, has_sse4_2 = 0; 395 unsigned int has_movbe = 0, has_sse4_1 = 0, has_sse4_2 = 0;
397 unsigned int has_popcnt = 0, has_aes = 0, has_avx = 0; 396 unsigned int has_popcnt = 0, has_aes = 0, has_avx = 0;
398 unsigned int has_pclmul = 0, has_abm = 0, has_lwp = 0; 397 unsigned int has_pclmul = 0, has_abm = 0, has_lwp = 0;
399 unsigned int has_fma4 = 0, has_xop = 0; 398 unsigned int has_fma4 = 0, has_xop = 0;
399 unsigned int has_bmi = 0, has_tbm = 0;
400 400
401 bool arch; 401 bool arch;
402 402
403 unsigned int l2sizekb = 0; 403 unsigned int l2sizekb = 0;
404 404
461 has_sse4a = ecx & bit_SSE4a; 461 has_sse4a = ecx & bit_SSE4a;
462 has_abm = ecx & bit_ABM; 462 has_abm = ecx & bit_ABM;
463 has_lwp = ecx & bit_LWP; 463 has_lwp = ecx & bit_LWP;
464 has_fma4 = ecx & bit_FMA4; 464 has_fma4 = ecx & bit_FMA4;
465 has_xop = ecx & bit_XOP; 465 has_xop = ecx & bit_XOP;
466 has_tbm = ecx & bit_TBM;
466 467
467 has_longmode = edx & bit_LM; 468 has_longmode = edx & bit_LM;
468 has_3dnowp = edx & bit_3DNOWP; 469 has_3dnowp = edx & bit_3DNOWP;
469 has_3dnow = edx & bit_3DNOW; 470 has_3dnow = edx & bit_3DNOW;
471
472 __cpuid (0x7, eax, ebx, ecx, edx);
473
474 has_bmi = ebx & bit_BMI;
470 } 475 }
471 476
472 if (!arch) 477 if (!arch)
473 { 478 {
474 if (vendor == SIG_AMD) 479 if (vendor == SIG_AMD)
493 498
494 if (name == SIG_GEODE) 499 if (name == SIG_GEODE)
495 processor = PROCESSOR_GEODE; 500 processor = PROCESSOR_GEODE;
496 else if (has_xop) 501 else if (has_xop)
497 processor = PROCESSOR_BDVER1; 502 processor = PROCESSOR_BDVER1;
503 else if (has_sse4a && has_ssse3)
504 processor = PROCESSOR_BTVER1;
498 else if (has_sse4a) 505 else if (has_sse4a)
499 processor = PROCESSOR_AMDFAM10; 506 processor = PROCESSOR_AMDFAM10;
500 else if (has_sse2 || has_longmode) 507 else if (has_sse2 || has_longmode)
501 processor = PROCESSOR_K8; 508 processor = PROCESSOR_K8;
502 else if (has_3dnowp) 509 else if (has_3dnowp)
552 break; 559 break;
553 case 0x1a: 560 case 0x1a:
554 case 0x1e: 561 case 0x1e:
555 case 0x1f: 562 case 0x1f:
556 case 0x2e: 563 case 0x2e:
557 /* FIXME: Optimize for Nehalem. */ 564 /* Nehalem. */
558 cpu = "core2"; 565 cpu = "corei7";
559 break; 566 break;
560 case 0x25: 567 case 0x25:
568 case 0x2c:
561 case 0x2f: 569 case 0x2f:
562 /* FIXME: Optimize for Westmere. */ 570 /* Westmere. */
563 cpu = "core2"; 571 cpu = "corei7";
572 break;
573 case 0x2a:
574 /* Sandy Bridge. */
575 cpu = "corei7-avx";
564 break; 576 break;
565 case 0x17: 577 case 0x17:
566 case 0x1d: 578 case 0x1d:
567 /* Penryn. FIXME: -mtune=core2 is slower than -mtune=generic */ 579 /* Penryn. */
568 cpu = "core2"; 580 cpu = "core2";
569 break; 581 break;
570 case 0x0f: 582 case 0x0f:
571 /* Merom. FIXME: -mtune=core2 is slower than -mtune=generic */ 583 /* Merom. */
572 cpu = "core2"; 584 cpu = "core2";
573 break; 585 break;
574 default: 586 default:
575 if (arch) 587 if (arch)
576 { 588 {
635 cpu = "amdfam10"; 647 cpu = "amdfam10";
636 break; 648 break;
637 case PROCESSOR_BDVER1: 649 case PROCESSOR_BDVER1:
638 cpu = "bdver1"; 650 cpu = "bdver1";
639 break; 651 break;
652 case PROCESSOR_BTVER1:
653 cpu = "btver1";
654 break;
640 655
641 default: 656 default:
642 /* Use something reasonable. */ 657 /* Use something reasonable. */
643 if (arch) 658 if (arch)
644 { 659 {
684 options = concat (options, " -mlwp", NULL); 699 options = concat (options, " -mlwp", NULL);
685 if (has_fma4) 700 if (has_fma4)
686 options = concat (options, " -mfma4", NULL); 701 options = concat (options, " -mfma4", NULL);
687 if (has_xop) 702 if (has_xop)
688 options = concat (options, " -mxop", NULL); 703 options = concat (options, " -mxop", NULL);
704 if (has_bmi)
705 options = concat (options, " -mbmi", NULL);
706 if (has_tbm)
707 options = concat (options, " -mtbm", NULL);
689 708
690 if (has_avx) 709 if (has_avx)
691 options = concat (options, " -mavx", NULL); 710 options = concat (options, " -mavx", NULL);
692 else if (has_sse4_2) 711 else if (has_sse4_2)
693 options = concat (options, " -msse4.2", NULL); 712 options = concat (options, " -msse4.2", NULL);