comparison gcc/config/score/score.h @ 67:f6334be47118

update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
author nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
date Tue, 22 Mar 2011 17:18:12 +0900
parents 77e2b8dfacca
children
comparison
equal deleted inserted replaced
65:65488c3d617d 67:f6334be47118
1 /* score.h for Sunplus S+CORE processor 1 /* score.h for Sunplus S+CORE processor
2 Copyright (C) 2005, 2007, 2008, 2009 Free Software Foundation, Inc. 2 Copyright (C) 2005, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
3 Contributed by Sunnorth. 3 Contributed by Sunnorth.
4 4
5 This file is part of GCC. 5 This file is part of GCC.
6 6
7 GCC is free software; you can redistribute it and/or modify it 7 GCC is free software; you can redistribute it and/or modify it
18 along with GCC; see the file COPYING3. If not see 18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */ 19 <http://www.gnu.org/licenses/>. */
20 20
21 #include "score-conv.h" 21 #include "score-conv.h"
22 22
23 /* Controlling the Compilation Driver. */
24 #undef SWITCH_TAKES_ARG
25 #define SWITCH_TAKES_ARG(CHAR) \
26 (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')
27
28 #undef CPP_SPEC
29 #define CPP_SPEC "%{mscore3:-D__score3__} %{G*}"
30
31 #undef CC1_SPEC 23 #undef CC1_SPEC
32 #define CC1_SPEC "%{!mel:-meb} %{mel:-mel } \ 24 #define CC1_SPEC "%{!mel:-meb} %{mel:-mel } \
33 %{!mscore*:-mscore7} \ 25 %{!mscore*:-mscore7} \
34 %{mscore3:-mscore3} \
35 %{mscore3d:-mscore3d} \
36 %{mscore7:-mscore7} \ 26 %{mscore7:-mscore7} \
37 %{mscore7d:-mscore7d} \ 27 %{mscore7d:-mscore7d} \
38 %{G*}" 28 %{G*}"
39 29
40 #undef ASM_SPEC 30 #undef ASM_SPEC
41 #define ASM_SPEC "%{!mel:-EB} %{mel:-EL} \ 31 #define ASM_SPEC "%{!mel:-EB} %{mel:-EL} \
42 %{!mscore*:-march=score7} \ 32 %{!mscore*:-march=score7} \
43 %{mscore7:-march=score7} \ 33 %{mscore7:-march=score7} \
44 %{mscore7d:-march=score7} \ 34 %{mscore7d:-march=score7} \
45 %{mscore3:-march=score3} \
46 %{mscore3d:-march=score3} \
47 %{march=score5:-march=score7} \
48 %{march=score5u:-march=score7} \
49 %{march=score7:-march=score7} \ 35 %{march=score7:-march=score7} \
50 %{march=score7d:-march=score7} \ 36 %{march=score7d:-march=score7} \
51 %{march=score3:-march=score3} \
52 %{march=score3d:-march=score3} \
53 %{G*}" 37 %{G*}"
54 38
55 #undef LINK_SPEC 39 #undef LINK_SPEC
56 #define LINK_SPEC "%{!mel:-EB} %{mel:-EL} \ 40 #define LINK_SPEC "%{!mel:-EB} %{mel:-EL} \
57 %{!mscore*:-mscore7_elf} \ 41 %{!mscore*:-mscore7_elf} \
58 %{mscore7:-mscore7_elf} \ 42 %{mscore7:-mscore7_elf} \
59 %{mscore7d:-mscore7_elf} \ 43 %{mscore7d:-mscore7_elf} \
60 %{mscore3:-mscore3_elf} \
61 %{mscore3d:-mscore3_elf} \
62 %{march=score5:-mscore7_elf} \
63 %{march=score5u:-mscore7_elf} \
64 %{march=score7:-mscore7_elf} \ 44 %{march=score7:-mscore7_elf} \
65 %{march=score7d:-mscore7_elf} \ 45 %{march=score7d:-mscore7_elf} \
66 %{march=score3:-mscore3_elf} \
67 %{march=score3d:-mscore3_elf} \
68 %{G*}" 46 %{G*}"
69 47
70 /* Run-time Target Specification. */ 48 /* Run-time Target Specification. */
71 #define TARGET_CPU_CPP_BUILTINS() \ 49 #define TARGET_CPU_CPP_BUILTINS() \
72 do { \ 50 do { \
75 builtin_define ("__score__"); \ 53 builtin_define ("__score__"); \
76 if (TARGET_LITTLE_ENDIAN) \ 54 if (TARGET_LITTLE_ENDIAN) \
77 builtin_define ("__scorele__"); \ 55 builtin_define ("__scorele__"); \
78 else \ 56 else \
79 builtin_define ("__scorebe__"); \ 57 builtin_define ("__scorebe__"); \
80 if (TARGET_SCORE5) \
81 builtin_define ("__score5__"); \
82 if (TARGET_SCORE5U) \
83 builtin_define ("__score5u__"); \
84 if (TARGET_SCORE7) \ 58 if (TARGET_SCORE7) \
85 builtin_define ("__score7__"); \ 59 builtin_define ("__score7__"); \
86 if (TARGET_SCORE7D) \ 60 if (TARGET_SCORE7D) \
87 builtin_define ("__score7d__"); \ 61 builtin_define ("__score7d__"); \
88 if (TARGET_SCORE3) \
89 builtin_define ("__score3__"); \
90 if (TARGET_SCORE3D) \
91 builtin_define ("__score3d__"); \
92 } while (0) 62 } while (0)
93 63
94 #define TARGET_DEFAULT 0 64 #define TARGET_DEFAULT 0
95 65
96 #define SCORE_GCC_VERSION "1.6" 66 #define SCORE_GCC_VERSION "1.6"
97 67
98 #define TARGET_VERSION \ 68 #define TARGET_VERSION \
99 fprintf (stderr, "Sunplus S+core rev=%s", SCORE_GCC_VERSION); 69 fprintf (stderr, "Sunplus S+core rev=%s", SCORE_GCC_VERSION);
100
101 #define OVERRIDE_OPTIONS score_override_options ()
102
103 /* Show we can debug even without a frame pointer. */
104 #define CAN_DEBUG_WITHOUT_FP
105 70
106 /* Target machine storage layout. */ 71 /* Target machine storage layout. */
107 #define BITS_BIG_ENDIAN 0 72 #define BITS_BIG_ENDIAN 0
108 #define BYTES_BIG_ENDIAN (TARGET_LITTLE_ENDIAN == 0) 73 #define BYTES_BIG_ENDIAN (TARGET_LITTLE_ENDIAN == 0)
109 #define WORDS_BIG_ENDIAN (TARGET_LITTLE_ENDIAN == 0) 74 #define WORDS_BIG_ENDIAN (TARGET_LITTLE_ENDIAN == 0)
110
111 /* Define this to set the endianness to use in libgcc2.c, which can
112 not depend on target_flags. */
113 #if defined(__scorele__)
114 #define LIBGCC2_WORDS_BIG_ENDIAN 0
115 #else
116 #define LIBGCC2_WORDS_BIG_ENDIAN 1
117 #endif
118 75
119 /* Width of a word, in units (bytes). */ 76 /* Width of a word, in units (bytes). */
120 #define UNITS_PER_WORD 4 77 #define UNITS_PER_WORD 4
121 78
122 /* Define this macro if it is advisable to hold scalars in registers 79 /* Define this macro if it is advisable to hold scalars in registers
233 pointer (r28) and the stack pointer (r0). This can change 190 pointer (r28) and the stack pointer (r0). This can change
234 depending on the command-line options. 191 depending on the command-line options.
235 192
236 Regarding coprocessor registers: without evidence to the contrary, 193 Regarding coprocessor registers: without evidence to the contrary,
237 it's best to assume that each coprocessor register has a unique 194 it's best to assume that each coprocessor register has a unique
238 use. This can be overridden, in, e.g., override_options() or 195 use. This can be overridden, in, e.g., TARGET_OPTION_OVERRIDE or
239 CONDITIONAL_REGISTER_USAGE should the assumption be inappropriate 196 TARGET_CONDITIONAL_REGISTER_USAGE should the assumption be inappropriate
240 for a particular target. */ 197 for a particular target. */
241 198
242 /* Control Registers, use mfcr/mtcr insn 199 /* Control Registers, use mfcr/mtcr insn
243 32 cr0 PSR 200 32 cr0 PSR
244 33 cr1 Condition 201 33 cr1 Condition
320 128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143, \ 277 128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143, \
321 144,145,146,147,148,149,150,151,152,153,154,155,156,157,158,159 } 278 144,145,146,147,148,149,150,151,152,153,154,155,156,157,158,159 }
322 279
323 /* Macro to conditionally modify fixed_regs/call_used_regs. */ 280 /* Macro to conditionally modify fixed_regs/call_used_regs. */
324 #define PIC_OFFSET_TABLE_REGNUM 29 281 #define PIC_OFFSET_TABLE_REGNUM 29
325
326 #define CONDITIONAL_REGISTER_USAGE \
327 { \
328 if (!flag_pic) \
329 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = \
330 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 0; \
331 }
332 282
333 #define HARD_REGNO_NREGS(REGNO, MODE) \ 283 #define HARD_REGNO_NREGS(REGNO, MODE) \
334 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 284 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
335 285
336 /* Return true if REGNO is suitable for holding a quantity of type MODE. */ 286 /* Return true if REGNO is suitable for holding a quantity of type MODE. */
436 386
437 /* A C expression whose value is a register class containing hard 387 /* A C expression whose value is a register class containing hard
438 register REGNO. In general there is more that one such class; 388 register REGNO. In general there is more that one such class;
439 choose a class which is "minimal", meaning that no smaller class 389 choose a class which is "minimal", meaning that no smaller class
440 also contains the register. */ 390 also contains the register. */
441 #define REGNO_REG_CLASS(REGNO) score_reg_class (REGNO) 391 #define REGNO_REG_CLASS(REGNO) (enum reg_class) score_reg_class (REGNO)
442 392
443 /* The following macro defines cover classes for Integrated Register 393 /* The following macro defines cover classes for Integrated Register
444 Allocator. Cover classes is a set of non-intersected register 394 Allocator. Cover classes is a set of non-intersected register
445 classes covering all hard registers used for register allocation 395 classes covering all hard registers used for register allocation
446 purpose. Any move between two registers of a cover class should be 396 purpose. Any move between two registers of a cover class should be
489 439
490 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ 440 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
491 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \ 441 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
492 ? reg_classes_intersect_p (HI_REG, (CLASS)) : 0) 442 ? reg_classes_intersect_p (HI_REG, (CLASS)) : 0)
493 443
494 /* The letters I, J, K, L, M, N, O, and P in a register constraint
495 string can be used to stand for particular ranges of immediate
496 operands. This macro defines what the ranges are. C is the
497 letter, and VALUE is a constant value. Return 1 if VALUE is
498 in the range specified by C. */
499 #define CONST_OK_FOR_LETTER_P(VALUE, C) score_const_ok_for_letter_p (VALUE, C)
500
501 /* Similar, but for floating constants, and defining letters G and H.
502 Here VALUE is the CONST_DOUBLE rtx itself. */
503
504 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
505 ((C) == 'G' && (VALUE) == CONST0_RTX (GET_MODE (VALUE)))
506
507 /* Letters in the range `Q' through `U' may be defined in a
508 machine-dependent fashion to stand for arbitrary operand types.
509 The machine description macro `EXTRA_CONSTRAINT' is passed the
510 operand as its first argument and the constraint letter as its
511 second operand. */
512 #define EXTRA_CONSTRAINT(VALUE, C) score_extra_constraint (VALUE, C)
513 444
514 /* Basic Stack Layout. */ 445 /* Basic Stack Layout. */
515 /* Stack layout; function entry, exit and calling. */ 446 /* Stack layout; function entry, exit and calling. */
516 #define STACK_GROWS_DOWNWARD 447 #define STACK_GROWS_DOWNWARD
517 448
537 #define EH_RETURN_DATA_REGNO(N) \ 468 #define EH_RETURN_DATA_REGNO(N) \
538 ((N) < 4 ? (N) + ARG_REG_FIRST : INVALID_REGNUM) 469 ((N) < 4 ? (N) + ARG_REG_FIRST : INVALID_REGNUM)
539 470
540 /* The register that holds the return address in exception handlers. */ 471 /* The register that holds the return address in exception handlers. */
541 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, EH_REGNUM) 472 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, EH_REGNUM)
473 #define EH_RETURN_HANDLER_RTX gen_rtx_REG (SImode, 30)
542 474
543 /* Registers That Address the Stack Frame. */ 475 /* Registers That Address the Stack Frame. */
544 /* Register to use for pushing function arguments. */ 476 /* Register to use for pushing function arguments. */
545 #define STACK_POINTER_REGNUM SP_REGNUM 477 #define STACK_POINTER_REGNUM SP_REGNUM
546 478
579 If `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect 511 If `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect
580 of this macro is to determine whether the space is included in 512 of this macro is to determine whether the space is included in
581 `crtl->outgoing_args_size'. */ 513 `crtl->outgoing_args_size'. */
582 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1 514 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
583 515
584 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
585
586 /* Passing Arguments in Registers */ 516 /* Passing Arguments in Registers */
587 /* Determine where to put an argument to a function.
588 Value is zero to push the argument on the stack,
589 or a hard register in which to store the argument.
590
591 MODE is the argument's machine mode.
592 TYPE is the data type of the argument (as a tree).
593 This is null for libcalls where that information may
594 not be available.
595 CUM is a variable of type CUMULATIVE_ARGS which gives info about
596 the preceding args and about the function being called.
597 NAMED is nonzero if this argument is a named parameter
598 (otherwise it is an extra parameter matching an ellipsis). */
599 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
600 score_function_arg (&CUM, MODE, TYPE, NAMED)
601
602 /* A C type for declaring a variable that is used as the first argument of 517 /* A C type for declaring a variable that is used as the first argument of
603 `FUNCTION_ARG' and other related values. For some target machines, the 518 `FUNCTION_ARG' and other related values. For some target machines, the
604 type `int' suffices and can hold the number of bytes of argument so far. */ 519 type `int' suffices and can hold the number of bytes of argument so far. */
605 typedef struct score_args 520 typedef struct score_args
606 { 521 {
614 /* Initialize a variable CUM of type CUMULATIVE_ARGS 529 /* Initialize a variable CUM of type CUMULATIVE_ARGS
615 for a call to a function whose data type is FNTYPE. 530 for a call to a function whose data type is FNTYPE.
616 For a library call, FNTYPE is 0. */ 531 For a library call, FNTYPE is 0. */
617 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, n_named_args) \ 532 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, n_named_args) \
618 score_init_cumulative_args (&CUM, FNTYPE, LIBNAME) 533 score_init_cumulative_args (&CUM, FNTYPE, LIBNAME)
619
620 /* Update the data in CUM to advance over an argument
621 of mode MODE and data type TYPE.
622 (TYPE is null for libcalls where that information may not be available.) */
623 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
624 score_function_arg_advance (&CUM, MODE, TYPE, NAMED)
625 534
626 /* 1 if N is a possible register number for function argument passing. 535 /* 1 if N is a possible register number for function argument passing.
627 We have no FP argument registers when soft-float. When FP registers 536 We have no FP argument registers when soft-float. When FP registers
628 are 32 bits, we can't directly reference the odd numbered ones. */ 537 are 32 bits, we can't directly reference the odd numbered ones. */
629 #define FUNCTION_ARG_REGNO_P(REGNO) \ 538 #define FUNCTION_ARG_REGNO_P(REGNO) \
658 if (TARGET_SCORE7) \ 567 if (TARGET_SCORE7) \
659 { \ 568 { \
660 fprintf (FILE, " .set r1 \n"); \ 569 fprintf (FILE, " .set r1 \n"); \
661 fprintf (FILE, " mv r%d,r%d \n", AT_REGNUM, RA_REGNUM); \ 570 fprintf (FILE, " mv r%d,r%d \n", AT_REGNUM, RA_REGNUM); \
662 fprintf (FILE, " subi r%d, %d \n", STACK_POINTER_REGNUM, 8); \ 571 fprintf (FILE, " subi r%d, %d \n", STACK_POINTER_REGNUM, 8); \
663 fprintf (FILE, " jl _mcount \n"); \
664 fprintf (FILE, " .set nor1 \n"); \
665 } \
666 else if (TARGET_SCORE3) \
667 { \
668 fprintf (FILE, " .set r1 \n"); \
669 fprintf (FILE, " mv! r%d,r%d \n", AT_REGNUM, RA_REGNUM); \
670 fprintf (FILE, " addi! r%d, %d \n", STACK_POINTER_REGNUM, -8);\
671 fprintf (FILE, " jl _mcount \n"); \ 572 fprintf (FILE, " jl _mcount \n"); \
672 fprintf (FILE, " .set nor1 \n"); \ 573 fprintf (FILE, " .set nor1 \n"); \
673 } \ 574 } \
674 } while (0) 575 } while (0)
675 576
871 do { \ 772 do { \
872 if (TARGET_SCORE7) \ 773 if (TARGET_SCORE7) \
873 fprintf (STREAM, "\tpush! %s,[%s]\n", \ 774 fprintf (STREAM, "\tpush! %s,[%s]\n", \
874 reg_names[REGNO], \ 775 reg_names[REGNO], \
875 reg_names[STACK_POINTER_REGNUM]); \ 776 reg_names[STACK_POINTER_REGNUM]); \
876 else if (TARGET_SCORE3) \
877 fprintf (STREAM, "\tpush!\t%s\n", \
878 reg_names[REGNO]); \
879 } while (0) 777 } while (0)
880 778
881 /* This is how to output an insn to pop a register from the stack. */ 779 /* This is how to output an insn to pop a register from the stack. */
882 #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \ 780 #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \
883 do { \ 781 do { \
884 if (TARGET_SCORE7) \ 782 if (TARGET_SCORE7) \
885 fprintf (STREAM, "\tpop! %s,[%s]\n", \ 783 fprintf (STREAM, "\tpop! %s,[%s]\n", \
886 reg_names[REGNO], \ 784 reg_names[REGNO], \
887 reg_names[STACK_POINTER_REGNUM]); \ 785 reg_names[STACK_POINTER_REGNUM]); \
888 else if (TARGET_SCORE3) \
889 fprintf (STREAM, "\tpop!\t%s\n", \
890 reg_names[REGNO]); \
891 } while (0) 786 } while (0)
892 787
893 /* Output of Dispatch Tables. */ 788 /* Output of Dispatch Tables. */
894 /* This is how to output an element of a case-vector. We can make the 789 /* This is how to output an element of a case-vector. We can make the
895 entries PC-relative in GP-relative when .gp(d)word is supported. */ 790 entries PC-relative in GP-relative when .gp(d)word is supported. */
898 if (TARGET_SCORE7) \ 793 if (TARGET_SCORE7) \
899 if (flag_pic) \ 794 if (flag_pic) \
900 fprintf (STREAM, "\t.gpword %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \ 795 fprintf (STREAM, "\t.gpword %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \
901 else \ 796 else \
902 fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \ 797 fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \
903 else if (TARGET_SCORE3) \
904 { \
905 switch (GET_MODE(BODY)) \
906 { \
907 case QImode: /* TBB */ \
908 asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d_tbb)/2\n", \
909 VALUE, REL); \
910 break; \
911 case HImode: /* TBH */ \
912 asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d_tbb)/2\n", \
913 VALUE, REL); \
914 break; \
915 case SImode: \
916 if (flag_pic) \
917 fprintf (STREAM, "\t.gpword %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \
918 else \
919 fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \
920 break; \
921 default: \
922 gcc_unreachable(); \
923 } \
924 } \
925 } while (0) 798 } while (0)
926 799
927 /* Jump table alignment is explicit in ASM_OUTPUT_CASE_LABEL. */ 800 /* Jump table alignment is explicit in ASM_OUTPUT_CASE_LABEL. */
928 #define ADDR_VEC_ALIGN(JUMPTABLE) (GET_MODE (PATTERN (JUMPTABLE)) == SImode ? 2 \ 801 #define ADDR_VEC_ALIGN(JUMPTABLE) (GET_MODE (PATTERN (JUMPTABLE)) == SImode ? 2 \
929 : GET_MODE (PATTERN (JUMPTABLE)) == HImode ? 1 : 0) 802 : GET_MODE (PATTERN (JUMPTABLE)) == HImode ? 1 : 0)
940 813
941 /* Specify the machine mode that this machine uses 814 /* Specify the machine mode that this machine uses
942 for the index in the tablejump instruction. */ 815 for the index in the tablejump instruction. */
943 #define CASE_VECTOR_MODE SImode 816 #define CASE_VECTOR_MODE SImode
944 817
945 #define CASE_VECTOR_PC_RELATIVE (TARGET_SCORE3)
946
947 #define CASE_VECTOR_SHORTEN_MODE(min, max, body) \
948 ((min < 0 || max >= 0x2000 || TARGET_SCORE7) ? SImode \
949 : (max >= 0x200) ? HImode \
950 : QImode)
951
952 /* This is how to output an element of a case-vector that is absolute. */ 818 /* This is how to output an element of a case-vector that is absolute. */
953 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \ 819 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
954 fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE) 820 fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE)
955 821
956 /* Assembler Commands for Exception Regions */ 822 /* Assembler Commands for Exception Regions */