Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/score/score.h @ 67:f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
author | nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp> |
---|---|
date | Tue, 22 Mar 2011 17:18:12 +0900 |
parents | 77e2b8dfacca |
children |
rev | line source |
---|---|
0 | 1 /* score.h for Sunplus S+CORE processor |
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
2 Copyright (C) 2005, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. |
0 | 3 Contributed by Sunnorth. |
4 | |
5 This file is part of GCC. | |
6 | |
7 GCC is free software; you can redistribute it and/or modify it | |
8 under the terms of the GNU General Public License as published | |
9 by the Free Software Foundation; either version 3, or (at your | |
10 option) any later version. | |
11 | |
12 GCC is distributed in the hope that it will be useful, but WITHOUT | |
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
15 License for more details. | |
16 | |
17 You should have received a copy of the GNU General Public License | |
18 along with GCC; see the file COPYING3. If not see | |
19 <http://www.gnu.org/licenses/>. */ | |
20 | |
21 #include "score-conv.h" | |
22 | |
23 #undef CC1_SPEC | |
24 #define CC1_SPEC "%{!mel:-meb} %{mel:-mel } \ | |
25 %{!mscore*:-mscore7} \ | |
26 %{mscore7:-mscore7} \ | |
27 %{mscore7d:-mscore7d} \ | |
28 %{G*}" | |
29 | |
30 #undef ASM_SPEC | |
31 #define ASM_SPEC "%{!mel:-EB} %{mel:-EL} \ | |
32 %{!mscore*:-march=score7} \ | |
33 %{mscore7:-march=score7} \ | |
34 %{mscore7d:-march=score7} \ | |
35 %{march=score7:-march=score7} \ | |
36 %{march=score7d:-march=score7} \ | |
37 %{G*}" | |
38 | |
39 #undef LINK_SPEC | |
40 #define LINK_SPEC "%{!mel:-EB} %{mel:-EL} \ | |
41 %{!mscore*:-mscore7_elf} \ | |
42 %{mscore7:-mscore7_elf} \ | |
43 %{mscore7d:-mscore7_elf} \ | |
44 %{march=score7:-mscore7_elf} \ | |
45 %{march=score7d:-mscore7_elf} \ | |
46 %{G*}" | |
47 | |
48 /* Run-time Target Specification. */ | |
49 #define TARGET_CPU_CPP_BUILTINS() \ | |
50 do { \ | |
51 builtin_define ("SUNPLUS"); \ | |
52 builtin_define ("__SCORE__"); \ | |
53 builtin_define ("__score__"); \ | |
54 if (TARGET_LITTLE_ENDIAN) \ | |
55 builtin_define ("__scorele__"); \ | |
56 else \ | |
57 builtin_define ("__scorebe__"); \ | |
58 if (TARGET_SCORE7) \ | |
59 builtin_define ("__score7__"); \ | |
60 if (TARGET_SCORE7D) \ | |
61 builtin_define ("__score7d__"); \ | |
62 } while (0) | |
63 | |
64 #define TARGET_DEFAULT 0 | |
65 | |
66 #define SCORE_GCC_VERSION "1.6" | |
67 | |
68 #define TARGET_VERSION \ | |
69 fprintf (stderr, "Sunplus S+core rev=%s", SCORE_GCC_VERSION); | |
70 | |
71 /* Target machine storage layout. */ | |
72 #define BITS_BIG_ENDIAN 0 | |
73 #define BYTES_BIG_ENDIAN (TARGET_LITTLE_ENDIAN == 0) | |
74 #define WORDS_BIG_ENDIAN (TARGET_LITTLE_ENDIAN == 0) | |
75 | |
76 /* Width of a word, in units (bytes). */ | |
77 #define UNITS_PER_WORD 4 | |
78 | |
79 /* Define this macro if it is advisable to hold scalars in registers | |
80 in a wider mode than that declared by the program. In such cases, | |
81 the value is constrained to be within the bounds of the declared | |
82 type, but kept valid in the wider mode. The signedness of the | |
83 extension may differ from that of the type. */ | |
84 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ | |
85 if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
86 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ | |
87 (MODE) = SImode; | |
88 | |
89 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
90 #define PARM_BOUNDARY BITS_PER_WORD | |
91 #define STACK_BOUNDARY BITS_PER_WORD | |
92 | |
93 /* Allocation boundary (in *bits*) for the code of a function. */ | |
94 #define FUNCTION_BOUNDARY BITS_PER_WORD | |
95 | |
96 /* There is no point aligning anything to a rounder boundary than this. */ | |
97 #define BIGGEST_ALIGNMENT LONG_DOUBLE_TYPE_SIZE | |
98 | |
99 /* If defined, a C expression to compute the alignment for a static | |
100 variable. TYPE is the data type, and ALIGN is the alignment that | |
101 the object would ordinarily have. The value of this macro is used | |
102 instead of that alignment to align the object. | |
103 | |
104 If this macro is not defined, then ALIGN is used. | |
105 | |
106 One use of this macro is to increase alignment of medium-size | |
107 data to make it all fit in fewer cache lines. Another is to | |
108 cause character arrays to be word-aligned so that `strcpy' calls | |
109 that copy constants to character arrays can be done inline. */ | |
110 #define DATA_ALIGNMENT(TYPE, ALIGN) \ | |
111 ((((ALIGN) < BITS_PER_WORD) \ | |
112 && (TREE_CODE (TYPE) == ARRAY_TYPE \ | |
113 || TREE_CODE (TYPE) == UNION_TYPE \ | |
114 || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN)) | |
115 | |
116 /* If defined, a C expression to compute the alignment given to a | |
117 constant that is being placed in memory. EXP is the constant | |
118 and ALIGN is the alignment that the object would ordinarily have. | |
119 The value of this macro is used instead of that alignment to align | |
120 the object. | |
121 | |
122 If this macro is not defined, then ALIGN is used. | |
123 | |
124 The typical use of this macro is to increase alignment for string | |
125 constants to be word aligned so that `strcpy' calls that copy | |
126 constants can be done inline. */ | |
127 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ | |
128 ((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR) \ | |
129 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
130 | |
131 /* If defined, a C expression to compute the alignment for a local | |
132 variable. TYPE is the data type, and ALIGN is the alignment that | |
133 the object would ordinarily have. The value of this macro is used | |
134 instead of that alignment to align the object. | |
135 | |
136 If this macro is not defined, then ALIGN is used. | |
137 | |
138 One use of this macro is to increase alignment of medium-size | |
139 data to make it all fit in fewer cache lines. */ | |
140 #define LOCAL_ALIGNMENT(TYPE, ALIGN) \ | |
141 ((TREE_CODE (TYPE) == ARRAY_TYPE \ | |
142 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ | |
143 && (ALIGN) < BITS_PER_WORD) ? BITS_PER_WORD : (ALIGN)) | |
144 | |
145 /* Alignment of field after `int : 0' in a structure. */ | |
146 #define EMPTY_FIELD_BOUNDARY 32 | |
147 | |
148 /* All accesses must be aligned. */ | |
149 #define STRICT_ALIGNMENT 1 | |
150 | |
151 /* Score requires that structure alignment is affected by bitfields. */ | |
152 #define PCC_BITFIELD_TYPE_MATTERS 1 | |
153 | |
154 /* long double is not a fixed mode, but the idea is that, if we | |
155 support long double, we also want a 128-bit integer type. */ | |
156 #define MAX_FIXED_MODE_SIZE LONG_DOUBLE_TYPE_SIZE | |
157 | |
158 /* Layout of Data Type. */ | |
159 /* Set the sizes of the core types. */ | |
160 #define INT_TYPE_SIZE 32 | |
161 #define SHORT_TYPE_SIZE 16 | |
162 #define LONG_TYPE_SIZE 32 | |
163 #define LONG_LONG_TYPE_SIZE 64 | |
164 #define CHAR_TYPE_SIZE 8 | |
165 #define FLOAT_TYPE_SIZE 32 | |
166 #define DOUBLE_TYPE_SIZE 64 | |
167 #define LONG_DOUBLE_TYPE_SIZE 64 | |
168 | |
169 /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
170 #undef DEFAULT_SIGNED_CHAR | |
171 #define DEFAULT_SIGNED_CHAR 1 | |
172 | |
173 /* Default definitions for size_t and ptrdiff_t. */ | |
174 #define SIZE_TYPE "unsigned int" | |
175 | |
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
176 #define UINTPTR_TYPE "long unsigned int" |
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
177 |
0 | 178 /* Register Usage |
179 | |
180 S+core have: | |
181 - 32 integer registers | |
182 - 16 control registers (cond) | |
183 - 16 special registers (ceh/cel/cnt/lcr/scr/arg/fp) | |
184 - 32 coprocessors 1 registers | |
185 - 32 coprocessors 2 registers | |
186 - 32 coprocessors 3 registers. */ | |
187 #define FIRST_PSEUDO_REGISTER 160 | |
188 | |
189 /* By default, fix the kernel registers (r30 and r31), the global | |
190 pointer (r28) and the stack pointer (r0). This can change | |
191 depending on the command-line options. | |
192 | |
193 Regarding coprocessor registers: without evidence to the contrary, | |
194 it's best to assume that each coprocessor register has a unique | |
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
195 use. This can be overridden, in, e.g., TARGET_OPTION_OVERRIDE or |
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
196 TARGET_CONDITIONAL_REGISTER_USAGE should the assumption be inappropriate |
0 | 197 for a particular target. */ |
198 | |
199 /* Control Registers, use mfcr/mtcr insn | |
200 32 cr0 PSR | |
201 33 cr1 Condition | |
202 34 cr2 ECR | |
203 35 cr3 EXCPVec | |
204 36 cr4 CCR | |
205 37 cr5 EPC | |
206 38 cr6 EMA | |
207 39 cr7 TLBLock | |
208 40 cr8 TLBPT | |
209 41 cr8 PEADDR | |
210 42 cr10 TLBRPT | |
211 43 cr11 PEVN | |
212 44 cr12 PECTX | |
213 45 cr13 | |
214 46 cr14 | |
215 47 cr15 | |
216 | |
217 Custom Engine Register, use mfce/mtce | |
218 48 CEH CEH | |
219 49 CEL CEL | |
220 | |
221 Special-Purpose Register, use mfsr/mtsr | |
222 50 sr0 CNT | |
223 51 sr1 LCR | |
224 52 sr2 SCR | |
225 | |
226 53 ARG_POINTER_REGNUM | |
227 54 FRAME_POINTER_REGNUM | |
228 but Control register have 32 registers, cr16-cr31. */ | |
229 #define FIXED_REGISTERS \ | |
230 { \ | |
231 /* General Purpose Registers */ \ | |
232 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
233 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, \ | |
234 /* Control Registers */ \ | |
235 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
236 /* CEH/ CEL/ CNT/ LCR/ SCR / ARG_POINTER_REGNUM/ FRAME_POINTER_REGNUM */\ | |
237 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
238 /* CP 1 Registers */ \ | |
239 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
240 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
241 /* CP 2 Registers */ \ | |
242 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
243 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
244 /* CP 3 Registers */ \ | |
245 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
246 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
247 } | |
248 | |
249 #define CALL_USED_REGISTERS \ | |
250 { \ | |
251 /* General purpose register */ \ | |
252 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, \ | |
253 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
254 /* Control Registers */ \ | |
255 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
256 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
257 /* CP 1 Registers */ \ | |
258 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
259 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
260 /* CP 2 Registers */ \ | |
261 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
262 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
263 /* CP 3 Registers */ \ | |
264 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
265 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
266 } | |
267 | |
268 #define REG_ALLOC_ORDER \ | |
269 { 0, 1, 6, 7, 8, 9, 10, 11, 4, 5, 22, 23, 24, 25, 26, 27, \ | |
270 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 28, 29, 30, 31, 2, 3, \ | |
271 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \ | |
272 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, \ | |
273 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \ | |
274 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, \ | |
275 96, 97, 98, 99,100,101,102,103,104,105,106,107,108,109,110,111, \ | |
276 112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127, \ | |
277 128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143, \ | |
278 144,145,146,147,148,149,150,151,152,153,154,155,156,157,158,159 } | |
279 | |
280 /* Macro to conditionally modify fixed_regs/call_used_regs. */ | |
281 #define PIC_OFFSET_TABLE_REGNUM 29 | |
282 | |
283 #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
284 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
285 | |
286 /* Return true if REGNO is suitable for holding a quantity of type MODE. */ | |
287 #define HARD_REGNO_MODE_OK(REGNO, MODE) score_hard_regno_mode_ok (REGNO, MODE) | |
288 | |
289 /* Value is 1 if it is a good idea to tie two pseudo registers | |
290 when one has mode MODE1 and one has mode MODE2. | |
291 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
292 for any hard reg, then this must be 0 for correct output. */ | |
293 #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
294 ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \ | |
295 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \ | |
296 == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \ | |
297 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT)) | |
298 | |
299 /* Register Classes. */ | |
300 /* Define the classes of registers for register constraints in the | |
301 machine description. Also define ranges of constants. */ | |
302 enum reg_class | |
303 { | |
304 NO_REGS, | |
305 G16_REGS, /* r0 ~ r15 */ | |
306 G32_REGS, /* r0 ~ r31 */ | |
307 T32_REGS, /* r8 ~ r11 | r22 ~ r27 */ | |
308 | |
309 HI_REG, /* hi */ | |
310 LO_REG, /* lo */ | |
311 CE_REGS, /* hi + lo */ | |
312 | |
313 CN_REG, /* cnt */ | |
314 LC_REG, /* lcb */ | |
315 SC_REG, /* scb */ | |
316 SP_REGS, /* cnt + lcb + scb */ | |
317 | |
318 CR_REGS, /* cr0 - cr15 */ | |
319 | |
320 CP1_REGS, /* cp1 */ | |
321 CP2_REGS, /* cp2 */ | |
322 CP3_REGS, /* cp3 */ | |
323 CPA_REGS, /* cp1 + cp2 + cp3 */ | |
324 | |
325 ALL_REGS, | |
326 LIM_REG_CLASSES | |
327 }; | |
328 | |
329 #define N_REG_CLASSES ((int) LIM_REG_CLASSES) | |
330 | |
331 #define GENERAL_REGS G32_REGS | |
332 | |
333 /* Give names of register classes as strings for dump file. */ | |
334 #define REG_CLASS_NAMES \ | |
335 { \ | |
336 "NO_REGS", \ | |
337 "G16_REGS", \ | |
338 "G32_REGS", \ | |
339 "T32_REGS", \ | |
340 \ | |
341 "HI_REG", \ | |
342 "LO_REG", \ | |
343 "CE_REGS", \ | |
344 \ | |
345 "CN_REG", \ | |
346 "LC_REG", \ | |
347 "SC_REG", \ | |
348 "SP_REGS", \ | |
349 \ | |
350 "CR_REGS", \ | |
351 \ | |
352 "CP1_REGS", \ | |
353 "CP2_REGS", \ | |
354 "CP3_REGS", \ | |
355 "CPA_REGS", \ | |
356 \ | |
357 "ALL_REGS", \ | |
358 } | |
359 | |
360 /* Define which registers fit in which classes. */ | |
361 #define REG_CLASS_CONTENTS \ | |
362 { \ | |
363 /* NO_REGS/G16/G32/T32 */ \ | |
364 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, \ | |
365 { 0x0000ffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, \ | |
366 { 0xffffffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, \ | |
367 { 0x0fc00f00, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, \ | |
368 /* HI/LO/CE */ \ | |
369 { 0x00000000, 0x00010000, 0x00000000, 0x00000000, 0x00000000}, \ | |
370 { 0x00000000, 0x00020000, 0x00000000, 0x00000000, 0x00000000}, \ | |
371 { 0x00000000, 0x00030000, 0x00000000, 0x00000000, 0x00000000}, \ | |
372 /* CN/LC/SC/SP/CR */ \ | |
373 { 0x00000000, 0x00040000, 0x00000000, 0x00000000, 0x00000000}, \ | |
374 { 0x00000000, 0x00080000, 0x00000000, 0x00000000, 0x00000000}, \ | |
375 { 0x00000000, 0x00100000, 0x00000000, 0x00000000, 0x00000000}, \ | |
376 { 0x00000000, 0x001c0000, 0x00000000, 0x00000000, 0x00000000}, \ | |
377 { 0x00000000, 0x0000ffff, 0x00000000, 0x00000000, 0x00000000}, \ | |
378 /* CP1/CP2/CP3/CPA */ \ | |
379 { 0x00000000, 0x00000000, 0xffffffff, 0x00000000, 0x00000000}, \ | |
380 { 0x00000000, 0x00000000, 0x00000000, 0xffffffff, 0x00000000}, \ | |
381 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffffff}, \ | |
382 { 0x00000000, 0x00000000, 0xffffffff, 0xffffffff, 0xffffffff}, \ | |
383 /* ALL_REGS */ \ | |
384 { 0xffffffff, 0x001fffff, 0xffffffff, 0xffffffff, 0xffffffff}, \ | |
385 } | |
386 | |
387 /* A C expression whose value is a register class containing hard | |
388 register REGNO. In general there is more that one such class; | |
389 choose a class which is "minimal", meaning that no smaller class | |
390 also contains the register. */ | |
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
391 #define REGNO_REG_CLASS(REGNO) (enum reg_class) score_reg_class (REGNO) |
0 | 392 |
393 /* The following macro defines cover classes for Integrated Register | |
394 Allocator. Cover classes is a set of non-intersected register | |
395 classes covering all hard registers used for register allocation | |
396 purpose. Any move between two registers of a cover class should be | |
397 cheaper than load or store of the registers. The macro value is | |
398 array of register classes with LIM_REG_CLASSES used as the end | |
399 marker. */ | |
400 #define IRA_COVER_CLASSES \ | |
401 { \ | |
402 G32_REGS, CE_REGS, SP_REGS, LIM_REG_CLASSES \ | |
403 } | |
404 | |
405 /* A macro whose definition is the name of the class to which a | |
406 valid base register must belong. A base register is one used in | |
407 an address which is the register value plus a displacement. */ | |
408 #define BASE_REG_CLASS G16_REGS | |
409 | |
410 /* The class value for index registers. */ | |
411 #define INDEX_REG_CLASS NO_REGS | |
412 | |
413 extern enum reg_class score_char_to_class[256]; | |
414 #define REG_CLASS_FROM_LETTER(C) score_char_to_class[(unsigned char) (C)] | |
415 | |
416 /* Addressing modes, and classification of registers for them. */ | |
417 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) \ | |
418 score_regno_mode_ok_for_base_p (REGNO, 1) | |
419 | |
420 #define REGNO_OK_FOR_INDEX_P(NUM) 0 | |
421 | |
422 #define PREFERRED_RELOAD_CLASS(X, CLASS) \ | |
423 score_preferred_reload_class (X, CLASS) | |
424 | |
425 /* If we need to load shorts byte-at-a-time, then we need a scratch. */ | |
426 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \ | |
427 score_secondary_reload_class (CLASS, MODE, X) | |
428 | |
429 /* Return the register class of a scratch register needed to copy IN into | |
430 or out of a register in CLASS in MODE. If it can be done directly, | |
431 NO_REGS is returned. */ | |
432 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \ | |
433 score_secondary_reload_class (CLASS, MODE, X) | |
434 | |
435 /* Return the maximum number of consecutive registers | |
436 needed to represent mode MODE in a register of class CLASS. */ | |
437 #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
438 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
439 | |
440 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ | |
441 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \ | |
442 ? reg_classes_intersect_p (HI_REG, (CLASS)) : 0) | |
443 | |
444 | |
445 /* Basic Stack Layout. */ | |
446 /* Stack layout; function entry, exit and calling. */ | |
447 #define STACK_GROWS_DOWNWARD | |
448 | |
449 #define STACK_PUSH_CODE PRE_DEC | |
450 #define STACK_POP_CODE POST_INC | |
451 | |
452 /* The offset of the first local variable from the beginning of the frame. | |
453 See compute_frame_size for details about the frame layout. */ | |
454 #define STARTING_FRAME_OFFSET crtl->outgoing_args_size | |
455 | |
456 /* The argument pointer always points to the first argument. */ | |
457 #define FIRST_PARM_OFFSET(FUNDECL) 0 | |
458 | |
459 /* A C expression whose value is RTL representing the value of the return | |
460 address for the frame COUNT steps up from the current frame. */ | |
461 #define RETURN_ADDR_RTX(count, frame) score_return_addr (count, frame) | |
462 | |
463 /* Pick up the return address upon entry to a procedure. */ | |
464 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, RA_REGNUM) | |
465 | |
466 /* Exception handling Support. */ | |
467 /* Use r0 to r3 to pass exception handling information. */ | |
468 #define EH_RETURN_DATA_REGNO(N) \ | |
469 ((N) < 4 ? (N) + ARG_REG_FIRST : INVALID_REGNUM) | |
470 | |
471 /* The register that holds the return address in exception handlers. */ | |
472 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, EH_REGNUM) | |
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
473 #define EH_RETURN_HANDLER_RTX gen_rtx_REG (SImode, 30) |
0 | 474 |
475 /* Registers That Address the Stack Frame. */ | |
476 /* Register to use for pushing function arguments. */ | |
477 #define STACK_POINTER_REGNUM SP_REGNUM | |
478 | |
479 /* These two registers don't really exist: they get eliminated to either | |
480 the stack or hard frame pointer. */ | |
481 #define FRAME_POINTER_REGNUM 53 | |
482 | |
483 /* we use r2 as the frame pointer. */ | |
484 #define HARD_FRAME_POINTER_REGNUM FP_REGNUM | |
485 | |
486 #define ARG_POINTER_REGNUM 54 | |
487 | |
488 /* Register in which static-chain is passed to a function. */ | |
489 #define STATIC_CHAIN_REGNUM 23 | |
490 | |
491 /* Elimination Frame Pointer and Arg Pointer */ | |
492 | |
493 #define ELIMINABLE_REGS \ | |
494 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
495 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ | |
496 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
497 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} | |
498 | |
499 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
500 (OFFSET) = score_initial_elimination_offset ((FROM), (TO)) | |
501 | |
502 /* Passing Function Arguments on the Stack. */ | |
503 /* Allocate stack space for arguments at the beginning of each function. */ | |
504 #define ACCUMULATE_OUTGOING_ARGS 1 | |
505 | |
506 /* reserve stack space for all argument registers. */ | |
507 #define REG_PARM_STACK_SPACE(FNDECL) UNITS_PER_WORD | |
508 | |
509 /* Define this if it is the responsibility of the caller to | |
510 allocate the area reserved for arguments passed in registers. | |
511 If `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect | |
512 of this macro is to determine whether the space is included in | |
513 `crtl->outgoing_args_size'. */ | |
514 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1 | |
515 | |
516 /* Passing Arguments in Registers */ | |
517 /* A C type for declaring a variable that is used as the first argument of | |
518 `FUNCTION_ARG' and other related values. For some target machines, the | |
519 type `int' suffices and can hold the number of bytes of argument so far. */ | |
520 typedef struct score_args | |
521 { | |
522 unsigned int arg_number; /* how many arguments have been seen */ | |
523 unsigned int num_gprs; /* number of gprs in use */ | |
524 unsigned int stack_words; /* number of words in stack */ | |
525 } score_args_t; | |
526 | |
527 #define CUMULATIVE_ARGS score_args_t | |
528 | |
529 /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
530 for a call to a function whose data type is FNTYPE. | |
531 For a library call, FNTYPE is 0. */ | |
532 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, n_named_args) \ | |
533 score_init_cumulative_args (&CUM, FNTYPE, LIBNAME) | |
534 | |
535 /* 1 if N is a possible register number for function argument passing. | |
536 We have no FP argument registers when soft-float. When FP registers | |
537 are 32 bits, we can't directly reference the odd numbered ones. */ | |
538 #define FUNCTION_ARG_REGNO_P(REGNO) \ | |
539 REG_CONTAIN (REGNO, ARG_REG_FIRST, ARG_REG_NUM) | |
540 | |
541 /* How Scalar Function Values Are Returned. */ | |
542 #define FUNCTION_VALUE(VALTYPE, FUNC) \ | |
543 score_function_value ((VALTYPE), (FUNC), VOIDmode) | |
544 | |
545 #define LIBCALL_VALUE(MODE) score_function_value (NULL_TREE, NULL, (MODE)) | |
546 | |
547 /* 1 if N is a possible register number for a function value. */ | |
548 #define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == (ARG_REG_FIRST)) | |
549 | |
550 #define PIC_FUNCTION_ADDR_REGNUM (GP_REG_FIRST + 25) | |
551 | |
552 /* How Large Values Are Returned. */ | |
553 #define STRUCT_VALUE 0 | |
554 | |
555 /* Function Entry and Exit */ | |
556 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
557 the stack pointer does not matter. The value is tested only in | |
558 functions that have frame pointers. | |
559 No definition is equivalent to always zero. */ | |
560 #define EXIT_IGNORE_STACK 1 | |
561 | |
562 /* Generating Code for Profiling */ | |
563 /* Output assembler code to FILE to increment profiler label # LABELNO | |
564 for profiling a function entry. */ | |
565 #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
566 do { \ | |
567 if (TARGET_SCORE7) \ | |
568 { \ | |
569 fprintf (FILE, " .set r1 \n"); \ | |
570 fprintf (FILE, " mv r%d,r%d \n", AT_REGNUM, RA_REGNUM); \ | |
571 fprintf (FILE, " subi r%d, %d \n", STACK_POINTER_REGNUM, 8); \ | |
572 fprintf (FILE, " jl _mcount \n"); \ | |
573 fprintf (FILE, " .set nor1 \n"); \ | |
574 } \ | |
575 } while (0) | |
576 | |
577 /* Trampolines for Nested Functions. */ | |
578 #define TRAMPOLINE_INSNS 6 | |
579 | |
580 /* A C expression for the size in bytes of the trampoline, as an integer. */ | |
581 #define TRAMPOLINE_SIZE (24 + GET_MODE_SIZE (ptr_mode) * 2) | |
582 | |
583 #define HAVE_PRE_INCREMENT 1 | |
584 #define HAVE_PRE_DECREMENT 1 | |
585 #define HAVE_POST_INCREMENT 1 | |
586 #define HAVE_POST_DECREMENT 1 | |
587 #define HAVE_PRE_MODIFY_DISP 1 | |
588 #define HAVE_POST_MODIFY_DISP 1 | |
589 #define HAVE_PRE_MODIFY_REG 0 | |
590 #define HAVE_POST_MODIFY_REG 0 | |
591 | |
592 /* Maximum number of registers that can appear in a valid memory address. */ | |
593 #define MAX_REGS_PER_ADDRESS 1 | |
594 | |
595 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
596 and check its validity for a certain class. | |
597 We have two alternate definitions for each of them. | |
598 The usual definition accepts all pseudo regs; the other rejects them all. | |
599 The symbol REG_OK_STRICT causes the latter definition to be used. | |
600 | |
601 Most source files want to accept pseudo regs in the hope that | |
602 they will get allocated to the class that the insn wants them to be in. | |
603 Some source files that are used after register allocation | |
604 need to be strict. */ | |
605 #ifndef REG_OK_STRICT | |
606 #define REG_MODE_OK_FOR_BASE_P(X, MODE) \ | |
607 score_regno_mode_ok_for_base_p (REGNO (X), 0) | |
608 #else | |
609 #define REG_MODE_OK_FOR_BASE_P(X, MODE) \ | |
610 score_regno_mode_ok_for_base_p (REGNO (X), 1) | |
611 #endif | |
612 | |
613 #define REG_OK_FOR_INDEX_P(X) 0 | |
614 | |
615 #define LEGITIMATE_CONSTANT_P(X) 1 | |
616 | |
617 /* Condition Code Status. */ | |
618 #define SELECT_CC_MODE(OP, X, Y) score_select_cc_mode (OP, X, Y) | |
619 | |
620 /* Return nonzero if SELECT_CC_MODE will never return MODE for a | |
621 floating point inequality comparison. */ | |
622 #define REVERSIBLE_CC_MODE(MODE) 1 | |
623 | |
624 /* Describing Relative Costs of Operations */ | |
625 /* Compute extra cost of moving data between one register class and another. */ | |
626 #define REGISTER_MOVE_COST(MODE, FROM, TO) \ | |
627 score_register_move_cost (MODE, FROM, TO) | |
628 | |
629 /* Moves to and from memory are quite expensive */ | |
630 #define MEMORY_MOVE_COST(MODE, CLASS, TO_P) \ | |
631 (4 + memory_move_secondary_cost ((MODE), (CLASS), (TO_P))) | |
632 | |
633 /* Try to generate sequences that don't involve branches. */ | |
634 #define BRANCH_COST(speed_p, predictable_p) 2 | |
635 | |
636 /* Nonzero if access to memory by bytes is slow and undesirable. */ | |
637 #define SLOW_BYTE_ACCESS 1 | |
638 | |
639 /* Define this macro if it is as good or better to call a constant | |
640 function address than to call an address kept in a register. */ | |
641 #define NO_FUNCTION_CSE 1 | |
642 | |
643 /* Dividing the Output into Sections (Texts, Data, ...). */ | |
644 /* Define the strings to put out for each section in the object file. */ | |
645 #define TEXT_SECTION_ASM_OP "\t.text" | |
646 #define DATA_SECTION_ASM_OP "\t.data" | |
647 #define SDATA_SECTION_ASM_OP "\t.sdata" | |
648 | |
649 #undef READONLY_DATA_SECTION_ASM_OP | |
650 #define READONLY_DATA_SECTION_ASM_OP "\t.rdata" | |
651 | |
652 /* The Overall Framework of an Assembler File */ | |
653 /* How to start an assembler comment. | |
654 The leading space is important. */ | |
655 #define ASM_COMMENT_START "#" | |
656 | |
657 /* Output to assembler file text saying following lines | |
658 may contain character constants, extra white space, comments, etc. */ | |
659 #define ASM_APP_ON "#APP\n\t.set volatile\n" | |
660 | |
661 /* Output to assembler file text saying following lines | |
662 no longer contain unusual constructs. */ | |
663 #define ASM_APP_OFF "#NO_APP\n\t.set optimize\n" | |
664 | |
665 /* Output of Uninitialized Variables. */ | |
666 /* This says how to define a global common symbol. */ | |
667 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \ | |
668 do { \ | |
669 fputs ("\n\t.comm\t", STREAM); \ | |
670 assemble_name (STREAM, NAME); \ | |
671 fprintf (STREAM, " , " HOST_WIDE_INT_PRINT_UNSIGNED ", %u\n", \ | |
672 SIZE, ALIGN / BITS_PER_UNIT); \ | |
673 } while (0) | |
674 | |
675 /* This says how to define a local common symbol (i.e., not visible to | |
676 linker). */ | |
677 #undef ASM_OUTPUT_ALIGNED_LOCAL | |
678 #define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN) \ | |
679 do { \ | |
680 fputs ("\n\t.lcomm\t", STREAM); \ | |
681 assemble_name (STREAM, NAME); \ | |
682 fprintf (STREAM, " , " HOST_WIDE_INT_PRINT_UNSIGNED ", %u\n", \ | |
683 SIZE, ALIGN / BITS_PER_UNIT); \ | |
684 } while (0) | |
685 | |
686 /* Globalizing directive for a label. */ | |
687 #define GLOBAL_ASM_OP "\t.globl\t" | |
688 | |
689 /* Output and Generation of Labels */ | |
690 /* This is how to declare a function name. The actual work of | |
691 emitting the label is moved to function_prologue, so that we can | |
692 get the line number correctly emitted before the .ent directive, | |
693 and after any .file directives. Define as empty so that the function | |
694 is not declared before the .ent directive elsewhere. */ | |
695 #undef ASM_DECLARE_FUNCTION_NAME | |
696 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) | |
697 | |
698 #undef ASM_DECLARE_OBJECT_NAME | |
699 #define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL) \ | |
700 do { \ | |
701 assemble_name (STREAM, NAME); \ | |
702 fprintf (STREAM, ":\n"); \ | |
703 } while (0) | |
704 | |
705 /* This says how to output an external. It would be possible not to | |
706 output anything and let undefined symbol become external. However | |
707 the assembler uses length information on externals to allocate in | |
708 data/sdata bss/sbss, thereby saving exec time. */ | |
709 #undef ASM_OUTPUT_EXTERNAL | |
710 #define ASM_OUTPUT_EXTERNAL(STREAM, DECL, NAME) \ | |
711 score_output_external (STREAM, DECL, NAME) | |
712 | |
713 /* This handles the magic '..CURRENT_FUNCTION' symbol, which means | |
714 'the start of the function that this code is output in'. */ | |
715 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \ | |
716 fprintf ((STREAM), "%s", (NAME)) | |
717 | |
718 /* Local compiler-generated symbols must have a prefix that the assembler | |
719 understands. */ | |
720 #define LOCAL_LABEL_PREFIX (TARGET_SCORE7 ? "." : "$") | |
721 | |
722 #undef ASM_GENERATE_INTERNAL_LABEL | |
723 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \ | |
724 sprintf ((LABEL), "*%s%s%ld", (LOCAL_LABEL_PREFIX), (PREFIX), (long) (NUM)) | |
725 | |
726 /* Output of Assembler Instructions. */ | |
727 #define REGISTER_NAMES \ | |
728 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ | |
729 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \ | |
730 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \ | |
731 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", \ | |
732 \ | |
733 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", \ | |
734 "cr8", "cr9", "cr10", "cr11", "cr12", "cr13", "cr14", "cr15", \ | |
735 \ | |
736 "ceh", "cel", "sr0", "sr1", "sr2", "_arg", "_frame", "", \ | |
737 "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31", \ | |
738 \ | |
739 "c1r0", "c1r1", "c1r2", "c1r3", "c1r4", "c1r5", "c1r6", "c1r7", \ | |
740 "c1r8", "c1r9", "c1r10", "c1r11", "c1r12", "c1r13", "c1r14", "c1r15", \ | |
741 "c1r16", "c1r17", "c1r18", "c1r19", "c1r20", "c1r21", "c1r22", "c1r23", \ | |
742 "c1r24", "c1r25", "c1r26", "c1r27", "c1r28", "c1r29", "c1r30", "c1r31", \ | |
743 \ | |
744 "c2r0", "c2r1", "c2r2", "c2r3", "c2r4", "c2r5", "c2r6", "c2r7", \ | |
745 "c2r8", "c2r9", "c2r10", "c2r11", "c2r12", "c2r13", "c2r14", "c2r15", \ | |
746 "c2r16", "c2r17", "c2r18", "c2r19", "c2r20", "c2r21", "c2r22", "c2r23", \ | |
747 "c2r24", "c2r25", "c2r26", "c2r27", "c2r28", "c2r29", "c2r30", "c2r31", \ | |
748 \ | |
749 "c3r0", "c3r1", "c3r2", "c3r3", "c3r4", "c3r5", "c3r6", "c3r7", \ | |
750 "c3r8", "c3r9", "c3r10", "c3r11", "c3r12", "c3r13", "c3r14", "c3r15", \ | |
751 "c3r16", "c3r17", "c3r18", "c3r19", "c3r20", "c3r21", "c3r22", "c3r23", \ | |
752 "c3r24", "c3r25", "c3r26", "c3r27", "c3r28", "c3r29", "c3r30", "c3r31", \ | |
753 } | |
754 | |
755 /* Print operand X (an rtx) in assembler syntax to file FILE. */ | |
756 #define PRINT_OPERAND(STREAM, X, CODE) score_print_operand (STREAM, X, CODE) | |
757 | |
758 /* A C expression which evaluates to true if CODE is a valid | |
759 punctuation character for use in the `PRINT_OPERAND' macro. */ | |
760 #define PRINT_OPERAND_PUNCT_VALID_P(C) ((C) == '[' || (C) == ']') | |
761 | |
762 /* Print a memory address as an operand to reference that memory location. */ | |
763 #define PRINT_OPERAND_ADDRESS(STREAM, X) \ | |
764 score_print_operand_address (STREAM, X) | |
765 | |
766 /* By default on the S+core, external symbols do not have an underscore | |
767 prepended. */ | |
768 #define USER_LABEL_PREFIX "" | |
769 | |
770 /* This is how to output an insn to push a register on the stack. */ | |
771 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \ | |
772 do { \ | |
773 if (TARGET_SCORE7) \ | |
774 fprintf (STREAM, "\tpush! %s,[%s]\n", \ | |
775 reg_names[REGNO], \ | |
776 reg_names[STACK_POINTER_REGNUM]); \ | |
777 } while (0) | |
778 | |
779 /* This is how to output an insn to pop a register from the stack. */ | |
780 #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \ | |
781 do { \ | |
782 if (TARGET_SCORE7) \ | |
783 fprintf (STREAM, "\tpop! %s,[%s]\n", \ | |
784 reg_names[REGNO], \ | |
785 reg_names[STACK_POINTER_REGNUM]); \ | |
786 } while (0) | |
787 | |
788 /* Output of Dispatch Tables. */ | |
789 /* This is how to output an element of a case-vector. We can make the | |
790 entries PC-relative in GP-relative when .gp(d)word is supported. */ | |
791 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \ | |
792 do { \ | |
793 if (TARGET_SCORE7) \ | |
794 if (flag_pic) \ | |
795 fprintf (STREAM, "\t.gpword %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \ | |
796 else \ | |
797 fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \ | |
798 } while (0) | |
799 | |
800 /* Jump table alignment is explicit in ASM_OUTPUT_CASE_LABEL. */ | |
801 #define ADDR_VEC_ALIGN(JUMPTABLE) (GET_MODE (PATTERN (JUMPTABLE)) == SImode ? 2 \ | |
802 : GET_MODE (PATTERN (JUMPTABLE)) == HImode ? 1 : 0) | |
803 | |
804 /* This is how to output a label which precedes a jumptable. Since | |
805 Score3 instructions are 2 bytes, we may need explicit alignment here. */ | |
806 #undef ASM_OUTPUT_CASE_LABEL | |
807 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, JUMPTABLE) \ | |
808 do { \ | |
809 if ((TARGET_SCORE7) && GET_MODE (PATTERN (JUMPTABLE)) == SImode) \ | |
810 ASM_OUTPUT_ALIGN (FILE, 2); \ | |
811 (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); \ | |
812 } while (0) | |
813 | |
814 /* Specify the machine mode that this machine uses | |
815 for the index in the tablejump instruction. */ | |
816 #define CASE_VECTOR_MODE SImode | |
817 | |
818 /* This is how to output an element of a case-vector that is absolute. */ | |
819 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \ | |
820 fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE) | |
821 | |
822 /* Assembler Commands for Exception Regions */ | |
823 /* Since the S+core is encoded in the least-significant bit | |
824 of the address, mask it off return addresses for purposes of | |
825 finding exception handling regions. */ | |
826 #define MASK_RETURN_ADDR constm1_rtx | |
827 | |
828 /* Assembler Commands for Alignment */ | |
829 /* This is how to output an assembler line to advance the location | |
830 counter by SIZE bytes. */ | |
831 #undef ASM_OUTPUT_SKIP | |
832 #define ASM_OUTPUT_SKIP(STREAM, SIZE) \ | |
833 fprintf (STREAM, "\t.space\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)) | |
834 | |
835 /* This is how to output an assembler line | |
836 that says to advance the location counter | |
837 to a multiple of 2**LOG bytes. */ | |
838 #define ASM_OUTPUT_ALIGN(STREAM, LOG) \ | |
839 fprintf (STREAM, "\t.align\t%d\n", (LOG)) | |
840 | |
841 /* Macros Affecting All Debugging Formats. */ | |
842 #ifndef PREFERRED_DEBUGGING_TYPE | |
843 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG | |
844 #endif | |
845 | |
846 /* Specific Options for DBX Output. */ | |
847 #define DBX_DEBUGGING_INFO 1 | |
848 | |
849 /* By default, turn on GDB extensions. */ | |
850 #define DEFAULT_GDB_EXTENSIONS 1 | |
851 | |
852 #define DBX_CONTIN_LENGTH 0 | |
853 | |
854 /* File Names in DBX Format. */ | |
855 #define DWARF2_DEBUGGING_INFO 1 | |
856 | |
857 /* The DWARF 2 CFA column which tracks the return address. */ | |
858 #define DWARF_FRAME_RETURN_COLUMN 3 | |
859 | |
860 /* Define if operations between registers always perform the operation | |
861 on the full register even if a narrower mode is specified. */ | |
862 #define WORD_REGISTER_OPERATIONS | |
863 | |
864 /* All references are zero extended. */ | |
865 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND | |
866 | |
867 /* Define if loading short immediate values into registers sign extends. */ | |
868 #define SHORT_IMMEDIATES_SIGN_EXTEND | |
869 | |
870 /* Max number of bytes we can move from memory to memory | |
871 in one reasonably fast instruction. */ | |
872 #define MOVE_MAX 4 | |
873 | |
874 /* Define this to be nonzero if shift instructions ignore all but the low-order | |
875 few bits. */ | |
876 #define SHIFT_COUNT_TRUNCATED 1 | |
877 | |
878 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits | |
879 is done just by pretending it is already truncated. */ | |
880 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
881 | |
882 /* Specify the machine mode that pointers have. | |
883 After generation of rtl, the compiler makes no further distinction | |
884 between pointers and any other objects of this machine mode. */ | |
885 #define Pmode SImode | |
886 | |
887 /* Give call MEMs SImode since it is the "most permissive" mode | |
888 for 32-bit targets. */ | |
889 #define FUNCTION_MODE Pmode | |
890 | |
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
891 struct GTY ((chain_next ("%h.next"))) extern_list |
0 | 892 { |
893 struct extern_list *next; /* next external */ | |
894 const char *name; /* name of the external */ | |
895 int size; /* size in bytes */ | |
896 }; | |
897 | |
898 extern GTY (()) struct extern_list *extern_head; |