--- a/gcc/config/rs6000/mpc.md	Sun Aug 21 07:07:55 2011 +0900
+++ b/gcc/config/rs6000/mpc.md	Fri Oct 27 22:46:09 2017 +0900
@@ -1,5 +1,5 @@
 ;; Scheduling description for Motorola PowerPC processor cores.
-;;   Copyright (C) 2003, 2004, 2007, 2009 Free Software Foundation, Inc.
+;;   Copyright (C) 2003-2017 Free Software Foundation, Inc.
 ;;
 ;; This file is part of GCC.
 ;;
@@ -26,24 +26,24 @@
 ;; 505/801/821/823
 
 (define_insn_reservation "mpccore-load" 2
-  (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,\
-			load_l,store_c,sync")
+  (and (eq_attr "type" "load,load_l,store_c,sync")
        (eq_attr "cpu" "mpccore"))
   "lsu_mpc")
 
 (define_insn_reservation "mpccore-store" 2
-  (and (eq_attr "type" "store,store_ux,store_u,fpstore,fpstore_ux,fpstore_u")
+  (and (eq_attr "type" "store,fpstore")
        (eq_attr "cpu" "mpccore"))
   "lsu_mpc")
 
 (define_insn_reservation "mpccore-fpload" 2
-  (and (eq_attr "type" "fpload,fpload_ux,fpload_u")
+  (and (eq_attr "type" "fpload")
        (eq_attr "cpu" "mpccore"))
   "lsu_mpc")
 
 (define_insn_reservation "mpccore-integer" 1
-  (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\
-                        var_shift_rotate,cntlz,exts,isel")
+  (and (ior (eq_attr "type" "integer,insert,trap,cntlz,isel")
+	    (and (eq_attr "type" "add,logical,shift,exts")
+		 (eq_attr "dot" "no")))
        (eq_attr "cpu" "mpccore"))
   "iu_mpc")
 
@@ -58,19 +58,20 @@
   "iu_mpc,iu_mpc,iu_mpc")
 
 (define_insn_reservation "mpccore-imul" 2
-  (and (eq_attr "type" "imul,imul2,imul3,imul_compare")
+  (and (eq_attr "type" "mul")
        (eq_attr "cpu" "mpccore"))
   "mciu_mpc")
 
 ; Divide latency varies greatly from 2-11, use 6 as average
 (define_insn_reservation "mpccore-idiv" 6
-  (and (eq_attr "type" "idiv")
+  (and (eq_attr "type" "div")
        (eq_attr "cpu" "mpccore"))
   "mciu_mpc*6")
 
 (define_insn_reservation "mpccore-compare" 3
-  (and (eq_attr "type" "cmp,fast_compare,compare,delayed_compare,\
-                        var_delayed_compare")
+  (and (ior (eq_attr "type" "cmp")
+	    (and (eq_attr "type" "add,logical,shift,exts")
+		 (eq_attr "dot" "yes")))
        (eq_attr "cpu" "mpccore"))
   "iu_mpc,nothing,bpu_mpc")
 
@@ -80,7 +81,7 @@
   "fpu_mpc,bpu_mpc")
 
 (define_insn_reservation "mpccore-fp" 4
-  (and (eq_attr "type" "fp")
+  (and (eq_attr "type" "fp,fpsimple")
        (eq_attr "cpu" "mpccore"))
   "fpu_mpc*2")