--- a/gcc/config/m68k/m68k.md	Fri Oct 27 22:46:09 2017 +0900
+++ b/gcc/config/m68k/m68k.md	Thu Oct 25 07:37:49 2018 +0900
@@ -1,5 +1,5 @@
 ;;- Machine description for GNU compiler, Motorola 68000 Version
-;;  Copyright (C) 1987-2017 Free Software Foundation, Inc.
+;;  Copyright (C) 1987-2018 Free Software Foundation, Inc.
 
 ;; This file is part of GCC.
 
@@ -3240,7 +3240,10 @@
 	  (const_int 32))))
    (clobber (match_operand:SI 1 "register_operand" "=d"))]
   "TARGET_68020 && !TUNE_68060 && !TARGET_COLDFIRE"
-  "mulu%.l %3,%0:%1")
+{
+  CC_STATUS_INIT;
+  return "mulu%.l %3,%0:%1";
+})
 
 (define_insn "const_umulsi3_highpart"
   [(set (match_operand:SI 0 "register_operand" "=d")
@@ -3251,7 +3254,10 @@
 	  (const_int 32))))
    (clobber (match_operand:SI 1 "register_operand" "=d"))]
   "TARGET_68020 && !TUNE_68060 && !TARGET_COLDFIRE"
-  "mulu%.l %3,%0:%1")
+{
+  CC_STATUS_INIT;
+  return "mulu%.l %3,%0:%1";
+})
 
 (define_expand "smulsi3_highpart"
   [(parallel
@@ -3283,7 +3289,10 @@
 	  (const_int 32))))
    (clobber (match_operand:SI 1 "register_operand" "=d"))]
   "TARGET_68020 && !TUNE_68060 && !TARGET_COLDFIRE"
-  "muls%.l %3,%0:%1")
+{
+  CC_STATUS_INIT;
+  return "muls%.l %3,%0:%1";
+})
 
 (define_insn "const_smulsi3_highpart"
   [(set (match_operand:SI 0 "register_operand" "=d")
@@ -3294,7 +3303,10 @@
 	  (const_int 32))))
    (clobber (match_operand:SI 1 "register_operand" "=d"))]
   "TARGET_68020 && !TUNE_68060 && !TARGET_COLDFIRE"
-  "muls%.l %3,%0:%1")
+{
+  CC_STATUS_INIT;
+  return "muls%.l %3,%0:%1";
+})
 
 (define_expand "mul<mode>3"
   [(set (match_operand:FP 0 "nonimmediate_operand" "")
@@ -4683,6 +4695,7 @@
   "!TARGET_COLDFIRE"
 {
   operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
+  CC_STATUS_INIT;
   return "asr%.l #1,%0\;roxr%.l #1,%1";
 })
 
@@ -4919,7 +4932,10 @@
 	(lshiftrt:DI (match_operand:DI 1 "register_operand" "0")
 		     (const_int 1)))]
   "!TARGET_COLDFIRE"
-  "lsr%.l #1,%0\;roxr%.l #1,%R0")
+{
+  CC_STATUS_INIT;
+  return "lsr%.l #1,%0\;roxr%.l #1,%R0";
+})
 
 (define_split
   [(set (match_operand:DI 0 "register_operand" "")