Mercurial > hg > CbC > CbC_gcc
diff gcc/config/arm/vfp.md @ 63:b7f97abdc517 gcc-4.6-20100522
update gcc from gcc-4.5.0 to gcc-4.6
| author | ryoma <e075725@ie.u-ryukyu.ac.jp> |
|---|---|
| date | Mon, 24 May 2010 12:47:05 +0900 |
| parents | 77e2b8dfacca |
| children | f6334be47118 |
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--- a/gcc/config/arm/vfp.md Fri Feb 12 23:41:23 2010 +0900 +++ b/gcc/config/arm/vfp.md Mon May 24 12:47:05 2010 +0900 @@ -86,9 +86,11 @@ (set_attr "neg_pool_range" "*,*,*,*,4084,*,*,*,*,1008,*")] ) +;; See thumb2.md:thumb2_movsi_insn for an explanation of the split +;; high/low register alternatives for loads and stores here. (define_insn "*thumb2_movsi_vfp" - [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,r,r,rk,m,*t,r, *t,*t, *Uv") - (match_operand:SI 1 "general_operand" "rk, I,K,j,mi,rk,r,*t,*t,*Uvi,*t"))] + [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,r,r, l,*hk,m, *m,*t, r,*t,*t, *Uv") + (match_operand:SI 1 "general_operand" "rk, I,K,j,mi,*mi,l,*hk, r,*t,*t,*Uvi,*t"))] "TARGET_THUMB2 && TARGET_VFP && TARGET_HARD_FLOAT && ( s_register_operand (operands[0], SImode) || s_register_operand (operands[1], SImode))" @@ -102,25 +104,27 @@ case 3: return \"movw%?\\t%0, %1\"; case 4: + case 5: return \"ldr%?\\t%0, %1\"; - case 5: + case 6: + case 7: return \"str%?\\t%1, %0\"; - case 6: + case 8: return \"fmsr%?\\t%0, %1\\t%@ int\"; - case 7: + case 9: return \"fmrs%?\\t%0, %1\\t%@ int\"; - case 8: + case 10: return \"fcpys%?\\t%0, %1\\t%@ int\"; - case 9: case 10: + case 11: case 12: return output_move_vfp (operands); default: gcc_unreachable (); } " [(set_attr "predicable" "yes") - (set_attr "type" "*,*,*,*,load1,store1,r_2_f,f_2_r,fcpys,f_load,f_store") - (set_attr "pool_range" "*,*,*,*,4096,*,*,*,*,1020,*") - (set_attr "neg_pool_range" "*,*,*,*, 0,*,*,*,*,1008,*")] + (set_attr "type" "*,*,*,*,load1,load1,store1,store1,r_2_f,f_2_r,fcpys,f_load,f_store") + (set_attr "pool_range" "*,*,*,*,1020,4096,*,*,*,*,*,1020,*") + (set_attr "neg_pool_range" "*,*,*,*, 0, 0,*,*,*,*,*,1008,*")] )