Mercurial > hg > CbC > CbC_gcc
diff gcc/config/arm/vec-common.md @ 67:f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
| author | nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp> |
|---|---|
| date | Tue, 22 Mar 2011 17:18:12 +0900 |
| parents | 77e2b8dfacca |
| children | 04ced10e8804 |
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--- a/gcc/config/arm/vec-common.md Tue May 25 18:58:51 2010 +0900 +++ b/gcc/config/arm/vec-common.md Tue Mar 22 17:18:12 2011 +0900 @@ -1,5 +1,5 @@ ;; Machine Description for shared bits common to IWMMXT and Neon. -;; Copyright (C) 2006, 2007 Free Software Foundation, Inc. +;; Copyright (C) 2006, 2007, 2010 Free Software Foundation, Inc. ;; Written by CodeSourcery. ;; ;; This file is part of GCC. @@ -20,18 +20,6 @@ ;; Vector Moves -;; All integer and float modes supported by Neon and IWMMXT. -(define_mode_iterator VALL [V2DI V2SI V4HI V8QI V2SF V4SI V8HI V16QI V4SF]) - -;; All integer and float modes supported by Neon and IWMMXT, except V2DI. -(define_mode_iterator VALLW [V2SI V4HI V8QI V2SF V4SI V8HI V16QI V4SF]) - -;; All integer modes supported by Neon and IWMMXT -(define_mode_iterator VINT [V2DI V2SI V4HI V8QI V4SI V8HI V16QI]) - -;; All integer modes supported by Neon and IWMMXT, except V2DI -(define_mode_iterator VINTW [V2SI V4HI V8QI V4SI V8HI V16QI]) - (define_expand "mov<mode>" [(set (match_operand:VALL 0 "nonimmediate_operand" "") (match_operand:VALL 1 "general_operand" ""))] @@ -57,7 +45,8 @@ [(set (match_operand:VALL 0 "s_register_operand" "") (plus:VALL (match_operand:VALL 1 "s_register_operand" "") (match_operand:VALL 2 "s_register_operand" "")))] - "TARGET_NEON + "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode) + || flag_unsafe_math_optimizations)) || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))" { }) @@ -66,7 +55,8 @@ [(set (match_operand:VALL 0 "s_register_operand" "") (minus:VALL (match_operand:VALL 1 "s_register_operand" "") (match_operand:VALL 2 "s_register_operand" "")))] - "TARGET_NEON + "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode) + || flag_unsafe_math_optimizations)) || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))" { }) @@ -75,7 +65,9 @@ [(set (match_operand:VALLW 0 "s_register_operand" "") (mult:VALLW (match_operand:VALLW 1 "s_register_operand" "") (match_operand:VALLW 2 "s_register_operand" "")))] - "TARGET_NEON || (<MODE>mode == V4HImode && TARGET_REALLY_IWMMXT)" + "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode) + || flag_unsafe_math_optimizations)) + || (<MODE>mode == V4HImode && TARGET_REALLY_IWMMXT)" { }) @@ -83,7 +75,8 @@ [(set (match_operand:VALLW 0 "s_register_operand" "") (smin:VALLW (match_operand:VALLW 1 "s_register_operand" "") (match_operand:VALLW 2 "s_register_operand" "")))] - "TARGET_NEON + "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode) + || flag_unsafe_math_optimizations)) || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))" { }) @@ -101,7 +94,8 @@ [(set (match_operand:VALLW 0 "s_register_operand" "") (smax:VALLW (match_operand:VALLW 1 "s_register_operand" "") (match_operand:VALLW 2 "s_register_operand" "")))] - "TARGET_NEON + "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode) + || flag_unsafe_math_optimizations)) || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))" { })