diff gcc/config/frv/frv.md @ 67:f6334be47118

update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
author nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
date Tue, 22 Mar 2011 17:18:12 +0900
parents 77e2b8dfacca
children 04ced10e8804
line wrap: on
line diff
--- a/gcc/config/frv/frv.md	Tue May 25 18:58:51 2010 +0900
+++ b/gcc/config/frv/frv.md	Tue Mar 22 17:18:12 2011 +0900
@@ -1,5 +1,5 @@
 ;; Frv Machine Description
-;; Copyright (C) 1999, 2000, 2001, 2003, 2004, 2005, 2007, 2008
+;; Copyright (C) 1999, 2000, 2001, 2003, 2004, 2005, 2007, 2008, 2010
 ;; Free Software Foundation, Inc.
 ;; Contributed by Red Hat, Inc.
 
@@ -345,7 +345,7 @@
 ;; enumeration in frv-protos.h.
 
 (define_attr "cpu" "generic,fr550,fr500,fr450,fr405,fr400,fr300,simple,tomcat"
-  (const (symbol_ref "frv_cpu_type")))
+  (const (symbol_ref "(enum attr_cpu) frv_cpu_type")))
 
 ;; Attribute is "yes" for branches and jumps that span too great a distance
 ;; to be implemented in the most natural way.  Such instructions will use
@@ -360,7 +360,7 @@
   (const_string "unknown"))
 
 (define_attr "acc_group" "none,even,odd"
-  (symbol_ref "frv_acc_group (insn)"))
+  (symbol_ref "(enum attr_acc_group) frv_acc_group (insn)"))
 
 ;; Scheduling and Packing Overview
 ;; -------------------------------
@@ -1519,6 +1519,7 @@
 ;;
 
 (include "predicates.md")
+(include "constraints.md")
 
 ;; ::::::::::::::::::::
 ;; ::
@@ -1895,10 +1896,8 @@
     }
   else
     {
-      operands[4] = GEN_INT ((((unsigned HOST_WIDE_INT)INTVAL (op1) >> 16)
-			      >> 16) ^ ((unsigned HOST_WIDE_INT)1 << 31)
-			     - ((unsigned HOST_WIDE_INT)1 << 31));
-      operands[5] = GEN_INT (trunc_int_for_mode (INTVAL (op1), SImode));
+      operands[4] = gen_int_mode ((INTVAL (op1) >> 16) >> 16, SImode);
+      operands[5] = gen_int_mode (INTVAL (op1), SImode);
     }
 }")
 
@@ -3276,21 +3275,21 @@
    (set_attr "type" "fsmul")])
 
 ;; Multiplication with addition/subtraction
-(define_insn "*muladdsf4"
+(define_insn "fmasf4"
   [(set (match_operand:SF 0 "fpr_operand" "=f")
-	(plus:SF (mult:SF (match_operand:SF 1 "fpr_operand" "%f")
-			  (match_operand:SF 2 "fpr_operand" "f"))
-		 (match_operand:SF 3 "fpr_operand" "0")))]
+	(fma:SF (match_operand:SF 1 "fpr_operand" "f")
+		(match_operand:SF 2 "fpr_operand" "f")
+		(match_operand:SF 3 "fpr_operand" "0")))]
   "TARGET_HARD_FLOAT && TARGET_MULADD"
   "fmadds %1,%2,%0"
   [(set_attr "length" "4")
    (set_attr "type" "fsmadd")])
 
-(define_insn "*mulsubsf4"
+(define_insn "fmssf4"
   [(set (match_operand:SF 0 "fpr_operand" "=f")
-	(minus:SF (mult:SF (match_operand:SF 1 "fpr_operand" "%f")
-			   (match_operand:SF 2 "fpr_operand" "f"))
-		  (match_operand:SF 3 "fpr_operand" "0")))]
+	(fma:SF (match_operand:SF 1 "fpr_operand" "f")
+		(match_operand:SF 2 "fpr_operand" "f")
+		(neg:SF (match_operand:SF 3 "fpr_operand" "0"))))]
   "TARGET_HARD_FLOAT && TARGET_MULADD"
   "fmsubs %1,%2,%0"
   [(set_attr "length" "4")
@@ -4630,8 +4629,8 @@
    (clobber (match_operand:CC_CCR 5 "icr_operand" "=v,v,v,v,v"))]
   "(INTVAL (operands[3]) == 0
     || INTVAL (operands[4]) == 0
-    || (IN_RANGE_P (INTVAL (operands[3]), -2048, 2047)
-        && IN_RANGE_P (INTVAL (operands[4]) - INTVAL (operands[3]), -2048, 2047)))"
+    || (IN_RANGE (INTVAL (operands[3]), -2048, 2047)
+        && IN_RANGE (INTVAL (operands[4]) - INTVAL (operands[3]), -2048, 2047)))"
   "#"
   [(set_attr "length" "8,12,8,12,12")
    (set_attr "type" "multi")])
@@ -4647,8 +4646,8 @@
   "TARGET_HARD_FLOAT
    && (INTVAL (operands[3]) == 0
        || INTVAL (operands[4]) == 0
-       || (IN_RANGE_P (INTVAL (operands[3]), -2048, 2047)
-	   && IN_RANGE_P (INTVAL (operands[4]) - INTVAL (operands[3]), -2048, 2047)))"
+       || (IN_RANGE (INTVAL (operands[3]), -2048, 2047)
+	   && IN_RANGE (INTVAL (operands[4]) - INTVAL (operands[3]), -2048, 2047)))"
   "#"
   [(set_attr "length" "8,12,8,12,12")
    (set_attr "type" "multi")])
@@ -4715,8 +4714,8 @@
    (clobber (match_operand:CC_CCR 5 "icr_operand" "=v,v,v,v,v"))]
   "(INTVAL (operands[3]) == 0
     || INTVAL (operands[4]) == 0
-    || (IN_RANGE_P (INTVAL (operands[3]), -2048, 2047)
-        && IN_RANGE_P (INTVAL (operands[4]) - INTVAL (operands[3]), -2048, 2047)))"
+    || (IN_RANGE (INTVAL (operands[3]), -2048, 2047)
+        && IN_RANGE (INTVAL (operands[4]) - INTVAL (operands[3]), -2048, 2047)))"
   "#"
   [(set_attr "length" "8,12,8,12,12")
    (set_attr "type" "multi")])
@@ -4732,8 +4731,8 @@
   "TARGET_HARD_FLOAT
    && (INTVAL (operands[3]) == 0
        || INTVAL (operands[4]) == 0
-       || (IN_RANGE_P (INTVAL (operands[3]), -2048, 2047)
-	   && IN_RANGE_P (INTVAL (operands[4]) - INTVAL (operands[3]), -2048, 2047)))"
+       || (IN_RANGE (INTVAL (operands[3]), -2048, 2047)
+	   && IN_RANGE (INTVAL (operands[4]) - INTVAL (operands[3]), -2048, 2047)))"
   "#"
   [(set_attr "length" "8,12,8,12,12")
    (set_attr "type" "multi")])
@@ -4800,8 +4799,8 @@
    (clobber (match_operand:CC_CCR 5 "icr_operand" "=v,v,v,v,v"))]
   "(INTVAL (operands[3]) == 0
     || INTVAL (operands[4]) == 0
-    || (IN_RANGE_P (INTVAL (operands[3]), -2048, 2047)
-        && IN_RANGE_P (INTVAL (operands[4]) - INTVAL (operands[3]), -2048, 2047)))"
+    || (IN_RANGE (INTVAL (operands[3]), -2048, 2047)
+        && IN_RANGE (INTVAL (operands[4]) - INTVAL (operands[3]), -2048, 2047)))"
   "#"
   [(set_attr "length" "8,12,8,12,12")
    (set_attr "type" "multi")])
@@ -4817,8 +4816,8 @@
   "TARGET_HARD_FLOAT
    && (INTVAL (operands[3]) == 0
        || INTVAL (operands[4]) == 0
-       || (IN_RANGE_P (INTVAL (operands[3]), -2048, 2047)
-	   && IN_RANGE_P (INTVAL (operands[4]) - INTVAL (operands[3]), -2048, 2047)))"
+       || (IN_RANGE (INTVAL (operands[3]), -2048, 2047)
+	   && IN_RANGE (INTVAL (operands[4]) - INTVAL (operands[3]), -2048, 2047)))"
   "#"
   [(set_attr "length" "8,12,8,12,12")
    (set_attr "type" "multi")])
@@ -5566,7 +5565,7 @@
   gcc_assert (GET_CODE (operands[2]) == CONST_INT);
 
   /* If we can't generate an immediate instruction, promote to register.  */
-  if (! IN_RANGE_P (INTVAL (range), -2048, 2047))
+  if (! IN_RANGE (INTVAL (range), -2048, 2047))
     range = force_reg (SImode, range);
 
   /* If low bound is 0, we don't have to subtract it.  */
@@ -5575,7 +5574,7 @@
   else
     {
       indx = gen_reg_rtx (SImode);
-      if (IN_RANGE_P (INTVAL (low), -2047, 2048))
+      if (IN_RANGE (INTVAL (low), -2047, 2048))
 	emit_insn (gen_addsi3 (indx, operands[0], GEN_INT (- INTVAL (low))));
       else
 	emit_insn (gen_subsi3 (indx, operands[0], force_reg (SImode, low)));