Mercurial > hg > CbC > CbC_gcc
diff gcc/config/iq2000/iq2000.md @ 67:f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
| author | nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp> |
|---|---|
| date | Tue, 22 Mar 2011 17:18:12 +0900 |
| parents | 77e2b8dfacca |
| children | 04ced10e8804 |
line wrap: on
line diff
--- a/gcc/config/iq2000/iq2000.md Tue May 25 18:58:51 2010 +0900 +++ b/gcc/config/iq2000/iq2000.md Tue Mar 22 17:18:12 2011 +0900 @@ -1,5 +1,5 @@ ;; iq2000.md Machine Description for Vitesse IQ2000 processors -;; Copyright (C) 2003, 2004, 2005, 2007 Free Software Foundation, Inc. +;; Copyright (C) 2003, 2004, 2005, 2007, 2010 Free Software Foundation, Inc. ;; This file is part of GCC. @@ -194,6 +194,7 @@ (nil)]) (include "predicates.md") +(include "constraints.md") ;; ......................... @@ -365,6 +366,8 @@ return \"andoi\\t%0,%1,%x2\"; } } + else + gcc_unreachable (); }" [(set_attr "type" "arith") (set_attr "mode" "SI")]) @@ -729,15 +732,15 @@ ;; in FP registers (off by default, use -mdebugh to enable). (define_insn "movsi_internal2" - [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,d,d,d,d,R,m,*d,*z,*x,*d,*x,*d") - (match_operand:SI 1 "move_operand" "d,S,IKL,Mnis,R,m,dJ,dJ,*z,*d,J,*x,*d,*a"))] + [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,d,d,d,R,m") + (match_operand:SI 1 "move_operand" "d,IKL,Mnis,R,m,dJ,dJ"))] "(register_operand (operands[0], SImode) || register_operand (operands[1], SImode) || (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) == 0))" "* return iq2000_move_1word (operands, insn, FALSE);" - [(set_attr "type" "move,load,arith,arith,load,load,store,store,xfer,xfer,move,move,move,move") + [(set_attr "type" "move,arith,arith,load,load,store,store") (set_attr "mode" "SI") - (set_attr "length" "4,8,4,8,8,8,4,8,4,4,4,4,4,4")]) + (set_attr "length" "4,4,8,8,8,4,8")]) ;; 16-bit Integer moves @@ -768,15 +771,15 @@ ;; in FP registers (off by default, use -mdebugh to enable). (define_insn "movhi_internal2" - [(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,d,d,R,m,*d,*z,*x,*d") - (match_operand:HI 1 "general_operand" "d,IK,R,m,dJ,dJ,*z,*d,*d,*x"))] + [(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,d,d,R,m") + (match_operand:HI 1 "general_operand" "d,IK,R,m,dJ,dJ"))] "(register_operand (operands[0], HImode) || register_operand (operands[1], HImode) || (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) == 0))" "* return iq2000_move_1word (operands, insn, TRUE);" - [(set_attr "type" "move,arith,load,load,store,store,xfer,xfer,move,move") + [(set_attr "type" "move,arith,load,load,store,store") (set_attr "mode" "HI") - (set_attr "length" "4,4,4,8,4,8,4,4,4,4")]) + (set_attr "length" "4,4,4,8,4,8")]) ;; 8-bit Integer moves @@ -807,15 +810,15 @@ ;; in FP registers (off by default, use -mdebugh to enable). (define_insn "movqi_internal2" - [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,d,R,m,*d,*z,*x,*d") - (match_operand:QI 1 "general_operand" "d,IK,R,m,dJ,dJ,*z,*d,*d,*x"))] + [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,d,R,m") + (match_operand:QI 1 "general_operand" "d,IK,R,m,dJ,dJ"))] "(register_operand (operands[0], QImode) || register_operand (operands[1], QImode) || (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) == 0))" "* return iq2000_move_1word (operands, insn, TRUE);" - [(set_attr "type" "move,arith,load,load,store,store,xfer,xfer,move,move") + [(set_attr "type" "move,arith,load,load,store,store") (set_attr "mode" "QI") - (set_attr "length" "4,4,4,8,4,8,4,4,4,4")]) + (set_attr "length" "4,4,4,8,4,8")]) ;; 32-bit floating point moves @@ -889,6 +892,8 @@ return \"lw\\t%0,%1\"; else if (which_alternative == 2) return \"sw\\t%1,%0\"; + else + gcc_unreachable (); }" [(set_attr "length" "4,4,4") (set_attr "type" "arith,load,store")] @@ -1267,15 +1272,6 @@ [(set_attr "type" "arith") (set_attr "mode" "SI")]) -(define_insn "" - [(set (match_operand:SI 0 "register_operand" "=t") - (gtu:SI (match_operand:SI 1 "register_operand" "d") - (match_operand:SI 2 "register_operand" "d")))] - "" - "sltu\\t%2,%1" - [(set_attr "type" "arith") - (set_attr "mode" "SI")]) - (define_insn "sltu_si" [(set (match_operand:SI 0 "register_operand" "=d,=d") (ltu:SI (match_operand:SI 1 "register_operand" "d,d") @@ -1340,7 +1336,7 @@ if (!(Pmode == DImode)) emit_jump_insn (gen_indirect_jump_internal1 (operands[0])); else - emit_jump_insn (gen_indirect_jump_internal2 (operands[0])); + internal_error (\"unimplemented functionality\"); DONE; } @@ -1367,7 +1363,7 @@ if (!(Pmode == DImode)) emit_jump_insn (gen_tablejump_internal1 (operands[0], operands[1])); else - emit_jump_insn (gen_tablejump_internal2 (operands[0], operands[1])); + internal_error (\"unimplemented functionality\"); DONE; } @@ -1579,7 +1575,7 @@ ;; calls.c now passes a fourth argument, make saber happy (define_expand "call_value" - [(parallel [(set (match_operand 0 "register_operand" "=df") + [(parallel [(set (match_operand 0 "register_operand" "=d") (call (match_operand 1 "memory_operand" "m") (match_operand 2 "" "i"))) (clobber (reg:SI 31)) @@ -1645,8 +1641,8 @@ "") (define_insn "call_value_internal1" - [(set (match_operand 0 "register_operand" "=df") - (call (mem (match_operand 1 "call_insn_operand" "ri")) + [(set (match_operand 0 "register_operand" "=d") + (call (mem (match_operand 1 "call_insn_operand" "r")) (match_operand 2 "" "i"))) (clobber (match_operand:SI 3 "register_operand" "=d"))] "" @@ -1679,10 +1675,10 @@ ;; return values. (define_insn "call_value_multiple_internal1" - [(set (match_operand 0 "register_operand" "=df") - (call (mem (match_operand 1 "call_insn_operand" "ri")) + [(set (match_operand 0 "register_operand" "=d") + (call (mem (match_operand 1 "call_insn_operand" "r")) (match_operand 2 "" "i"))) - (set (match_operand 3 "register_operand" "=df") + (set (match_operand 3 "register_operand" "=d") (call (mem (match_dup 1)) (match_dup 2))) (clobber (match_operand:SI 4 "register_operand" "=d"))]