--- a/gcc/config/sh/sh.h	Tue May 25 18:58:51 2010 +0900
+++ b/gcc/config/sh/sh.h	Tue Mar 22 17:18:12 2011 +0900
@@ -98,8 +98,6 @@
 		  ? "__LITTLE_ENDIAN__" : "__BIG_ENDIAN__"); \
 } while (0)
 
-#define CAN_DEBUG_WITHOUT_FP 
-
 /* Value should be nonzero if functions must have frame pointers.
    Zero means the frame pointer need not be set up (and parms may be accessed
    via the stack pointer) in functions that seem suitable.  */
@@ -108,51 +106,6 @@
 #define SUBTARGET_FRAME_POINTER_REQUIRED 0
 #endif
 
-#define CONDITIONAL_REGISTER_USAGE do					\
-{									\
-  int regno;								\
-  for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno ++)		\
-    if (! VALID_REGISTER_P (regno))					\
-      fixed_regs[regno] = call_used_regs[regno] = 1;			\
-  /* R8 and R9 are call-clobbered on SH5, but not on earlier SH ABIs.  */ \
-  if (TARGET_SH5)							\
-    {									\
-      call_used_regs[FIRST_GENERAL_REG + 8]				\
-	= call_used_regs[FIRST_GENERAL_REG + 9] = 1;			\
-      call_really_used_regs[FIRST_GENERAL_REG + 8]			\
-	= call_really_used_regs[FIRST_GENERAL_REG + 9] = 1;		\
-    }									\
-  if (TARGET_SHMEDIA)							\
-    {									\
-      regno_reg_class[FIRST_GENERAL_REG] = GENERAL_REGS;		\
-      CLEAR_HARD_REG_SET (reg_class_contents[FP0_REGS]);		\
-      regno_reg_class[FIRST_FP_REG] = FP_REGS;				\
-    }									\
-  if (flag_pic)								\
-    {									\
-      fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;				\
-      call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;			\
-    }									\
-  /* Renesas saves and restores mac registers on call.  */		\
-  if (TARGET_HITACHI && ! TARGET_NOMACSAVE)				\
-    {									\
-      call_really_used_regs[MACH_REG] = 0;				\
-      call_really_used_regs[MACL_REG] = 0;				\
-    }									\
-  for (regno = FIRST_FP_REG + (TARGET_LITTLE_ENDIAN != 0);		\
-       regno <= LAST_FP_REG; regno += 2)				\
-    SET_HARD_REG_BIT (reg_class_contents[DF_HI_REGS], regno);		\
-  if (TARGET_SHMEDIA)							\
-    {									\
-      for (regno = FIRST_TARGET_REG; regno <= LAST_TARGET_REG; regno ++)\
-	if (! fixed_regs[regno] && call_really_used_regs[regno])	\
-	  SET_HARD_REG_BIT (reg_class_contents[SIBCALL_REGS], regno);	\
-    }									\
-  else									\
-    for (regno = FIRST_GENERAL_REG; regno <= LAST_GENERAL_REG; regno++)	\
-      if (! fixed_regs[regno] && call_really_used_regs[regno])		\
-	SET_HARD_REG_BIT (reg_class_contents[SIBCALL_REGS], regno);	\
-} while (0)
 
 /* Nonzero if this is an ELF target - compile time only */
 #define TARGET_ELF 0
@@ -452,8 +405,7 @@
 #define SUBTARGET_LINK_EMUL_SUFFIX ""
 #define SUBTARGET_LINK_SPEC ""
 
-/* svr4.h redefines LINK_SPEC inappropriately, so go via SH_LINK_SPEC,
-   so that we can undo the damage without code replication.  */
+/* Go via SH_LINK_SPEC to avoid code replication.  */
 #define LINK_SPEC SH_LINK_SPEC
 
 #define SH_LINK_SPEC "\
@@ -470,8 +422,6 @@
 
 #define DRIVER_SELF_SPECS "%{m2a:%{ml:%eSH2a does not support little-endian}}"
 
-#define OPTIMIZATION_OPTIONS(LEVEL,SIZE) sh_optimization_options (LEVEL, SIZE)
-
 #define ASSEMBLER_DIALECT assembler_dialect
 
 extern int assembler_dialect;
@@ -505,10 +455,6 @@
 
 #define SUBTARGET_OVERRIDE_OPTIONS (void) 0
 
-extern const char *sh_fixed_range_str;
-
-#define OVERRIDE_OPTIONS sh_override_options ()
-
 
 /* Target machine storage layout.  */
 
@@ -524,14 +470,6 @@
    numbered.  */
 #define WORDS_BIG_ENDIAN (TARGET_LITTLE_ENDIAN == 0)
 
-/* Define this to set the endianness to use in libgcc2.c, which can
-   not depend on target_flags.  */
-#if defined(__LITTLE_ENDIAN__)
-#define LIBGCC2_WORDS_BIG_ENDIAN 0
-#else
-#define LIBGCC2_WORDS_BIG_ENDIAN 1
-#endif
-
 #define MAX_BITS_PER_WORD 64
 
 /* Width in bits of an `int'.  We want just 32-bits, even if words are
@@ -629,7 +567,7 @@
   barrier_align (LABEL_AFTER_BARRIER)
 
 #define LOOP_ALIGN(A_LABEL) \
-  ((! optimize || TARGET_HARD_SH4 || TARGET_SMALLCODE) \
+  ((! optimize || TARGET_HARD_SH4 || optimize_size) \
    ? 0 : sh_loop_align (A_LABEL))
 
 #define LABEL_ALIGN(A_LABEL) \
@@ -822,8 +760,8 @@
   (GENERAL_REGISTER_P (REGNO) || FP_REGISTER_P (REGNO) \
    || TARGET_REGISTER_P (REGNO))
 
-/* This is to be used in CONDITIONAL_REGISTER_USAGE, to mark registers
-   that should be fixed.  */
+/* This is to be used in TARGET_CONDITIONAL_REGISTER_USAGE, to mark
+   registers that should be fixed.  */
 #define VALID_REGISTER_P(REGNO) \
   (SHMEDIA_REGISTER_P (REGNO) || XD_REGISTER_P (REGNO) \
    || (REGNO) == AP_REG || (REGNO) == RAP_REG \
@@ -924,8 +862,8 @@
   1,	  1,								\
 }
 
-/* CONDITIONAL_REGISTER_USAGE might want to make a register call-used, yet
-   fixed, like PIC_OFFSET_TABLE_REGNUM.  */
+/* TARGET_CONDITIONAL_REGISTER_USAGE might want to make a register
+   call-used, yet fixed, like PIC_OFFSET_TABLE_REGNUM.  */
 #define CALL_REALLY_USED_REGISTERS CALL_USED_REGISTERS
 
 /* Only the lower 32-bits of R10-R14 are guaranteed to be preserved
@@ -1163,7 +1101,7 @@
   { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00300000 },	\
 /* FPUL_REGS:  */							\
   { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00400000 },	\
-/* SIBCALL_REGS: Initialized in CONDITIONAL_REGISTER_USAGE.  */	\
+/* SIBCALL_REGS: Initialized in TARGET_CONDITIONAL_REGISTER_USAGE.  */	\
   { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },	\
 /* GENERAL_REGS:  */							\
   { 0xffffffff, 0xffffffff, 0x00000000, 0x00000000, 0x03020000 },	\
@@ -1171,7 +1109,7 @@
   { 0x00000000, 0x00000000, 0x00000001, 0x00000000, 0x00000000 },	\
 /* FP_REGS:  */								\
   { 0x00000000, 0x00000000, 0xffffffff, 0xffffffff, 0x00000000 },	\
-/* DF_HI_REGS:  Initialized in CONDITIONAL_REGISTER_USAGE.  */		\
+/* DF_HI_REGS:  Initialized in TARGET_CONDITIONAL_REGISTER_USAGE.  */		\
   { 0x00000000, 0x00000000, 0xffffffff, 0xffffffff, 0x0000ff00 },	\
 /* DF_REGS:  */								\
   { 0x00000000, 0x00000000, 0xffffffff, 0xffffffff, 0x0000ff00 },	\
@@ -1274,19 +1212,6 @@
 #define CONST_OK_FOR_K08(VALUE) (((HOST_WIDE_INT)(VALUE))>= 0 \
 				 && ((HOST_WIDE_INT)(VALUE)) <= 255)
 
-/* Given an rtx X being reloaded into a reg required to be
-   in class CLASS, return the class of reg to actually use.
-   In general this is just CLASS; but on some machines
-   in some cases it is preferable to use a more restrictive class.  */
-
-#define PREFERRED_RELOAD_CLASS(X, CLASS) \
-  ((CLASS) == NO_REGS && TARGET_SHMEDIA \
-   && (GET_CODE (X) == CONST_DOUBLE \
-       || GET_CODE (X) == SYMBOL_REF \
-       || PIC_ADDR_P (X)) \
-   ? GENERAL_REGS \
-   : (CLASS)) \
-
 #if 0
 #define SECONDARY_INOUT_RELOAD_CLASS(CLASS,MODE,X,ELSE) \
   ((((REGCLASS_HAS_FP_REG (CLASS) 					\
@@ -1423,17 +1348,6 @@
 /* Offset of first parameter from the argument pointer register value.  */
 #define FIRST_PARM_OFFSET(FNDECL)  0
 
-/* Value is the number of byte of arguments automatically
-   popped when returning from a subroutine call.
-   FUNDECL is the declaration node of the function (as a tree),
-   FUNTYPE is the data type of the function (as a tree),
-   or for a library call it is an identifier node for the subroutine name.
-   SIZE is the number of bytes of arguments passed on the stack.
-
-   On the SH, the caller does not pop any of its arguments that were passed
-   on the stack.  */
-#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE)  0
-
 /* Value is the number of bytes of arguments automatically popped when
    calling a subroutine.
    CUM is the accumulated argument list.
@@ -1462,8 +1376,6 @@
    ? FIRST_FP_PARM_REG					\
    : FIRST_PARM_REG)
 
-#define FUNCTION_VALUE_REGNO_P(REGNO) sh_function_value_regno_p (REGNO)
-
 /* 1 if N is a possible register number for function argument passing.  */
 /* ??? There are some callers that pass REGNO as int, and others that pass
    it as unsigned.  We get warnings unless we do casts everywhere.  */
@@ -1636,17 +1548,12 @@
 #define INIT_CUMULATIVE_LIBCALL_ARGS(CUM, MODE, LIBNAME) \
   sh_init_cumulative_args (& (CUM), NULL_TREE, (LIBNAME), NULL_TREE, 0, (MODE))
 
-#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)	\
-	sh_function_arg_advance (&(CUM), (MODE), (TYPE), (NAMED))
-#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED)	\
-	sh_function_arg (&(CUM), (MODE), (TYPE), (NAMED))
-
 /* Return boolean indicating arg of mode MODE will be passed in a reg.
    This macro is only used in this file.  */
 
 #define PASS_IN_REG_P(CUM, MODE, TYPE) \
   (((TYPE) == 0 \
-    || (! TREE_ADDRESSABLE ((tree)(TYPE)) \
+    || (! TREE_ADDRESSABLE ((TYPE)) \
 	&& (! (TARGET_HITACHI || (CUM).renesas_abi) \
 	    || ! (AGGREGATE_TYPE_P (TYPE) \
 		  || (!TARGET_FPU_ANY \
@@ -1805,7 +1712,7 @@
 
 /* Alignment required for a trampoline in bits .  */
 #define TRAMPOLINE_ALIGNMENT \
-  ((CACHE_LOG < 3 || (TARGET_SMALLCODE && ! TARGET_HARVARD)) ? 32 \
+  ((CACHE_LOG < 3 || (optimize_size && ! TARGET_HARVARD)) ? 32 \
    : TARGET_SHMEDIA ? 256 : 64)
 
 /* A C expression whose value is RTL representing the value of the return
@@ -1837,11 +1744,11 @@
 
 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
   (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
-   < (TARGET_SMALLCODE ? 2 : ((ALIGN >= 32) ? 16 : 2)))
+   < (optimize_size ? 2 : ((ALIGN >= 32) ? 16 : 2)))
 
 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
   (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
-   < (TARGET_SMALLCODE ? 2 : ((ALIGN >= 32) ? 16 : 2)))
+   < (optimize_size ? 2 : ((ALIGN >= 32) ? 16 : 2)))
 
 #define SET_BY_PIECES_P(SIZE, ALIGN) STORE_BY_PIECES_P(SIZE, ALIGN)
 
@@ -2052,12 +1959,6 @@
    floating point types equivalent to `float'.  */
 #define DOUBLE_TYPE_SIZE ((TARGET_SH2E && ! TARGET_SH4 && ! TARGET_SH2A_DOUBLE) ? 32 : 64)
 
-#if defined(__SH2E__) || defined(__SH3E__) || defined( __SH2A_SINGLE_ONLY__) || defined( __SH4_SINGLE_ONLY__)
-#define LIBGCC2_DOUBLE_TYPE_SIZE 32
-#else
-#define LIBGCC2_DOUBLE_TYPE_SIZE 64
-#endif
-
 /* 'char' is signed by default.  */
 #define DEFAULT_SIGNED_CHAR  1
 
@@ -2190,9 +2091,6 @@
   ((CLASS) == FP0_REGS || (CLASS) == FP_REGS \
    || (CLASS) == DF_REGS || (CLASS) == DF_HI_REGS)
 
-#define REGISTER_MOVE_COST(MODE, SRCCLASS, DSTCLASS) \
-  sh_register_move_cost ((MODE), (SRCCLASS), (DSTCLASS))
-
 /* ??? Perhaps make MEMORY_MOVE_COST depend on compiler option?  This
    would be so that people with slow memory systems could generate
    different code that does fewer memory accesses.  */
@@ -2312,8 +2210,6 @@
 /* DBX register number for a given compiler register number.  */
 /* GDB has FPUL at 23 and FP0 at 25, so we must add one to all FP registers
    to match gdb.  */
-/* svr4.h undefines this macro, yet we really want to use the same numbers
-   for coff as for elf, so we go via another macro: SH_DBX_REGISTER_NUMBER.  */
 /* expand_builtin_init_dwarf_reg_sizes uses this to test if a
    register exists, so we should return -1 for invalid register numbers.  */
 #define DBX_REGISTER_NUMBER(REGNO) SH_DBX_REGISTER_NUMBER (REGNO)
@@ -2441,128 +2337,6 @@
 #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
   final_prescan_insn ((INSN), (OPVEC), (NOPERANDS))
 
-/* Print operand X (an rtx) in assembler syntax to file FILE.
-   CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
-   For `%' followed by punctuation, CODE is the punctuation and X is null.  */
-
-#define PRINT_OPERAND(STREAM, X, CODE)  print_operand ((STREAM), (X), (CODE))
-
-/* Print a memory address as an operand to reference that memory location.  */
-
-#define PRINT_OPERAND_ADDRESS(STREAM,X)  print_operand_address ((STREAM), (X))
-
-#define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
-  ((CHAR) == '.' || (CHAR) == '#' || (CHAR) == '@' || (CHAR) == ','	\
-   || (CHAR) == '$' || (CHAR) == '\'' || (CHAR) == '>')
-
-/* Recognize machine-specific patterns that may appear within
-   constants.  Used for PIC-specific UNSPECs.  */
-#define OUTPUT_ADDR_CONST_EXTRA(STREAM, X, FAIL) \
-  do									\
-    if (GET_CODE (X) == UNSPEC)						\
-      {									\
-	switch (XINT ((X), 1))						\
-	  {								\
-	  case UNSPEC_DATALABEL:					\
-	    fputs ("datalabel ", (STREAM));				\
-	    output_addr_const ((STREAM), XVECEXP ((X), 0, 0));		\
-	    break;							\
-	  case UNSPEC_PIC:						\
-	    /* GLOBAL_OFFSET_TABLE or local symbols, no suffix.  */	\
-	    output_addr_const ((STREAM), XVECEXP ((X), 0, 0));		\
-	    break;							\
-	  case UNSPEC_GOT:						\
-	    output_addr_const ((STREAM), XVECEXP ((X), 0, 0));		\
-	    fputs ("@GOT", (STREAM));					\
-	    break;							\
-	  case UNSPEC_GOTOFF:						\
-	    output_addr_const ((STREAM), XVECEXP ((X), 0, 0));		\
-	    fputs ("@GOTOFF", (STREAM));				\
-	    break;							\
-	  case UNSPEC_PLT:						\
-	    output_addr_const ((STREAM), XVECEXP ((X), 0, 0));		\
-	    fputs ("@PLT", (STREAM));					\
-	    break;							\
-	  case UNSPEC_GOTPLT:						\
-	    output_addr_const ((STREAM), XVECEXP ((X), 0, 0));		\
-	    fputs ("@GOTPLT", (STREAM));				\
-	    break;							\
-	  case UNSPEC_DTPOFF:						\
-	    output_addr_const ((STREAM), XVECEXP ((X), 0, 0));		\
-	    fputs ("@DTPOFF", (STREAM));				\
-	    break;							\
-	  case UNSPEC_GOTTPOFF:						\
-	    output_addr_const ((STREAM), XVECEXP ((X), 0, 0));		\
-	    fputs ("@GOTTPOFF", (STREAM));				\
-	    break;							\
-	  case UNSPEC_TPOFF:						\
-	    output_addr_const ((STREAM), XVECEXP ((X), 0, 0));		\
-	    fputs ("@TPOFF", (STREAM));					\
-	    break;							\
-	  case UNSPEC_CALLER:						\
-	    {								\
-	      char name[32];						\
-	      /* LPCS stands for Label for PIC Call Site.  */		\
-	      ASM_GENERATE_INTERNAL_LABEL				\
-		(name, "LPCS", INTVAL (XVECEXP ((X), 0, 0)));		\
-	      assemble_name ((STREAM), name);				\
-	    }								\
-	    break;							\
-	  case UNSPEC_EXTRACT_S16:					\
-	  case UNSPEC_EXTRACT_U16:					\
-	    {								\
-	      rtx val, shift;						\
-									\
-	      val = XVECEXP (X, 0, 0);					\
-	      shift = XVECEXP (X, 0, 1);				\
-	      fputc ('(', STREAM);					\
-	      if (shift != const0_rtx)					\
-		fputc ('(', STREAM);					\
-	      if (GET_CODE (val) == CONST				\
-		  || GET_RTX_CLASS (GET_CODE (val)) != RTX_OBJ)		\
-		{							\
-		  fputc ('(', STREAM);					\
-		  output_addr_const (STREAM, val);			\
-		  fputc (')', STREAM);					\
-		}							\
-	      else							\
-		output_addr_const (STREAM, val);			\
-	      if (shift != const0_rtx)					\
-		{							\
-		  fputs (" >> ", STREAM);				\
-		  output_addr_const (STREAM, shift);			\
-		  fputc (')', STREAM);					\
-		}							\
-	      fputs (" & 65535)", STREAM);				\
-	    }								\
-	    break;							\
-	  case UNSPEC_SYMOFF:						\
-	    output_addr_const (STREAM, XVECEXP (X, 0, 0));		\
-	    fputc ('-', STREAM);					\
-	    if (GET_CODE (XVECEXP (X, 0, 1)) == CONST)			\
-	      {								\
-		fputc ('(', STREAM);					\
-		output_addr_const (STREAM, XVECEXP (X, 0, 1));		\
-		fputc (')', STREAM);					\
-	      }								\
-	    else							\
-	      output_addr_const (STREAM, XVECEXP (X, 0, 1));		\
-	    break;							\
-	  case UNSPEC_PCREL_SYMOFF:					\
-	    output_addr_const (STREAM, XVECEXP (X, 0, 0));		\
-	    fputs ("-(", STREAM);					\
-	    output_addr_const (STREAM, XVECEXP (X, 0, 1));		\
-	    fputs ("-.)", STREAM);					\
-	    break;							\
-	  default:							\
-	    goto FAIL;							\
-	  }								\
-	break;								\
-      }									\
-    else								\
-      goto FAIL;							\
-  while (0)
-
 
 extern struct rtx_def *sh_compare_op0;
 extern struct rtx_def *sh_compare_op1;
@@ -2585,8 +2359,6 @@
 #define sh_cpu_attr ((enum attr_cpu)sh_cpu)
 extern enum processor_type sh_cpu;
 
-extern int optimize; /* needed for gen_casesi.  */
-
 enum mdep_reorg_phase_e
 {
   SH_BEFORE_MDEP_REORG,
@@ -2646,7 +2418,7 @@
 #define ACCUMULATE_OUTGOING_ARGS TARGET_ACCUMULATE_OUTGOING_ARGS
 
 #define SH_DYNAMIC_SHIFT_COST \
-  (TARGET_HARD_SH4 ? 1 : TARGET_SH3 ? (TARGET_SMALLCODE ? 1 : 2) : 20)
+  (TARGET_HARD_SH4 ? 1 : TARGET_SH3 ? (optimize_size ? 1 : 2) : 20)
 
 
 #define NUM_MODES_FOR_MODE_SWITCHING { FP_MODE_NONE }