view gcc/testsuite/gcc.target/powerpc/vec-strir-6.c @ 158:494b0b89df80 default tip

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author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Mon, 25 May 2020 18:13:55 +0900
parents 2b5abeee2509
children
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/* { dg-do compile } */
/* { dg-options "-mdejagnu-cpu=future" } */

#include <altivec.h>

extern void abort (void);

/* Vector string isolate right-justified on array of signed short.  */
vector signed short
sirj (vector signed short arg)
{
  return vec_strir (arg);
}

/* Enforce that a single dot-form instruction which is properly biased
   for the target's endianness implements this built-in.  */

/* { dg-final { scan-assembler-times {\mvstrihr\M} 1 { target { be } } } } */
/* { dg-final { scan-assembler-times {\mvstrihl} 0 { target { be } } } } */
/* { dg-final { scan-assembler-times {\mvstrihl\M} 1 { target { le } } } } */
/* { dg-final { scan-assembler-times {\mvstrihr} 0 { target { le } } } } */