changeset 248:cfe92afade2b

...
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Wed, 16 Aug 2023 18:23:14 +0900
parents 6c632a06ee27
children c083d69c05e1
files llvm/lib/Target/AArch64/AArch64ISelLowering.cpp llvm/lib/Target/AArch64/AArch64ISelLowering.h
diffstat 2 files changed, 32 insertions(+), 27 deletions(-) [+]
line wrap: on
line diff
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp	Wed Aug 16 17:50:41 2023 +0900
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp	Wed Aug 16 18:23:14 2023 +0900
@@ -2128,9 +2128,9 @@
     MAKE_CASE(AArch64ISD::CSINV)
     MAKE_CASE(AArch64ISD::CSNEG)
     MAKE_CASE(AArch64ISD::CSINC)
-    MAKE_CASE(ARMISD::EH_SJLJ_SETJMP)
-    MAKE_CASE(ARMISD::EH_SJLJ_LONGJMP)
-    MAKE_CASE(ARMISD::EH_SJLJ_SETUP_DISPATCH)
+    MAKE_CASE(AArch64ISD::EH_SJLJ_SETJMP)
+    MAKE_CASE(AArch64ISD::EH_SJLJ_LONGJMP)
+    MAKE_CASE(AArch64ISD::EH_SJLJ_SETUP_DISPATCH)
     MAKE_CASE(AArch64ISD::THREAD_POINTER)
     MAKE_CASE(AArch64ISD::TLSDESC_CALLSEQ)
     MAKE_CASE(AArch64ISD::ABDS_PRED)
@@ -2727,7 +2727,7 @@
 
   case AArch64::Int_eh_sjlj_setjmp:
     return BB;
-
+  }
 }
 
 //===----------------------------------------------------------------------===//
@@ -5580,6 +5580,30 @@
   return DAG.getNode(ISD::VSELECT, DL, VT, Value, Ones, Zeros);
 }
 
+
+SDValue
+AArch64TargetLowering::LowerEH_SJLJ_SETJMP(SDValue Op, SelectionDAG &DAG) const {
+  SDLoc dl(Op);
+  SDValue Val = DAG.getConstant(0, dl, MVT::i32);
+  return DAG.getNode(AArch64ISD::EH_SJLJ_SETJMP, dl,
+                     DAG.getVTList(MVT::i32, MVT::Other), Op.getOperand(0),
+                     Op.getOperand(1), Val);
+}
+
+SDValue
+AArch64TargetLowering::LowerEH_SJLJ_LONGJMP(SDValue Op, SelectionDAG &DAG) const {
+  SDLoc dl(Op);
+  return DAG.getNode(AArch64ISD::EH_SJLJ_LONGJMP, dl, MVT::Other, Op.getOperand(0),
+                     Op.getOperand(1), DAG.getConstant(0, dl, MVT::i32));
+}
+
+SDValue AArch64TargetLowering::LowerEH_SJLJ_SETUP_DISPATCH(SDValue Op,
+                                                      SelectionDAG &DAG) const {
+  SDLoc dl(Op);
+  return DAG.getNode(AArch64ISD::EH_SJLJ_SETUP_DISPATCH, dl, MVT::Other,
+                     Op.getOperand(0));
+}
+
 SDValue AArch64TargetLowering::LowerOperation(SDValue Op,
                                               SelectionDAG &DAG) const {
   LLVM_DEBUG(dbgs() << "Custom lowering: ");
@@ -8127,29 +8151,6 @@
   llvm_unreachable("Unexpected platform trying to use TLS");
 }
 
-SDValue
-AArch64TargetLowering::LowerEH_SJLJ_SETJMP(SDValue Op, SelectionDAG &DAG) const {
-  SDLoc dl(Op);
-  SDValue Val = DAG.getConstant(0, dl, MVT::i32);
-  return DAG.getNode(AArch64ISD::EH_SJLJ_SETJMP, dl,
-                     DAG.getVTList(MVT::i32, MVT::Other), Op.getOperand(0),
-                     Op.getOperand(1), Val);
-}
-
-SDValue
-AArch64TargetLowering::LowerEH_SJLJ_LONGJMP(SDValue Op, SelectionDAG &DAG) const {
-  SDLoc dl(Op);
-  return DAG.getNode(AArch64ISD::EH_SJLJ_LONGJMP, dl, MVT::Other, Op.getOperand(0),
-                     Op.getOperand(1), DAG.getConstant(0, dl, MVT::i32));
-}
-
-SDValue AArch64TargetLowering::LowerEH_SJLJ_SETUP_DISPATCH(SDValue Op,
-                                                      SelectionDAG &DAG) const {
-  SDLoc dl(Op);
-  return DAG.getNode(AArch64ISD::EH_SJLJ_SETUP_DISPATCH, dl, MVT::Other,
-                     Op.getOperand(0));
-}
-
 // Looks through \param Val to determine the bit that can be used to
 // check the sign of the value. It returns the unextended value and
 // the sign bit position.
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.h	Wed Aug 16 17:50:41 2023 +0900
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.h	Wed Aug 16 18:23:14 2023 +0900
@@ -933,6 +933,10 @@
   SDValue LowerABS(SDValue Op, SelectionDAG &DAG) const;
   SDValue LowerZERO_EXTEND(SDValue Op, SelectionDAG &DAG) const;
 
+  SDValue LowerEH_SJLJ_SETJMP(SDValue Op, SelectionDAG &DAG) const;
+  SDValue LowerEH_SJLJ_LONGJMP(SDValue Op, SelectionDAG &DAG) const;
+  SDValue LowerEH_SJLJ_SETUP_DISPATCH(SDValue Op, SelectionDAG &DAG) const;
+
   SDValue LowerMGATHER(SDValue Op, SelectionDAG &DAG) const;
   SDValue LowerMSCATTER(SDValue Op, SelectionDAG &DAG) const;