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1 /* 6809 Simulator V09,
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2
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3 created 1994 by L.C. Benschop.
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4 copyleft (c) 1994-2014 by the sbc09 team, see AUTHORS for more details.
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5 license: GNU General Public License version 2, see LICENSE for more details.
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6
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7 This program simulates a 6809 processor.
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8
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9 System dependencies: short must be 16 bits.
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10 char must be 8 bits.
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11 long must be more than 16 bits.
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12 arrays up to 65536 bytes must be supported.
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13 machine must be twos complement.
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14 Most Unix machines will work. For MSODS you need long pointers
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15 and you may have to malloc() the mem array of 65536 bytes.
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16
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17 Define CPU_BIG_ENDIAN with != 0 if you have a big-endian machine (680x0 etc)
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18 Usually UNIX systems get this automatically from BIG_ENDIAN and BYTE_ORDER
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19 definitions ...
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20
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21 Define TRACE if you want an instruction trace on stderr.
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22 Define TERM_CONTROL if you want nonblocking non-echoing key input.
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23 * THIS IS DIRTY !!! *
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24
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25 Special instructions:
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26 SWI2 writes char to stdout from register B.
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27 SWI3 reads char from stdout to register B, sets carry at EOF.
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28 (or when no key available when using term control).
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29 SWI retains its normal function.
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30 CWAI and SYNC stop simulator.
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31
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32 The program reads a binary image file at $100 and runs it from there.
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33 The file name must be given on the command line.
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34
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35 Revisions:
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36 2012-06-05 johann AT klasek at
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37 Fixed: com with C "NOT" operator ... 0^(value) did not work!
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38 2012-06-06
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39 Fixed: changes from 1994 release (flag handling)
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40 reestablished.
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41 2012-07-15 JK
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42 New: option parsing, new option -d (dump memory on exit)
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43 2013-10-07 JK
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44 New: print ccreg with flag name in lower/upper case depending on flag state.
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45 2013-10-20 JK
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46 New: Show instruction disassembling in trace mode.
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47 2014-07-01 JK
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48 Fixed: disassembling output: cmpd
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49 2014-07-11 JK
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50 Fixed: undocumented tfr/exg register combinations.
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51 http://www.6809.org.uk/dragon/illegal-opcodes.shtml
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52 2016-10-06 JK
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53 Fixed: wrong cmpu cycles
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54 */
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55
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56 #include <stdio.h>
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57 #ifdef TERM_CONTROL
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58 #include <fcntl.h>
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59 int tflags;
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60 #endif
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61 #include <stdlib.h>
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62 #include <unistd.h>
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63 #include <time.h>
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64 #include <string.h>
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65 #include <ctype.h>
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66
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67 void finish();
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68
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69 static int fdump=0;
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70
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71
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72 /* Default: no big endian ... */
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73 #ifndef CPU_BIG_ENDIAN
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74 /* check if environment provides some information about this ... */
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75 # if defined(BIG_ENDIAN) && defined(BYTE_ORDER)
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76 # if BIG_ENDIAN == BYTE_ORDER
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77 # define CPU_BIG_ENDIAN 1
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78 # else
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79 # define CPU_BIG_ENDIAN 0
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80 # endif
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81 # endif
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82 #endif
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83
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84
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85 typedef unsigned char Byte;
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86 typedef unsigned short Word;
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87
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88 /* 6809 registers */
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89 Byte ccreg,dpreg;
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90 Word xreg,yreg,ureg,sreg,ureg,pcreg;
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91
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92 Byte fillreg = 0xff;
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93 Word wfillreg = 0xffff;
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94
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95 Word pcreg_prev;
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96
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97 Byte d_reg[2];
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98 Word *dreg=(Word *)d_reg;
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99
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100
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101 /* This is a dirty aliasing trick, but fast! */
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102 #if CPU_BIG_ENDIAN
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103 Byte *areg=d_reg;
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104 Byte *breg=d_reg+1;
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105 #else
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106 Byte *breg=d_reg;
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107 Byte *areg=d_reg+1;
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108 #endif
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109
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110
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111 /* 6809 memory space */
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112 static Byte mem[65536];
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113
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114 #define GETWORD(a) (mem[a]<<8|mem[(a)+1])
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115 #define SETWORD(a,n) {mem[a]=(n)>>8;mem[(a)+1]=n;}
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116 /* Two bytes of a word are fetched separately because of
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117 the possible wrap-around at address $ffff and alignment
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118 */
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119
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120
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121 int iflag; /* flag to indicate prebyte $10 or $11 */
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122 Byte ireg; /* Instruction register */
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123
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124 #define IMMBYTE(b) b=mem[pcreg++];
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125 #define IMMWORD(w) {w=GETWORD(pcreg);pcreg+=2;}
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126
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127 /* sreg */
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128 #define PUSHBYTE(b) mem[--sreg]=b;
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129 #define PUSHWORD(w) {sreg-=2;SETWORD(sreg,w)}
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130 #define PULLBYTE(b) b=mem[sreg++];
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131 #define PULLWORD(w) {w=GETWORD(sreg);sreg+=2;}
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132
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133 /* ureg */
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134 #define PUSHUBYTE(b) mem[--ureg]=b;
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135 #define PUSHUWORD(w) {ureg-=2;SETWORD(ureg,w)}
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136 #define PULLUBYTE(b) b=mem[ureg++];
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137 #define PULLUWORD(w) {w=GETWORD(ureg);ureg+=2;}
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138
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139 #define SIGNED(b) ((Word)(b&0x80?b|0xff00:b))
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140
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141 Word *ixregs[]={&xreg,&yreg,&ureg,&sreg};
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142
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143 static int idx;
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144
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145 /* disassembled instruction buffer */
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146 static char dinst[6];
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147
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148 /* disassembled operand buffer */
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149 static char dops[32];
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150
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151 /* disassembled instruction len (optional, on demand) */
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152 static int da_len;
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153
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154 /* instruction cycles */
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155 static int cycles;
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156 unsigned long cycles_sum;
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157
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158 void da_inst(char *inst, char *reg, int cyclecount) {
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159 *dinst = 0;
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160 *dops = 0;
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161 if (inst != NULL) strcat(dinst, inst);
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162 if (reg != NULL) strcat(dinst, reg);
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163 cycles += cyclecount;
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164 }
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165
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166 void da_inst_cat(char *inst, int cyclecount) {
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167 if (inst != NULL) strcat(dinst, inst);
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168 cycles += cyclecount;
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169 }
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170
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171 void da_ops(char *part1, char* part2, int cyclecount) {
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172 if (part1 != NULL) strcat(dops, part1);
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173 if (part2 != NULL) strcat(dops, part2);
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174 cycles += cyclecount;
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175 }
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176
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177 void da_reg(Byte b)
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178 {
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179 char *reg[] = { "d", "x", "y", "u", "s", "pc", "?", "?",
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180 "a", "b", "cc", "dp", "?", "?", "?", "?" };
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181 da_ops( reg[(b>>4) & 0xf], ",", 0);
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182 da_ops( reg[b & 0xf], NULL, 0);
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183 }
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184
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185 /* Now follow the posbyte addressing modes. */
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186
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187 Word illaddr() /* illegal addressing mode, defaults to zero */
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188 {
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189 return 0;
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190 }
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191
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192 static char *dixreg[] = { "x", "y", "u", "s" };
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193
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194 Word ainc()
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195 {
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196 da_ops(",",dixreg[idx],2);
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197 da_ops("+",NULL,0);
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198 return (*ixregs[idx])++;
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199 }
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200
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201 Word ainc2()
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202 {
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203 Word temp;
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204 da_ops(",",dixreg[idx],3);
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205 da_ops("++",NULL,0);
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206 temp=(*ixregs[idx]);
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207 (*ixregs[idx])+=2;
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208 return(temp);
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209 }
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210
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211 Word adec()
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212 {
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213 da_ops(",-",dixreg[idx],2);
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214 return --(*ixregs[idx]);
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215 }
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216
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217 Word adec2()
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218 {
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219 Word temp;
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220 da_ops(",--",dixreg[idx],3);
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221 (*ixregs[idx])-=2;
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222 temp=(*ixregs[idx]);
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223 return(temp);
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224 }
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225
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226 Word plus0()
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227 {
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228 da_ops(",",dixreg[idx],0);
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229 return(*ixregs[idx]);
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230 }
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231
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232 Word plusa()
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233 {
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234 da_ops("a,",dixreg[idx],1);
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235 return(*ixregs[idx])+SIGNED(*areg);
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236 }
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237
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238 Word plusb()
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239 {
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240 da_ops("b,",dixreg[idx],1);
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241 return(*ixregs[idx])+SIGNED(*breg);
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242 }
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243
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244 Word plusn()
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245 {
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246 Byte b;
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247 char off[6];
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248 IMMBYTE(b)
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249 /* negative offsets alway decimal, otherwise hex */
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250 if (b & 0x80) sprintf(off,"%d,", -(b ^ 0xff)-1);
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251 else sprintf(off,"$%02x,",b);
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252 da_ops(off,dixreg[idx],1);
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253 return(*ixregs[idx])+SIGNED(b);
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254 }
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255
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256 Word plusnn()
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257 {
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258 Word w;
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259 IMMWORD(w)
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260 char off[6];
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261 sprintf(off,"$%04x,",w);
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262 da_ops(off,dixreg[idx],4);
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263 return(*ixregs[idx])+w;
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264 }
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265
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266 Word plusd()
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267 {
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268 da_ops("d,",dixreg[idx],4);
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269 return(*ixregs[idx])+*dreg;
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270 }
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271
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272
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273 Word npcr()
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274 {
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275 Byte b;
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276 char off[11];
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277
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278 IMMBYTE(b)
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279 sprintf(off,"$%04x,pcr",(pcreg+SIGNED(b))&0xffff);
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280 da_ops(off,NULL,1);
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281 return pcreg+SIGNED(b);
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282 }
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283
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284 Word nnpcr()
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285 {
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286 Word w;
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287 char off[11];
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288
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289 IMMWORD(w)
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290 sprintf(off,"$%04x,pcr",(pcreg+w)&0xffff);
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291 da_ops(off,NULL,5);
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292 return pcreg+w;
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293 }
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294
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295 Word direct()
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296 {
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297 Word(w);
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298 char off[6];
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299
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300 IMMWORD(w)
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301 sprintf(off,"$%04x",w);
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302 da_ops(off,NULL,3);
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303 return w;
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304 }
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305
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306 Word zeropage()
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307 {
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308 Byte b;
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309 char off[6];
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310
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311 IMMBYTE(b)
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312 sprintf(off,"$%02x", b);
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313 da_ops(off,NULL,2);
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314 return dpreg<<8|b;
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315 }
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316
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317
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318 Word immediate()
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319 {
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320 char off[6];
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321
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322 sprintf(off,"#$%02x", mem[pcreg]);
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323 da_ops(off,NULL,0);
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324 return pcreg++;
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325 }
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326
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327 Word immediate2()
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328 {
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329 Word temp;
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330 char off[7];
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331
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332 temp=pcreg;
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333 sprintf(off,"#$%04x", (mem[pcreg]<<8)+mem[(pcreg+1)&0xffff]);
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334 da_ops(off,NULL,0);
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335 pcreg+=2;
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336 return temp;
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337 }
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338
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339 Word (*pbtable[])()={ ainc, ainc2, adec, adec2,
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340 plus0, plusb, plusa, illaddr,
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341 plusn, plusnn, illaddr, plusd,
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342 npcr, nnpcr, illaddr, direct, };
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343
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344 Word postbyte()
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345 {
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346 Byte pb;
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347 Word temp;
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348 char off[6];
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349
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350 IMMBYTE(pb)
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351 idx=((pb & 0x60) >> 5);
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352 if(pb & 0x80) {
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353 if( pb & 0x10)
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354 da_ops("[",NULL,3);
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355 temp=(*pbtable[pb & 0x0f])();
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356 if( pb & 0x10) {
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357 temp=GETWORD(temp);
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358 da_ops("]",NULL,0);
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359 }
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360 return temp;
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361 } else {
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362 temp=pb & 0x1f;
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363 if(temp & 0x10) temp|=0xfff0; /* sign extend */
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364 sprintf(off,"%d,",(temp & 0x10) ? -(temp ^ 0xffff)-1 : temp);
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365 da_ops(off,dixreg[idx],1);
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366 return (*ixregs[idx])+temp;
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367 }
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368 }
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369
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370 Byte * eaddr0() /* effective address for NEG..JMP as byte pointer */
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371 {
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372 switch( (ireg & 0x70) >> 4)
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373 {
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374 case 0: return mem+zeropage();
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375 default:
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376 case 1:case 2:case 3: return 0; /*canthappen*/
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377
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378 case 4: da_inst_cat("a",-2); return areg;
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379 case 5: da_inst_cat("b",-2); return breg;
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380 case 6: da_inst_cat(NULL,2); return mem+postbyte();
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381 case 7: return mem+direct();
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382 }
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383
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384 }
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385
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386 Word eaddr8() /* effective address for 8-bits ops. */
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387 {
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388 switch( (ireg & 0x30) >> 4)
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389 {
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390 default:
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391 case 0: return immediate();
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392 case 1: return zeropage();
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393 case 2: da_inst_cat(NULL,2); return postbyte();
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394 case 3: return direct();
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395 }
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396 }
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397
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398 Word eaddr16() /* effective address for 16-bits ops. */
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399 {
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400 switch( (ireg & 0x30) >> 4)
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401 {
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402 default:
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403 case 0: da_inst_cat(NULL,-1); return immediate2();
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404 case 1: da_inst_cat(NULL,-1); return zeropage();
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405 case 2: da_inst_cat(NULL,1); return postbyte();
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406 case 3: da_inst_cat(NULL,-1); return direct();
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407 }
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408 }
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409
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410 void
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411 ill() /* illegal opcode==noop */
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412 {
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413 }
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414
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415 /* macros to set status flags */
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416 #define SEC ccreg|=0x01;
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417 #define CLC ccreg&=0xfe;
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418 #define SEZ ccreg|=0x04;
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419 #define CLZ ccreg&=0xfb;
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420 #define SEN ccreg|=0x08;
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421 #define CLN ccreg&=0xf7;
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422 #define SEV ccreg|=0x02;
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423 #define CLV ccreg&=0xfd;
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424 #define SEH ccreg|=0x20;
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425 #define CLH ccreg&=0xdf;
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426
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427 /* set N and Z flags depending on 8 or 16 bit result */
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428 #define SETNZ8(b) {if(b)CLZ else SEZ if(b&0x80)SEN else CLN}
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|
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429 #define SETNZ16(b) {if(b)CLZ else SEZ if(b&0x8000)SEN else CLN}
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430
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|
431 #define SETSTATUS(a,b,res) if((a^b^res)&0x10) SEH else CLH \
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432 if((a^b^res^(res>>1))&0x80)SEV else CLV \
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|
433 if(res&0x100)SEC else CLC SETNZ8((Byte)res)
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434
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435 void
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|
|
436 add()
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|
437 {
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438 Word aop,bop,res;
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|
439 Byte* aaop;
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440 da_inst("add",(ireg&0x40)?"b":"a",2);
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|
441 aaop=(ireg&0x40)?breg:areg;
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|
442 aop=*aaop;
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|
443 bop=mem[eaddr8()];
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|
444 res=aop+bop;
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|
445 SETSTATUS(aop,bop,res)
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|
446 *aaop=res;
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|
447 }
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448
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449 void
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450 sbc()
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|
451 {
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|
452 Word aop,bop,res;
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|
453 Byte* aaop;
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|
454 da_inst("sbc",(ireg&0x40)?"b":"a",2);
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|
455 aaop=(ireg&0x40)?breg:areg;
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|
|
456 aop=*aaop;
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|
457 bop=mem[eaddr8()];
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|
458 res=aop-bop-(ccreg&0x01);
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|
|
459 SETSTATUS(aop,bop,res)
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|
|
460 *aaop=res;
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|
|
461 }
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|
|
462
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463 void
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464 sub()
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465 {
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466 Word aop,bop,res;
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|
467 Byte* aaop;
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468 da_inst("sub",(ireg&0x40)?"b":"a",2);
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|
469 aaop=(ireg&0x40)?breg:areg;
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|
470 aop=*aaop;
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|
471 bop=mem[eaddr8()];
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|
472 res=aop-bop;
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473 SETSTATUS(aop,bop,res)
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|
474 *aaop=res;
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475 }
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|
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476
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477 void
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478 adc()
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479 {
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|
480 Word aop,bop,res;
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|
481 Byte* aaop;
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|
482 da_inst("adc",(ireg&0x40)?"b":"a",2);
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|
483 aaop=(ireg&0x40)?breg:areg;
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|
484 aop=*aaop;
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|
|
485 bop=mem[eaddr8()];
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|
486 res=aop+bop+(ccreg&0x01);
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|
487 SETSTATUS(aop,bop,res)
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|
488 *aaop=res;
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489 }
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|
|
490
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491 void
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492 cmp()
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493 {
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|
494 Word aop,bop,res;
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|
495 Byte* aaop;
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|
496 da_inst("cmp",(ireg&0x40)?"b":"a",2);
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|
497 aaop=(ireg&0x40)?breg:areg;
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|
498 aop=*aaop;
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|
499 bop=mem[eaddr8()];
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|
|
500 res=aop-bop;
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|
501 SETSTATUS(aop,bop,res)
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502 }
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503
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504 void
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505 and()
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|
506 {
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|
507 Byte aop,bop,res;
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|
|
508 Byte* aaop;
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|
509 da_inst("and",(ireg&0x40)?"b":"a",2);
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|
|
510 aaop=(ireg&0x40)?breg:areg;
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|
|
511 aop=*aaop;
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|
512 bop=mem[eaddr8()];
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|
|
513 res=aop&bop;
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|
|
514 SETNZ8(res)
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|
|
515 CLV
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|
|
516 *aaop=res;
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|
|
517 }
|
|
|
518
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|
|
519 void
|
|
|
520 or()
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|
521 {
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|
|
522 Byte aop,bop,res;
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|
|
523 Byte* aaop;
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|
|
524 da_inst("or",(ireg&0x40)?"b":"a",2);
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|
|
525 aaop=(ireg&0x40)?breg:areg;
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|
|
526 aop=*aaop;
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|
|
527 bop=mem[eaddr8()];
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|
|
528 res=aop|bop;
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|
|
529 SETNZ8(res)
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|
|
530 CLV
|
|
|
531 *aaop=res;
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|
|
532 }
|
|
|
533
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|
|
534 void
|
|
|
535 eor()
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|
|
536 {
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|
|
537 Byte aop,bop,res;
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|
|
538 Byte* aaop;
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|
|
539 da_inst("eor",(ireg&0x40)?"b":"a",2);
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|
|
540 aaop=(ireg&0x40)?breg:areg;
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|
|
541 aop=*aaop;
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|
|
542 bop=mem[eaddr8()];
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|
|
543 res=aop^bop;
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|
|
544 SETNZ8(res)
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|
|
545 CLV
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|
|
546 *aaop=res;
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|
|
547 }
|
|
|
548
|
|
|
549 void
|
|
|
550 bit()
|
|
|
551 {
|
|
|
552 Byte aop,bop,res;
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|
|
553 Byte* aaop;
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|
|
554 da_inst("bit",(ireg&0x40)?"b":"a",2);
|
|
|
555 aaop=(ireg&0x40)?breg:areg;
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|
|
556 aop=*aaop;
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|
|
557 bop=mem[eaddr8()];
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|
|
558 res=aop&bop;
|
|
|
559 SETNZ8(res)
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|
|
560 CLV
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|
|
561 }
|
|
|
562
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|
|
563 void
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|
|
564 ld()
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|
|
565 {
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|
|
566 Byte res;
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|
|
567 Byte* aaop;
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|
|
568 da_inst("ld",(ireg&0x40)?"b":"a",2);
|
|
|
569 aaop=(ireg&0x40)?breg:areg;
|
|
|
570 res=mem[eaddr8()];
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|
|
571 SETNZ8(res)
|
|
|
572 CLV
|
|
|
573 *aaop=res;
|
|
|
574 }
|
|
|
575
|
|
|
576 void
|
|
|
577 st()
|
|
|
578 {
|
|
|
579 Byte res;
|
|
|
580 Byte* aaop;
|
|
|
581 da_inst("st",(ireg&0x40)?"b":"a",2);
|
|
|
582 aaop=(ireg&0x40)?breg:areg;
|
|
|
583 res=*aaop;
|
|
|
584 mem[eaddr8()]=res;
|
|
|
585 SETNZ8(res)
|
|
|
586 CLV
|
|
|
587 }
|
|
|
588
|
|
|
589 void
|
|
|
590 jsr()
|
|
|
591 {
|
|
|
592 Word w;
|
|
|
593
|
|
|
594 da_inst("jsr",NULL,5);
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|
|
595 da_len=-pcreg;
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|
|
596 w=eaddr8();
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|
|
597 da_len += pcreg +1;
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|
|
598 PUSHWORD(pcreg)
|
|
|
599 pcreg=w;
|
|
|
600 }
|
|
|
601
|
|
|
602 void
|
|
|
603 bsr()
|
|
|
604 {
|
|
|
605 Byte b;
|
|
|
606 char off[6];
|
|
|
607
|
|
|
608 IMMBYTE(b)
|
|
|
609 da_inst("bsr",NULL,7);
|
|
|
610 da_len = 2;
|
|
|
611 PUSHWORD(pcreg)
|
|
|
612 pcreg+=SIGNED(b);
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|
|
613 sprintf(off,"$%04x", pcreg&0xffff);
|
|
|
614 da_ops(off,NULL,0);
|
|
|
615 }
|
|
|
616
|
|
|
617 void
|
|
|
618 neg()
|
|
|
619 {
|
|
|
620 Byte *ea;
|
|
|
621 Word a,r;
|
|
|
622
|
|
|
623 a=0;
|
|
|
624 da_inst("neg",NULL,4);
|
|
|
625 ea=eaddr0();
|
|
|
626 a=*ea;
|
|
|
627 r=-a;
|
|
|
628 SETSTATUS(0,a,r)
|
|
|
629 *ea=r;
|
|
|
630 }
|
|
|
631
|
|
|
632 void
|
|
|
633 com()
|
|
|
634 {
|
|
|
635 Byte *ea;
|
|
|
636 Byte r;
|
|
|
637
|
|
|
638 da_inst("com",NULL,4);
|
|
|
639 ea=eaddr0();
|
|
|
640 /*
|
|
|
641 fprintf(stderr,"DEBUG: com before r=%02X *ea=%02X\n", r, *ea);
|
|
|
642 */
|
|
|
643 r= ~*ea;
|
|
|
644 /*
|
|
|
645 fprintf(stderr,"DEBUG: com after r=%02X *ea=%02X\n", r, *ea);
|
|
|
646 */
|
|
|
647 SETNZ8(r)
|
|
|
648 SEC CLV
|
|
|
649 *ea=r;
|
|
|
650 }
|
|
|
651
|
|
|
652 void
|
|
|
653 lsr()
|
|
|
654 {
|
|
|
655 Byte *ea;
|
|
|
656 Byte r;
|
|
|
657
|
|
|
658 da_inst("lsr",NULL,4);
|
|
|
659 ea=eaddr0();
|
|
|
660 r=*ea;
|
|
|
661 if(r&0x01)SEC else CLC
|
|
|
662 if(r&0x10)SEH else CLH
|
|
|
663 r>>=1;
|
|
|
664 SETNZ8(r)
|
|
|
665 *ea=r;
|
|
|
666 }
|
|
|
667
|
|
|
668 void
|
|
|
669 ror()
|
|
|
670 {
|
|
|
671 Byte *ea;
|
|
|
672 Byte r,c;
|
|
|
673
|
|
|
674 c=(ccreg&0x01)<<7;
|
|
|
675 da_inst("ror",NULL,4);
|
|
|
676 ea=eaddr0();
|
|
|
677 r=*ea;
|
|
|
678 if(r&0x01)SEC else CLC
|
|
|
679 r=(r>>1)+c;
|
|
|
680 SETNZ8(r)
|
|
|
681 *ea=r;
|
|
|
682 }
|
|
|
683
|
|
|
684 void
|
|
|
685 asr()
|
|
|
686 {
|
|
|
687 Byte *ea;
|
|
|
688 Byte r;
|
|
|
689
|
|
|
690 da_inst("asr",NULL,4);
|
|
|
691 ea=eaddr0();
|
|
|
692 r=*ea;
|
|
|
693 if(r&0x01)SEC else CLC
|
|
|
694 if(r&0x10)SEH else CLH
|
|
|
695 r>>=1;
|
|
|
696 if(r&0x40)r|=0x80;
|
|
|
697 SETNZ8(r)
|
|
|
698 *ea=r;
|
|
|
699 }
|
|
|
700
|
|
|
701 void
|
|
|
702 asl()
|
|
|
703 {
|
|
|
704 Byte *ea;
|
|
|
705 Word a,r;
|
|
|
706
|
|
|
707 da_inst("asl",NULL,4);
|
|
|
708 ea=eaddr0();
|
|
|
709 a=*ea;
|
|
|
710 r=a<<1;
|
|
|
711 SETSTATUS(a,a,r)
|
|
|
712 *ea=r;
|
|
|
713 }
|
|
|
714
|
|
|
715 void
|
|
|
716 rol()
|
|
|
717 {
|
|
|
718 Byte *ea;
|
|
|
719 Byte r,c;
|
|
|
720
|
|
|
721 c=(ccreg&0x01);
|
|
|
722 da_inst("rol",NULL,4);
|
|
|
723 ea=eaddr0();
|
|
|
724 r=*ea;
|
|
|
725 if(r&0x80)SEC else CLC
|
|
|
726 if((r&0x80)^((r<<1)&0x80))SEV else CLV
|
|
|
727 r=(r<<1)+c;
|
|
|
728 SETNZ8(r)
|
|
|
729 *ea=r;
|
|
|
730 }
|
|
|
731
|
|
|
732 void
|
|
|
733 inc()
|
|
|
734 {
|
|
|
735 Byte *ea;
|
|
|
736 Byte r;
|
|
|
737
|
|
|
738 da_inst("inc",NULL,4);
|
|
|
739 ea=eaddr0();
|
|
|
740 r=*ea;
|
|
|
741 r++;
|
|
|
742 if(r==0x80)SEV else CLV
|
|
|
743 SETNZ8(r)
|
|
|
744 *ea=r;
|
|
|
745 }
|
|
|
746
|
|
|
747 void
|
|
|
748 dec()
|
|
|
749 {
|
|
|
750 Byte *ea;
|
|
|
751 Byte r;
|
|
|
752
|
|
|
753 da_inst("dec",NULL,4);
|
|
|
754 ea=eaddr0();
|
|
|
755 r=*ea;
|
|
|
756 r--;
|
|
|
757 if(r==0x7f)SEV else CLV
|
|
|
758 SETNZ8(r)
|
|
|
759 *ea=r;
|
|
|
760 }
|
|
|
761
|
|
|
762 void
|
|
|
763 tst()
|
|
|
764 {
|
|
|
765 Byte r;
|
|
|
766 Byte *ea;
|
|
|
767
|
|
|
768 da_inst("tst",NULL,4);
|
|
|
769 ea=eaddr0();
|
|
|
770 r=*ea;
|
|
|
771 SETNZ8(r)
|
|
|
772 CLV
|
|
|
773 }
|
|
|
774
|
|
|
775 void
|
|
|
776 jmp()
|
|
|
777 {
|
|
|
778 Byte *ea;
|
|
|
779
|
|
|
780 da_len = -pcreg;
|
|
|
781 da_inst("jmp",NULL,1);
|
|
|
782 ea=eaddr0();
|
|
|
783 da_len += pcreg + 1;
|
|
|
784 pcreg=ea-mem;
|
|
|
785 }
|
|
|
786
|
|
|
787 void
|
|
|
788 clr()
|
|
|
789 {
|
|
|
790 Byte *ea;
|
|
|
791
|
|
|
792 da_inst("clr",NULL,4);
|
|
|
793 ea=eaddr0();
|
|
|
794 *ea=0;CLN CLV SEZ CLC
|
|
|
795 }
|
|
|
796
|
|
|
797 extern void (*instrtable[])();
|
|
|
798
|
|
|
799 void
|
|
|
800 flag0()
|
|
|
801 {
|
|
|
802 if(iflag) /* in case flag already set by previous flag instr don't recurse */
|
|
|
803 {
|
|
|
804 pcreg--;
|
|
|
805 return;
|
|
|
806 }
|
|
|
807 iflag=1;
|
|
|
808 ireg=mem[pcreg++];
|
|
|
809 da_inst(NULL,NULL,1);
|
|
|
810 (*instrtable[ireg])();
|
|
|
811 iflag=0;
|
|
|
812 }
|
|
|
813
|
|
|
814 void
|
|
|
815 flag1()
|
|
|
816 {
|
|
|
817 if(iflag) /* in case flag already set by previous flag instr don't recurse */
|
|
|
818 {
|
|
|
819 pcreg--;
|
|
|
820 return;
|
|
|
821 }
|
|
|
822 iflag=2;
|
|
|
823 ireg=mem[pcreg++];
|
|
|
824 da_inst(NULL,NULL,1);
|
|
|
825 (*instrtable[ireg])();
|
|
|
826 iflag=0;
|
|
|
827 }
|
|
|
828
|
|
|
829 void
|
|
|
830 nop()
|
|
|
831 {
|
|
|
832 da_inst("nop",NULL,2);
|
|
|
833 }
|
|
|
834
|
|
|
835 void
|
|
|
836 sync_inst()
|
|
|
837 {
|
|
|
838 finish();
|
|
|
839 }
|
|
|
840
|
|
|
841 void
|
|
|
842 cwai()
|
|
|
843 {
|
|
|
844 sync_inst();
|
|
|
845 }
|
|
|
846
|
|
|
847 void
|
|
|
848 lbra()
|
|
|
849 {
|
|
|
850 Word w;
|
|
|
851 char off[6];
|
|
|
852
|
|
|
853 IMMWORD(w)
|
|
|
854 pcreg+=w;
|
|
|
855 da_len = 3;
|
|
|
856 da_inst("lbra",NULL,5);
|
|
|
857 sprintf(off,"$%04x", pcreg&0xffff);
|
|
|
858 da_ops(off,NULL,0);
|
|
|
859 }
|
|
|
860
|
|
|
861 void
|
|
|
862 lbsr()
|
|
|
863 {
|
|
|
864 Word w;
|
|
|
865 char off[6];
|
|
|
866
|
|
|
867 da_len = 3;
|
|
|
868 da_inst("lbsr",NULL,9);
|
|
|
869 IMMWORD(w)
|
|
|
870 PUSHWORD(pcreg)
|
|
|
871 pcreg+=w;
|
|
|
872 sprintf(off,"$%04x", pcreg&0xffff);
|
|
|
873 da_ops(off,NULL,0);
|
|
|
874 }
|
|
|
875
|
|
|
876 void
|
|
|
877 daa()
|
|
|
878 {
|
|
|
879 Word a;
|
|
|
880 da_inst("daa",NULL,2);
|
|
|
881 a=*areg;
|
|
|
882 if(ccreg&0x20)a+=6;
|
|
|
883 if((a&0x0f)>9)a+=6;
|
|
|
884 if(ccreg&0x01)a+=0x60;
|
|
|
885 if((a&0xf0)>0x90)a+=0x60;
|
|
|
886 if(a&0x100)SEC
|
|
|
887 *areg=a;
|
|
|
888 }
|
|
|
889
|
|
|
890 void
|
|
|
891 orcc()
|
|
|
892 {
|
|
|
893 Byte b;
|
|
|
894 char off[7];
|
|
|
895 IMMBYTE(b)
|
|
|
896 sprintf(off,"#$%02x", b);
|
|
|
897 da_inst("orcc",NULL,3);
|
|
|
898 da_ops(off,NULL,0);
|
|
|
899 ccreg|=b;
|
|
|
900 }
|
|
|
901
|
|
|
902 void
|
|
|
903 andcc()
|
|
|
904 {
|
|
|
905 Byte b;
|
|
|
906 char off[6];
|
|
|
907 IMMBYTE(b)
|
|
|
908 sprintf(off,"#$%02x", b);
|
|
|
909 da_inst("andcc",NULL,3);
|
|
|
910 da_ops(off,NULL,0);
|
|
|
911
|
|
|
912 ccreg&=b;
|
|
|
913 }
|
|
|
914
|
|
|
915 void
|
|
|
916 mul()
|
|
|
917 {
|
|
|
918 Word w;
|
|
|
919 w=*areg * *breg;
|
|
|
920 da_inst("mul",NULL,11);
|
|
|
921 if(w)CLZ else SEZ
|
|
|
922 if(w&0x80) SEC else CLC
|
|
|
923 *dreg=w;
|
|
|
924 }
|
|
|
925
|
|
|
926 void
|
|
|
927 sex()
|
|
|
928 {
|
|
|
929 Word w;
|
|
|
930 da_inst("sex",NULL,2);
|
|
|
931 w=SIGNED(*breg);
|
|
|
932 SETNZ16(w)
|
|
|
933 *dreg=w;
|
|
|
934 }
|
|
|
935
|
|
|
936 void
|
|
|
937 abx()
|
|
|
938 {
|
|
|
939 da_inst("abx",NULL,3);
|
|
|
940 xreg += *breg;
|
|
|
941 }
|
|
|
942
|
|
|
943 void
|
|
|
944 rts()
|
|
|
945 {
|
|
|
946 da_inst("rts",NULL,5);
|
|
|
947 da_len = 1;
|
|
|
948 PULLWORD(pcreg)
|
|
|
949 }
|
|
|
950
|
|
|
951 void
|
|
|
952 rti()
|
|
|
953 {
|
|
|
954 Byte x;
|
|
|
955 x=ccreg&0x80;
|
|
|
956 da_inst("rti",NULL,(x?15:6));
|
|
|
957 da_len = 1;
|
|
|
958 PULLBYTE(ccreg)
|
|
|
959 if(x)
|
|
|
960 {
|
|
|
961 PULLBYTE(*areg)
|
|
|
962 PULLBYTE(*breg)
|
|
|
963 PULLBYTE(dpreg)
|
|
|
964 PULLWORD(xreg)
|
|
|
965 PULLWORD(yreg)
|
|
|
966 PULLWORD(ureg)
|
|
|
967 }
|
|
|
968 PULLWORD(pcreg)
|
|
|
969 }
|
|
|
970
|
|
|
971 void
|
|
|
972 swi()
|
|
|
973 {
|
|
|
974 int w;
|
|
|
975 da_inst("swi",(iflag==1)?"2":(iflag==2)?"3":"",5);
|
|
|
976 switch(iflag)
|
|
|
977 {
|
|
|
978 case 0:
|
|
|
979 PUSHWORD(pcreg)
|
|
|
980 PUSHWORD(ureg)
|
|
|
981 PUSHWORD(yreg)
|
|
|
982 PUSHWORD(xreg)
|
|
|
983 PUSHBYTE(dpreg)
|
|
|
984 PUSHBYTE(*breg)
|
|
|
985 PUSHBYTE(*areg)
|
|
|
986 PUSHBYTE(ccreg)
|
|
|
987 ccreg|=0xd0;
|
|
|
988 pcreg=GETWORD(0xfffa);
|
|
|
989 break;
|
|
|
990 case 1:
|
|
|
991 putchar(*breg);
|
|
|
992 fflush(stdout);
|
|
|
993 break;
|
|
|
994 case 2:
|
|
|
995 w=getchar();
|
|
|
996 if(w==EOF)SEC else CLC
|
|
|
997 *breg=w;
|
|
|
998 }
|
|
|
999 }
|
|
|
1000
|
|
|
1001
|
|
|
1002 Word *wordregs[]={(Word*)d_reg,&xreg,&yreg,&ureg,&sreg,&pcreg,&wfillreg,&wfillreg};
|
|
|
1003
|
|
|
1004 #if CPU_BIG_ENDIAN
|
|
|
1005 Byte *byteregs[]={d_reg,d_reg+1,&ccreg,&dpreg,&fillreg,&fillreg,&fillreg,&fillreg};
|
|
|
1006 #else
|
|
|
1007 Byte *byteregs[]={d_reg+1,d_reg,&ccreg,&dpreg,&fillreg,&fillreg,&fillreg,&fillreg};
|
|
|
1008 #endif
|
|
|
1009
|
|
|
1010 void
|
|
|
1011 tfr()
|
|
|
1012 {
|
|
|
1013 Byte b;
|
|
|
1014 da_inst("tfr",NULL,7);
|
|
|
1015 IMMBYTE(b)
|
|
|
1016 da_reg(b);
|
|
|
1017 Word v;
|
|
|
1018 // source in higher nibble (highest bit set means 8 bit reg.)
|
|
|
1019 if(b&0x80) {
|
|
|
1020 v=*byteregs[(b&0x70)>>4] | (b&0x08 ? 0 : 0xff00);
|
|
|
1021 } else {
|
|
|
1022 v=*wordregs[(b&0x70)>>4];
|
|
|
1023 }
|
|
|
1024 // dest in lower nibble (highest bit set means 8 bit reg.)
|
|
|
1025 if(b&0x8) {
|
|
|
1026 *byteregs[b&0x07]=v&0xff;
|
|
|
1027 fillreg=0xff; // keep fillvalue
|
|
|
1028 } else {
|
|
|
1029 *wordregs[b&0x07]=v;
|
|
|
1030 wfillreg = 0xffff; // keep fillvalue
|
|
|
1031 }
|
|
|
1032 }
|
|
|
1033
|
|
|
1034 void
|
|
|
1035 exg()
|
|
|
1036 {
|
|
|
1037 Byte b;
|
|
|
1038 Word f;
|
|
|
1039 Word t;
|
|
|
1040 da_inst("exg",NULL,8);
|
|
|
1041 IMMBYTE(b)
|
|
|
1042 da_reg(b);
|
|
|
1043 if(b&0x80) {
|
|
|
1044 f=*byteregs[(b&0x70)>>4] | 0xff00;
|
|
|
1045 } else {
|
|
|
1046 f=*wordregs[(b>>4)&0x07];
|
|
|
1047 }
|
|
|
1048 if(b&0x8) {
|
|
|
1049 t=*byteregs[b&0x07] | 0xff00;
|
|
|
1050 } else {
|
|
|
1051 t=*wordregs[b&0x07];
|
|
|
1052 }
|
|
|
1053 if(b&0x80) {
|
|
|
1054 *byteregs[(b&0x70)>>4] = t;
|
|
|
1055 fillreg=0xff; // keep fillvalue
|
|
|
1056 } else {
|
|
|
1057 *wordregs[(b>>4)&0x07] = t;
|
|
|
1058 wfillreg = 0xffff; // keep fillvalue
|
|
|
1059 }
|
|
|
1060 if(b&0x8) {
|
|
|
1061 *byteregs[b&0x07] = f;
|
|
|
1062 fillreg=0xff; // keep fillvalue
|
|
|
1063 } else {
|
|
|
1064 *wordregs[b&0x07] = f;
|
|
|
1065 wfillreg = 0xffff; // keep fillvalue
|
|
|
1066 }
|
|
|
1067 }
|
|
|
1068
|
|
|
1069 void
|
|
|
1070 br(int f)
|
|
|
1071 {
|
|
|
1072 Byte b;
|
|
|
1073 Word w;
|
|
|
1074 char off[7];
|
|
|
1075 Word dest;
|
|
|
1076
|
|
|
1077 if(!iflag) {
|
|
|
1078 IMMBYTE(b)
|
|
|
1079 dest = pcreg+SIGNED(b);
|
|
|
1080 if(f) pcreg+=SIGNED(b);
|
|
|
1081 da_len = 2;
|
|
|
1082 } else {
|
|
|
1083 IMMWORD(w)
|
|
|
1084 dest = pcreg+w;
|
|
|
1085 if(f) pcreg+=w;
|
|
|
1086 da_len = 3;
|
|
|
1087 }
|
|
|
1088 sprintf(off,"$%04x", dest&0xffff);
|
|
|
1089 da_ops(off,NULL,0);
|
|
|
1090 }
|
|
|
1091
|
|
|
1092 #define NXORV ((ccreg&0x08)^(ccreg&0x02))
|
|
|
1093
|
|
|
1094 void
|
|
|
1095 bra()
|
|
|
1096 {
|
|
|
1097 da_inst(iflag?"l":"","bra",iflag?5:3);
|
|
|
1098 br(1);
|
|
|
1099 }
|
|
|
1100
|
|
|
1101 void
|
|
|
1102 brn()
|
|
|
1103 {
|
|
|
1104 da_inst(iflag?"l":"","brn",iflag?5:3);
|
|
|
1105 br(0);
|
|
|
1106 }
|
|
|
1107
|
|
|
1108 void
|
|
|
1109 bhi()
|
|
|
1110 {
|
|
|
1111 da_inst(iflag?"l":"","bhi",iflag?5:3);
|
|
|
1112 br(!(ccreg&0x05));
|
|
|
1113 }
|
|
|
1114
|
|
|
1115 void
|
|
|
1116 bls()
|
|
|
1117 {
|
|
|
1118 da_inst(iflag?"l":"","bls",iflag?5:3);
|
|
|
1119 br(ccreg&0x05);
|
|
|
1120 }
|
|
|
1121
|
|
|
1122 void
|
|
|
1123 bcc()
|
|
|
1124 {
|
|
|
1125 da_inst(iflag?"l":"","bcc",iflag?5:3);
|
|
|
1126 br(!(ccreg&0x01));
|
|
|
1127 }
|
|
|
1128
|
|
|
1129 void
|
|
|
1130 bcs()
|
|
|
1131 {
|
|
|
1132 da_inst(iflag?"l":"","bcs",iflag?5:3);
|
|
|
1133 br(ccreg&0x01);
|
|
|
1134 }
|
|
|
1135
|
|
|
1136 void
|
|
|
1137 bne()
|
|
|
1138 {
|
|
|
1139 da_inst(iflag?"l":"","bne",iflag?5:3);
|
|
|
1140 br(!(ccreg&0x04));
|
|
|
1141 }
|
|
|
1142
|
|
|
1143 void
|
|
|
1144 beq()
|
|
|
1145 {
|
|
|
1146 da_inst(iflag?"l":"","beq",iflag?5:3);
|
|
|
1147 br(ccreg&0x04);
|
|
|
1148 }
|
|
|
1149
|
|
|
1150 void
|
|
|
1151 bvc()
|
|
|
1152 {
|
|
|
1153 da_inst(iflag?"l":"","bvc",iflag?5:3);
|
|
|
1154 br(!(ccreg&0x02));
|
|
|
1155 }
|
|
|
1156
|
|
|
1157 void
|
|
|
1158 bvs()
|
|
|
1159 {
|
|
|
1160 da_inst(iflag?"l":"","bvs",iflag?5:3);
|
|
|
1161 br(ccreg&0x02);
|
|
|
1162 }
|
|
|
1163
|
|
|
1164 void
|
|
|
1165 bpl()
|
|
|
1166 {
|
|
|
1167 da_inst(iflag?"l":"","bpl",iflag?5:3);
|
|
|
1168 br(!(ccreg&0x08));
|
|
|
1169 }
|
|
|
1170
|
|
|
1171 void
|
|
|
1172 bmi()
|
|
|
1173 {
|
|
|
1174 da_inst(iflag?"l":"","bmi",iflag?5:3);
|
|
|
1175 br(ccreg&0x08);
|
|
|
1176 }
|
|
|
1177
|
|
|
1178 void
|
|
|
1179 bge()
|
|
|
1180 {
|
|
|
1181 da_inst(iflag?"l":"","bge",iflag?5:3);
|
|
|
1182 br(!NXORV);
|
|
|
1183 }
|
|
|
1184
|
|
|
1185 void
|
|
|
1186 blt()
|
|
|
1187 {
|
|
|
1188 da_inst(iflag?"l":"","blt",iflag?5:3);
|
|
|
1189 br(NXORV);
|
|
|
1190 }
|
|
|
1191
|
|
|
1192 void
|
|
|
1193 bgt()
|
|
|
1194 {
|
|
|
1195 da_inst(iflag?"l":"","bgt",iflag?5:3);
|
|
|
1196 br(!(NXORV||ccreg&0x04));
|
|
|
1197 }
|
|
|
1198
|
|
|
1199 void
|
|
|
1200 ble()
|
|
|
1201 {
|
|
|
1202 da_inst(iflag?"l":"","ble",iflag?5:3);
|
|
|
1203 br(NXORV||ccreg&0x04);
|
|
|
1204 }
|
|
|
1205
|
|
|
1206 void
|
|
|
1207 leax()
|
|
|
1208 {
|
|
|
1209 Word w;
|
|
|
1210 da_inst("leax",NULL,4);
|
|
|
1211 w=postbyte();
|
|
|
1212 if(w) CLZ else SEZ
|
|
|
1213 xreg=w;
|
|
|
1214 }
|
|
|
1215
|
|
|
1216 void
|
|
|
1217 leay()
|
|
|
1218 {
|
|
|
1219 Word w;
|
|
|
1220 da_inst("leay",NULL,4);
|
|
|
1221 w=postbyte();
|
|
|
1222 if(w) CLZ else SEZ
|
|
|
1223 yreg=w;
|
|
|
1224 }
|
|
|
1225
|
|
|
1226 void
|
|
|
1227 leau()
|
|
|
1228 {
|
|
|
1229 da_inst("leau",NULL,4);
|
|
|
1230 ureg=postbyte();
|
|
|
1231 }
|
|
|
1232
|
|
|
1233 void
|
|
|
1234 leas()
|
|
|
1235 {
|
|
|
1236 da_inst("leas",NULL,4);
|
|
|
1237 sreg=postbyte();
|
|
|
1238 }
|
|
|
1239
|
|
|
1240
|
|
|
1241 int bit_count(Byte b)
|
|
|
1242 {
|
|
|
1243 Byte mask=0x80;
|
|
|
1244 int count=0;
|
|
|
1245 int i;
|
|
|
1246 char *reg[] = { "pc", "u", "y", "x", "dp", "b", "a", "cc" };
|
|
|
1247
|
|
|
1248 for(i=0; i<=7; i++) {
|
|
|
1249 if (b & mask) {
|
|
|
1250 count++;
|
|
|
1251 da_ops(count > 1 ? ",":"", reg[i],1+(i<4?1:0));
|
|
|
1252 }
|
|
|
1253 mask >>= 1;
|
|
|
1254 }
|
|
|
1255 return count;
|
|
|
1256 }
|
|
|
1257
|
|
|
1258
|
|
|
1259 void
|
|
|
1260 pshs()
|
|
|
1261 {
|
|
|
1262 Byte b;
|
|
|
1263 IMMBYTE(b)
|
|
|
1264 da_inst("pshs",NULL,5);
|
|
|
1265 bit_count(b);
|
|
|
1266 if(b&0x80)PUSHWORD(pcreg)
|
|
|
1267 if(b&0x40)PUSHWORD(ureg)
|
|
|
1268 if(b&0x20)PUSHWORD(yreg)
|
|
|
1269 if(b&0x10)PUSHWORD(xreg)
|
|
|
1270 if(b&0x08)PUSHBYTE(dpreg)
|
|
|
1271 if(b&0x04)PUSHBYTE(*breg)
|
|
|
1272 if(b&0x02)PUSHBYTE(*areg)
|
|
|
1273 if(b&0x01)PUSHBYTE(ccreg)
|
|
|
1274 }
|
|
|
1275
|
|
|
1276 void
|
|
|
1277 puls()
|
|
|
1278 {
|
|
|
1279 Byte b;
|
|
|
1280 IMMBYTE(b)
|
|
|
1281 da_inst("puls",NULL,5);
|
|
|
1282 da_len = 2;
|
|
|
1283 bit_count(b);
|
|
|
1284 if(b&0x01)PULLBYTE(ccreg)
|
|
|
1285 if(b&0x02)PULLBYTE(*areg)
|
|
|
1286 if(b&0x04)PULLBYTE(*breg)
|
|
|
1287 if(b&0x08)PULLBYTE(dpreg)
|
|
|
1288 if(b&0x10)PULLWORD(xreg)
|
|
|
1289 if(b&0x20)PULLWORD(yreg)
|
|
|
1290 if(b&0x40)PULLWORD(ureg)
|
|
|
1291 if(b&0x80)PULLWORD(pcreg)
|
|
|
1292 }
|
|
|
1293
|
|
|
1294 void
|
|
|
1295 pshu()
|
|
|
1296 {
|
|
|
1297 Byte b;
|
|
|
1298 IMMBYTE(b)
|
|
|
1299 da_inst("pshu",NULL,5);
|
|
|
1300 bit_count(b);
|
|
|
1301 if(b&0x80)PUSHUWORD(pcreg)
|
|
|
1302 if(b&0x40)PUSHUWORD(ureg)
|
|
|
1303 if(b&0x20)PUSHUWORD(yreg)
|
|
|
1304 if(b&0x10)PUSHUWORD(xreg)
|
|
|
1305 if(b&0x08)PUSHUBYTE(dpreg)
|
|
|
1306 if(b&0x04)PUSHUBYTE(*breg)
|
|
|
1307 if(b&0x02)PUSHUBYTE(*areg)
|
|
|
1308 if(b&0x01)PUSHUBYTE(ccreg)
|
|
|
1309 }
|
|
|
1310
|
|
|
1311 void
|
|
|
1312 pulu()
|
|
|
1313 {
|
|
|
1314 Byte b;
|
|
|
1315 IMMBYTE(b)
|
|
|
1316 da_inst("pulu",NULL,5);
|
|
|
1317 da_len = 2;
|
|
|
1318 bit_count(b);
|
|
|
1319 if(b&0x01)PULLUBYTE(ccreg)
|
|
|
1320 if(b&0x02)PULLUBYTE(*areg)
|
|
|
1321 if(b&0x04)PULLUBYTE(*breg)
|
|
|
1322 if(b&0x08)PULLUBYTE(dpreg)
|
|
|
1323 if(b&0x10)PULLUWORD(xreg)
|
|
|
1324 if(b&0x20)PULLUWORD(yreg)
|
|
|
1325 if(b&0x40)PULLUWORD(ureg)
|
|
|
1326 if(b&0x80)PULLUWORD(pcreg)
|
|
|
1327 }
|
|
|
1328
|
|
|
1329 #define SETSTATUSD(a,b,res) {if(res&0x10000) SEC else CLC \
|
|
|
1330 if(((res>>1)^a^b^res)&0x8000) SEV else CLV \
|
|
|
1331 SETNZ16((Word)res)}
|
|
|
1332
|
|
|
1333 void
|
|
|
1334 addd()
|
|
|
1335 {
|
|
|
1336 unsigned long aop,bop,res;
|
|
|
1337 Word ea;
|
|
|
1338 da_inst("addd",NULL,5);
|
|
|
1339 aop=*dreg & 0xffff;
|
|
|
1340 ea=eaddr16();
|
|
|
1341 bop=GETWORD(ea);
|
|
|
1342 res=aop+bop;
|
|
|
1343 SETSTATUSD(aop,bop,res)
|
|
|
1344 *dreg=res;
|
|
|
1345 }
|
|
|
1346
|
|
|
1347 void
|
|
|
1348 subd()
|
|
|
1349 {
|
|
|
1350 unsigned long aop,bop,res;
|
|
|
1351 Word ea;
|
|
|
1352 aop=*dreg & 0xffff;
|
|
|
1353 switch(iflag) {
|
|
|
1354 case 0:
|
|
|
1355 da_inst("subd",NULL,5);
|
|
|
1356 break;
|
|
|
1357 case 1:
|
|
|
1358 da_inst("cmpd",NULL,5);
|
|
|
1359 aop=*dreg & 0xffff;
|
|
|
1360 break;
|
|
|
1361 case 2:
|
|
|
1362 da_inst("cmpu",NULL,5);
|
|
|
1363 aop=ureg;
|
|
|
1364 }
|
|
|
1365 ea=eaddr16();
|
|
|
1366 bop=GETWORD(ea);
|
|
|
1367 res=aop-bop;
|
|
|
1368 SETSTATUSD(aop,bop,res)
|
|
|
1369 if(iflag==0) *dreg=res; /* subd result */
|
|
|
1370 }
|
|
|
1371
|
|
|
1372 void
|
|
|
1373 cmpx()
|
|
|
1374 {
|
|
|
1375 unsigned long aop,bop,res;
|
|
|
1376 Word ea;
|
|
|
1377 switch(iflag) {
|
|
|
1378 case 0:
|
|
|
1379 da_inst("cmpx",NULL,5);
|
|
|
1380 aop=xreg;
|
|
|
1381 break;
|
|
|
1382 case 1:
|
|
|
1383 da_inst("cmpy",NULL,5);
|
|
|
1384 aop=yreg;
|
|
|
1385 break;
|
|
|
1386 case 2:
|
|
|
1387 da_inst("cmps",NULL,5);
|
|
|
1388 aop=sreg;
|
|
|
1389 }
|
|
|
1390 ea=eaddr16();
|
|
|
1391 bop=GETWORD(ea);
|
|
|
1392 res=aop-bop;
|
|
|
1393 SETSTATUSD(aop,bop,res)
|
|
|
1394 }
|
|
|
1395
|
|
|
1396 void
|
|
|
1397 ldd()
|
|
|
1398 {
|
|
|
1399 Word ea,w;
|
|
|
1400 da_inst("ldd",NULL,4);
|
|
|
1401 ea=eaddr16();
|
|
|
1402 w=GETWORD(ea);
|
|
|
1403 SETNZ16(w)
|
|
|
1404 *dreg=w;
|
|
|
1405 }
|
|
|
1406
|
|
|
1407 void
|
|
|
1408 ldx()
|
|
|
1409 {
|
|
|
1410 Word ea,w;
|
|
|
1411 if (iflag) da_inst("ldy",NULL,4);
|
|
|
1412 else da_inst("ldx",NULL,4);
|
|
|
1413 ea=eaddr16();
|
|
|
1414 w=GETWORD(ea);
|
|
|
1415 SETNZ16(w)
|
|
|
1416 if (iflag==0) xreg=w; else yreg=w;
|
|
|
1417 }
|
|
|
1418
|
|
|
1419 void
|
|
|
1420 ldu()
|
|
|
1421 {
|
|
|
1422 Word ea,w;
|
|
|
1423 if (iflag) da_inst("lds",NULL,4);
|
|
|
1424 else da_inst("ldu",NULL,4);
|
|
|
1425 ea=eaddr16();
|
|
|
1426 w=GETWORD(ea);
|
|
|
1427 SETNZ16(w)
|
|
|
1428 if (iflag==0) ureg=w; else sreg=w;
|
|
|
1429 }
|
|
|
1430
|
|
|
1431 void
|
|
|
1432 std()
|
|
|
1433 {
|
|
|
1434 Word ea,w;
|
|
|
1435 da_inst("std",NULL,4);
|
|
|
1436 ea=eaddr16();
|
|
|
1437 w=*dreg;
|
|
|
1438 SETNZ16(w)
|
|
|
1439 SETWORD(ea,w)
|
|
|
1440 }
|
|
|
1441
|
|
|
1442 void
|
|
|
1443 stx()
|
|
|
1444 {
|
|
|
1445 Word ea,w;
|
|
|
1446 if (iflag) da_inst("sty",NULL,4);
|
|
|
1447 else da_inst("stx",NULL,4);
|
|
|
1448 ea=eaddr16();
|
|
|
1449 if (iflag==0) w=xreg; else w=yreg;
|
|
|
1450 SETNZ16(w)
|
|
|
1451 SETWORD(ea,w)
|
|
|
1452 }
|
|
|
1453
|
|
|
1454 void
|
|
|
1455 stu()
|
|
|
1456 {
|
|
|
1457 Word ea,w;
|
|
|
1458 if (iflag) da_inst("sts",NULL,4);
|
|
|
1459 else da_inst("stu",NULL,4);
|
|
|
1460 ea=eaddr16();
|
|
|
1461 if (iflag==0) w=ureg; else w=sreg;
|
|
|
1462 SETNZ16(w)
|
|
|
1463 SETWORD(ea,w)
|
|
|
1464 }
|
|
|
1465
|
|
|
1466 void (*instrtable[])() = {
|
|
|
1467 neg , ill , ill , com , lsr , ill , ror , asr ,
|
|
|
1468 asl , rol , dec , ill , inc , tst , jmp , clr ,
|
|
|
1469 flag0 , flag1 , nop , sync_inst , ill , ill , lbra , lbsr ,
|
|
|
1470 ill , daa , orcc , ill , andcc , sex , exg , tfr ,
|
|
|
1471 bra , brn , bhi , bls , bcc , bcs , bne , beq ,
|
|
|
1472 bvc , bvs , bpl , bmi , bge , blt , bgt , ble ,
|
|
|
1473 leax , leay , leas , leau , pshs , puls , pshu , pulu ,
|
|
|
1474 ill , rts , abx , rti , cwai , mul , ill , swi ,
|
|
|
1475 neg , ill , ill , com , lsr , ill , ror , asr ,
|
|
|
1476 asl , rol , dec , ill , inc , tst , ill , clr ,
|
|
|
1477 neg , ill , ill , com , lsr , ill , ror , asr ,
|
|
|
1478 asl , rol , dec , ill , inc , tst , ill , clr ,
|
|
|
1479 neg , ill , ill , com , lsr , ill , ror , asr ,
|
|
|
1480 asl , rol , dec , ill , inc , tst , jmp , clr ,
|
|
|
1481 neg , ill , ill , com , lsr , ill , ror , asr ,
|
|
|
1482 asl , rol , dec , ill , inc , tst , jmp , clr ,
|
|
|
1483 sub , cmp , sbc , subd , and , bit , ld , st ,
|
|
|
1484 eor , adc , or , add , cmpx , bsr , ldx , stx ,
|
|
|
1485 sub , cmp , sbc , subd , and , bit , ld , st ,
|
|
|
1486 eor , adc , or , add , cmpx , jsr , ldx , stx ,
|
|
|
1487 sub , cmp , sbc , subd , and , bit , ld , st ,
|
|
|
1488 eor , adc , or , add , cmpx , jsr , ldx , stx ,
|
|
|
1489 sub , cmp , sbc , subd , and , bit , ld , st ,
|
|
|
1490 eor , adc , or , add , cmpx , jsr , ldx , stx ,
|
|
|
1491 sub , cmp , sbc , addd , and , bit , ld , st ,
|
|
|
1492 eor , adc , or , add , ldd , std , ldu , stu ,
|
|
|
1493 sub , cmp , sbc , addd , and , bit , ld , st ,
|
|
|
1494 eor , adc , or , add , ldd , std , ldu , stu ,
|
|
|
1495 sub , cmp , sbc , addd , and , bit , ld , st ,
|
|
|
1496 eor , adc , or , add , ldd , std , ldu , stu ,
|
|
|
1497 sub , cmp , sbc , addd , and , bit , ld , st ,
|
|
|
1498 eor , adc , or , add , ldd , std , ldu , stu ,
|
|
|
1499 };
|
|
|
1500
|
|
|
1501 void
|
|
|
1502 read_image(char* name)
|
|
|
1503 {
|
|
|
1504 FILE *image;
|
|
|
1505 if((image=fopen(name,"rb"))!=NULL) {
|
|
|
1506 fread(mem+0x100,0xff00,1,image);
|
|
|
1507 fclose(image);
|
|
|
1508 }
|
|
|
1509 }
|
|
|
1510
|
|
|
1511 void
|
|
|
1512 dump()
|
|
|
1513 {
|
|
|
1514 FILE *image;
|
|
|
1515 if((image=fopen("dump.v09","wb"))!=NULL) {
|
|
|
1516 fwrite(mem,0x10000,1,image);
|
|
|
1517 fclose(image);
|
|
|
1518 }
|
|
|
1519 }
|
|
|
1520
|
|
|
1521 /* E F H I N Z V C */
|
|
|
1522
|
|
|
1523 char *to_bin(Byte b)
|
|
|
1524 {
|
|
|
1525 static char binstr[9];
|
|
|
1526 Byte bm;
|
|
|
1527 char *ccbit="EFHINZVC";
|
|
|
1528 int i;
|
|
|
1529
|
|
|
1530 for(bm=0x80, i=0; bm>0; bm >>=1, i++)
|
|
|
1531 binstr[i] = (b & bm) ? toupper(ccbit[i]) : tolower(ccbit[i]);
|
|
|
1532 binstr[8] = 0;
|
|
|
1533 return binstr;
|
|
|
1534 }
|
|
|
1535
|
|
|
1536
|
|
|
1537 void cr() {
|
|
|
1538 #ifdef TERM_CONTROL
|
|
|
1539 fprintf(stderr,"%s","\r\n"); /* CR+LF because raw terminal ... */
|
|
|
1540 #else
|
|
|
1541 fprintf(stderr,"%s","\n");
|
|
|
1542 #endif
|
|
|
1543 }
|
|
|
1544
|
|
|
1545 #ifdef TRACE
|
|
|
1546
|
|
|
1547 /* max. bytes of instruction code per trace line */
|
|
|
1548 #define I_MAX 4
|
|
|
1549
|
|
|
1550 void trace()
|
|
|
1551 {
|
|
|
1552 int ilen;
|
|
|
1553 int i;
|
|
|
1554
|
|
|
1555 if (
|
|
|
1556 1 || ( /* no trace filtering ... */
|
|
|
1557 !(ureg > 0x09c0 && ureg < 0x09f3) && ( /* CMOVE ausblenden! */
|
|
|
1558 pcreg_prev == 0x01de || /* DOLST */
|
|
|
1559 pcreg_prev == 0x037a || /* FDOVAR */
|
|
|
1560 /*
|
|
|
1561 ureg >= 0x0300 && ureg < 0x03f0 ||
|
|
|
1562 ureg >=0x1900 ||
|
|
|
1563 ureg > 0x118b && ureg < 0x11b2 ||
|
|
|
1564 pcreg_prev >= 0x01de && pcreg_prev < 0x0300 ||
|
|
|
1565 xreg >=0x8000 ||
|
|
|
1566 pcreg_prev >= 0x01de && pcreg_prev < 0x0300 ||
|
|
|
1567 */
|
|
|
1568 0
|
|
|
1569 ))
|
|
|
1570 )
|
|
|
1571 {
|
|
|
1572 fprintf(stderr,"%04x ",pcreg_prev);
|
|
|
1573 if (da_len) ilen = da_len;
|
|
|
1574 else {
|
|
|
1575 ilen = pcreg-pcreg_prev; if (ilen < 0) ilen= -ilen;
|
|
|
1576 }
|
|
|
1577 for(i=0; i < I_MAX; i++) {
|
|
|
1578 if (i < ilen) fprintf(stderr,"%02x",mem[(pcreg_prev+i)&0xffff]);
|
|
|
1579 else fprintf(stderr," ");
|
|
|
1580 }
|
|
|
1581 fprintf(stderr," %-5s %-17s [%02d] ", dinst, dops, cycles);
|
|
|
1582 //if((ireg&0xfe)==0x10)
|
|
|
1583 // fprintf(stderr,"%02x ",mem[pcreg]);else fprintf(stderr," ");
|
|
|
1584 fprintf(stderr,"x=%04x y=%04x u=%04x s=%04x a=%02x b=%02x cc=%s",
|
|
|
1585 xreg,yreg,ureg,sreg,*areg,*breg,to_bin(ccreg));
|
|
|
1586 fprintf(stderr,", s: %04x %04x, r: %04x",
|
|
|
1587 mem[sreg]<<8|mem[sreg+1],
|
|
|
1588 mem[sreg+2]<<8|mem[sreg+3],
|
|
|
1589 mem[yreg]<<8|mem[yreg+1]
|
|
|
1590 );
|
|
|
1591 cr();
|
|
|
1592 }
|
|
|
1593 da_len = 0;
|
|
|
1594 }
|
|
|
1595
|
|
|
1596 #endif
|
|
|
1597
|
|
|
1598
|
|
|
1599 static char optstring[]="d";
|
|
|
1600
|
|
|
1601 int
|
|
|
1602 main(int argc,char *argv[])
|
|
|
1603 {
|
|
|
1604 char c;
|
|
|
1605 int a;
|
|
|
1606
|
|
|
1607 /* initialize memory with pseudo random data ... */
|
|
|
1608 srandom(time(NULL));
|
|
|
1609 for(a=0x0100; a<0x10000;a++) {
|
|
|
1610 mem[(Word)a] = (Byte) (random() & 0xff);
|
|
|
1611 }
|
|
|
1612
|
|
|
1613 while( (c=getopt(argc, argv, optstring)) >=0 ) {
|
|
|
1614 switch(c) {
|
|
|
1615 case 'd':
|
|
|
1616 fdump = 1;
|
|
|
1617 break;
|
|
|
1618 default:
|
|
|
1619 fprintf(stderr,"ERROR: Unknown option\n");
|
|
|
1620 exit(2);
|
|
|
1621 }
|
|
|
1622 }
|
|
|
1623
|
|
|
1624 if (optind < argc) {
|
|
|
1625 read_image(argv[optind]);
|
|
|
1626 }
|
|
|
1627 else {
|
|
|
1628 fprintf(stderr,"ERROR: Missing image name\n");
|
|
|
1629 exit(2);
|
|
|
1630 }
|
|
|
1631
|
|
|
1632 pcreg=0x100;
|
|
|
1633 sreg=0;
|
|
|
1634 dpreg=0;
|
|
|
1635 iflag=0;
|
|
|
1636 /* raw disables SIGINT, brkint reenables it ...
|
|
|
1637 */
|
|
|
1638 #if defined(TERM_CONTROL) && ! defined(TRACE)
|
|
|
1639 /* raw, but still allow key signaling, especial if ^C is desired
|
|
|
1640 - if not, remove brkint and isig!
|
|
|
1641 */
|
|
|
1642 system("stty -echo nl raw brkint isig");
|
|
|
1643 tflags=fcntl(0,F_GETFL,0);
|
|
|
1644 fcntl(0,F_SETFL,tflags|O_NDELAY);
|
|
|
1645 #endif
|
|
|
1646
|
|
|
1647 #ifdef TRACE
|
|
|
1648 da_len = 0;
|
|
|
1649 #endif
|
|
|
1650 cycles_sum = 0;
|
|
|
1651 pcreg_prev = pcreg;
|
|
|
1652
|
|
|
1653 for(;;){
|
|
|
1654
|
|
|
1655 ireg=mem[pcreg++];
|
|
|
1656 cycles=0;
|
|
|
1657 (*instrtable[ireg])(); /* process instruction */
|
|
|
1658 cycles_sum += cycles;
|
|
|
1659
|
|
|
1660 #ifdef TRACE
|
|
|
1661 trace();
|
|
|
1662 #endif
|
|
|
1663
|
|
|
1664 pcreg_prev = pcreg;
|
|
|
1665
|
|
|
1666 } /* for */
|
|
|
1667 return 0;
|
|
|
1668 }
|
|
|
1669
|
|
|
1670
|
|
|
1671
|
|
|
1672 void finish()
|
|
|
1673 {
|
|
|
1674 cr();
|
|
|
1675 fprintf(stderr,"Cycles: %lu", cycles_sum);
|
|
|
1676 cr();
|
|
|
1677 #if defined(TERM_CONTROL) && ! defined(TRACE)
|
|
|
1678 system("stty -raw -nl echo brkint");
|
|
|
1679 fcntl(0,F_SETFL,tflags&~O_NDELAY);
|
|
|
1680 #endif
|
|
|
1681 if (fdump) dump();
|
|
|
1682 exit(0);
|
|
|
1683 }
|
