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1 /*****************************************************************
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2 * timer.c
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3 * by Zhiyi Huang, hzy@cs.otago.ac.nz
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4 * University of Otago
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5 *
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6 ********************************************************************/
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7
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8 // The System Timer peripheral
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9
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10 #include "types.h"
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11 #include "defs.h"
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12 #include "param.h"
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13 #include "memlayout.h"
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14 #include "proc.h"
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15 #include "traps.h"
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16 #include "arm.h"
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17 #include "spinlock.h"
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18
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19 #define TIMER_REGS_BASE (MMIO_VA+0x003000)
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20 #define CONTROL_STATUS 0x0 // control/status
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21 #define COUNTER_LO 0x4 // the time-stamp lower 32 bits
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22 #define COUNTER_HI 0x8 // the time-stamp higher 32 bits
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23 #define COMPARE0 0xc // compare 0
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24 #define COMPARE1 0x10 // compare 1
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25 #define COMPARE2 0x14 // compare 2
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26 #define COMPARE3 0x18 // compare 3
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27
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28 #define TIMER_FREQ 10000 // interrupt 100 times/sec.
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29
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30 void
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31 enabletimer3irq(void)
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32 {
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33 intctrlregs *ip;
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34
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35 ip = (intctrlregs *)INT_REGS_BASE;
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36 ip->gpuenable[0] |= 1 << IRQ_TIMER3; // enable the system timer3 irq
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37 }
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38
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39
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40 void
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41 timer3init(void)
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42 {
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43 uint v;
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44
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45 enabletimer3irq();
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46
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47 v = inw(TIMER_REGS_BASE+COUNTER_LO);
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48 v += TIMER_FREQ;
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49
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50 outw(TIMER_REGS_BASE+COMPARE3, v);
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51 ticks = 0;
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52 }
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53
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54 void
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55 timer3intr(void)
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56 {
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57 uint v;
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58 //cprintf("timer3 interrupt: %x\n", inw(TIMER_REGS_BASE+CONTROL_STATUS));
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59 outw(TIMER_REGS_BASE+CONTROL_STATUS, (1 << IRQ_TIMER3)); // clear timer3 irq
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60
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61 ticks++;
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62 wakeup(&ticks);
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63
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64 // reset the value of compare3
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65 v=inw(TIMER_REGS_BASE+COUNTER_LO);
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66 v += TIMER_FREQ;
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67 outw(TIMER_REGS_BASE+COMPARE3, v);
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68 }
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69
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70 void
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71 delay(uint m)
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72 {
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73 unsigned long long t;
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74
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75 if(m == 0) return;
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76
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77 t = getsystemtime() + m;
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78 while(t != getsystemtime());
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79
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80 return;
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81 }
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