--- a/elilo.c	Sun Feb 17 15:31:38 2013 +0900
+++ b/elilo.c	Tue Feb 26 13:47:49 2013 +0900
@@ -305,7 +305,7 @@
 	if (bp) free_boot_params(bp);
 exit_error:
     Print(L"Start original ELILO kernel.\n");
-    start_elilo_kernel();
+    start_elilo_kernel(image, cookie);
 	return ELILO_LOAD_ERROR;
 
 }

--- a/x86_64/elilo_kernel.c	Sun Feb 17 15:31:38 2013 +0900
+++ b/x86_64/elilo_kernel.c	Tue Feb 26 13:47:49 2013 +0900
@@ -37,18 +37,17 @@
                 } \
 }
 
-
-#define EFER_LME 8
-#define EFER_NXE 0x00000400
-#define MSR_EFER 0xc0000080
-
 /*
 VOID
-operate_efer()
+enable_efer_flags()
 {
-    UINT32 msr_efer = MSR_EFER;
-    UINT32 efer_flg = EFER_LME;
-    asm volatile ("movl %0, %%ecx \n\t rdmsr \n\t btsl %1, %%eax\n\t wrmsr " :: "m"(msr_efer) ,"m"(efer_flg));
+    
+    asm volatile ("movl %0, %%ecx \n\t rdmsr \n\t btsl %1, %%eax\n\t wrmsr " :: "r"(msr_efer) ,"r"(efer_flg));
+}
+
+disable_efer_flags()
+{
+    asm volatile ("movl %0, %%ecx \n\t rdmsr \n\t btsl %1, %%eax\n\t wrmsr " :: "r"(msr_efer) ,"r"(efer_flg));
 }
 */
 
@@ -56,11 +55,19 @@
 extern pml4_t *pml4;
 extern pdpte_t *pdpte;
 
+VOID 
+cpuid(UINTN *eax, UINTN *ebx, UINTN *ecx, UINTN *edx)
+{
+    asm volatile ("cpuid" : "=a"(*eax), "=b"(*ebx), "=c"(*ecx), "=d"(*edx)
+            : "0" (*eax), "2" (*ecx) : "memory");
+}
+
 INTN
 enable_cr4_pae(cr4_t cr4)
 {
     asm volatile("mov %%cr4,%0\n\t" : "=r" (cr4));
     cr4.pae = ENABLE;
+    cr4.pcide = DISABLE;
     asm volatile("mov %0,%%cr4": : "r" (cr4));
     //asm volatile("movq %%rax, %%cr4"::"a"(cr4_flag));
     return 0;
@@ -83,6 +90,17 @@
 }
 
 INTN
+disable_paging_cr0()
+{   
+    cr0_t cr0;
+    asm volatile("mov %%cr0,%0\n\t" : "=r" (cr0));
+    cr0.pg = DISABLE;
+    asm volatile("mov %0,%%cr0": : "r" (cr0));
+    // asm volatile("movl %0, %%eax \n\t movq %%rax, %%cr0"::"m"(cr0_flag));
+    return 0;
+}
+
+INTN
 enable_paging_cr0(cr0_t cr0)
 {   
     asm volatile("mov %%cr0,%0\n\t" : "=r" (cr0));
@@ -107,7 +125,7 @@
     }
 }
 
-#define PML4_START 0x00270000
+#define PML4_START 0x00101000
 #define PDPTE_START PML4_START + PML4_SIZE
 
 /* alloc pages use how many pages for 4KiB */
@@ -175,8 +193,10 @@
 }
 
 EFI_STATUS
-start_elilo_kernel()
+start_elilo_kernel(EFI_HANDLE image, UINTN cookie)
 {
+    uefi_call_wrapper(BS->ExitBootServices, 2, image, cookie);
+
     cr0_t cr0;
     cr3_t cr3;
     cr4_t cr4;
@@ -193,18 +213,29 @@
     // asm volatile ( "lidt %0" : : "m" (idt_addr) );
     // asm volatile ( "lgdt %0" : : "m" (gdt_addr) );
 
+    UINTN eax = 0, ebx = 0, ecx = 0, edx = 0;
+    eax = 0x80000008;
+    cpuid(&eax, &ebx, &ecx, &edx);    
+    Print(L"eax %x\n", eax);
+    eax &= PHYADDR_WIDTH;
+    Print(L"use pagetable wise %d\n", eax);
+
+    Print(L"disable cr0...\n");
+    disable_paging_cr0();
+
     Print(L"init pagetable...\n");
-    UINT64 addr = init_pgtable();
+    init_pgtable();
 
     Print(L"enable cr4 pae...\n");
-    enable_cr4_pae(cr4); 
+
+    UINT64 addr = PML4_START;
+    Print(L"insert addr %lx to cr3...\n", addr);
+    insert_addr_to_cr3(cr3, addr);
 
     Print(L"enable paging cr0...\n");
+    enable_cr4_pae(cr4); 
     enable_paging_cr0(cr0);
 
-    Print(L"insert addr %lx to cr3...\n", addr);
-    insert_addr_to_cr3(cr3, addr);
-
     while(1) { }
 
     Print(L"finish to initialize...\n");