Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/rs6000/darwin.md @ 111:04ced10e8804
gcc 7
| author | kono |
|---|---|
| date | Fri, 27 Oct 2017 22:46:09 +0900 |
| parents | f6334be47118 |
| children | 84e7813d76e9 |
| rev | line source |
|---|---|
| 0 | 1 /* Machine description patterns for PowerPC running Darwin (Mac OS X). |
| 111 | 2 Copyright (C) 2004-2017 Free Software Foundation, Inc. |
| 0 | 3 Contributed by Apple Computer Inc. |
| 4 | |
| 5 This file is part of GCC. | |
| 6 | |
| 7 GNU CC is free software; you can redistribute it and/or modify | |
| 8 it under the terms of the GNU General Public License as published by | |
| 9 the Free Software Foundation; either version 3, or (at your option) | |
| 10 any later version. | |
| 11 | |
| 12 GNU CC is distributed in the hope that it will be useful, | |
| 13 but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 15 GNU General Public License for more details. | |
| 16 | |
| 17 You should have received a copy of the GNU General Public License | |
| 18 ;; along with GCC; see the file COPYING3. If not see | |
| 19 ;; <http://www.gnu.org/licenses/>. */ | |
| 20 | |
| 21 (define_insn "adddi3_high" | |
| 22 [(set (match_operand:DI 0 "gpc_reg_operand" "=b") | |
| 23 (plus:DI (match_operand:DI 1 "gpc_reg_operand" "b") | |
| 24 (high:DI (match_operand 2 "" ""))))] | |
| 25 "TARGET_MACHO && TARGET_64BIT" | |
| 111 | 26 "addis %0,%1,ha16(%2)" |
| 0 | 27 [(set_attr "length" "4")]) |
| 28 | |
| 29 (define_insn "movdf_low_si" | |
| 30 [(set (match_operand:DF 0 "gpc_reg_operand" "=f,!r") | |
| 31 (mem:DF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,b") | |
| 32 (match_operand 2 "" ""))))] | |
| 111 | 33 "TARGET_MACHO && TARGET_HARD_FLOAT && !TARGET_64BIT" |
| 0 | 34 "* |
| 35 { | |
| 36 switch (which_alternative) | |
| 37 { | |
| 38 case 0: | |
| 39 return \"lfd %0,lo16(%2)(%1)\"; | |
| 40 case 1: | |
| 41 { | |
| 42 if (TARGET_POWERPC64 && TARGET_32BIT) | |
| 43 /* Note, old assemblers didn't support relocation here. */ | |
| 44 return \"ld %0,lo16(%2)(%1)\"; | |
| 45 else | |
| 46 { | |
| 111 | 47 output_asm_insn (\"la %0,lo16(%2)(%1)\", operands); |
| 48 output_asm_insn (\"lwz %L0,4(%0)\", operands); | |
| 49 return (\"lwz %0,0(%0)\"); | |
| 0 | 50 } |
| 51 } | |
| 52 default: | |
| 53 gcc_unreachable (); | |
| 54 } | |
| 55 }" | |
| 56 [(set_attr "type" "load") | |
| 57 (set_attr "length" "4,12")]) | |
| 58 | |
| 59 | |
| 60 (define_insn "movdf_low_di" | |
| 61 [(set (match_operand:DF 0 "gpc_reg_operand" "=f,!r") | |
| 62 (mem:DF (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b,b") | |
| 63 (match_operand 2 "" ""))))] | |
| 111 | 64 "TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_64BIT" |
| 0 | 65 "* |
| 66 { | |
| 67 switch (which_alternative) | |
| 68 { | |
| 69 case 0: | |
| 70 return \"lfd %0,lo16(%2)(%1)\"; | |
| 71 case 1: | |
| 72 return \"ld %0,lo16(%2)(%1)\"; | |
| 73 default: | |
| 74 gcc_unreachable (); | |
| 75 } | |
| 76 }" | |
| 77 [(set_attr "type" "load") | |
| 78 (set_attr "length" "4,4")]) | |
| 79 | |
| 80 (define_insn "movdf_low_st_si" | |
| 81 [(set (mem:DF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b") | |
| 82 (match_operand 2 "" ""))) | |
| 83 (match_operand:DF 0 "gpc_reg_operand" "f"))] | |
| 111 | 84 "TARGET_MACHO && TARGET_HARD_FLOAT && ! TARGET_64BIT" |
| 0 | 85 "stfd %0,lo16(%2)(%1)" |
| 86 [(set_attr "type" "store") | |
| 87 (set_attr "length" "4")]) | |
| 88 | |
| 89 (define_insn "movdf_low_st_di" | |
| 90 [(set (mem:DF (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b") | |
| 91 (match_operand 2 "" ""))) | |
| 92 (match_operand:DF 0 "gpc_reg_operand" "f"))] | |
| 111 | 93 "TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_64BIT" |
| 0 | 94 "stfd %0,lo16(%2)(%1)" |
| 95 [(set_attr "type" "store") | |
| 96 (set_attr "length" "4")]) | |
| 97 | |
| 98 (define_insn "movsf_low_si" | |
| 99 [(set (match_operand:SF 0 "gpc_reg_operand" "=f,!r") | |
| 100 (mem:SF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,b") | |
| 101 (match_operand 2 "" ""))))] | |
| 111 | 102 "TARGET_MACHO && TARGET_HARD_FLOAT && ! TARGET_64BIT" |
| 0 | 103 "@ |
| 104 lfs %0,lo16(%2)(%1) | |
| 111 | 105 lwz %0,lo16(%2)(%1)" |
| 0 | 106 [(set_attr "type" "load") |
| 107 (set_attr "length" "4")]) | |
| 108 | |
| 109 (define_insn "movsf_low_di" | |
| 110 [(set (match_operand:SF 0 "gpc_reg_operand" "=f,!r") | |
| 111 (mem:SF (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b,b") | |
| 112 (match_operand 2 "" ""))))] | |
| 111 | 113 "TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_64BIT" |
| 0 | 114 "@ |
| 115 lfs %0,lo16(%2)(%1) | |
| 111 | 116 lwz %0,lo16(%2)(%1)" |
| 0 | 117 [(set_attr "type" "load") |
| 118 (set_attr "length" "4")]) | |
| 119 | |
| 120 (define_insn "movsf_low_st_si" | |
| 121 [(set (mem:SF (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b,b") | |
| 122 (match_operand 2 "" ""))) | |
| 123 (match_operand:SF 0 "gpc_reg_operand" "f,!r"))] | |
| 111 | 124 "TARGET_MACHO && TARGET_HARD_FLOAT && ! TARGET_64BIT" |
| 0 | 125 "@ |
| 126 stfs %0,lo16(%2)(%1) | |
| 111 | 127 stw %0,lo16(%2)(%1)" |
| 0 | 128 [(set_attr "type" "store") |
| 129 (set_attr "length" "4")]) | |
| 130 | |
| 131 (define_insn "movsf_low_st_di" | |
| 132 [(set (mem:SF (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b,b") | |
| 133 (match_operand 2 "" ""))) | |
| 134 (match_operand:SF 0 "gpc_reg_operand" "f,!r"))] | |
| 111 | 135 "TARGET_MACHO && TARGET_HARD_FLOAT && TARGET_64BIT" |
| 0 | 136 "@ |
| 137 stfs %0,lo16(%2)(%1) | |
| 111 | 138 stw %0,lo16(%2)(%1)" |
| 0 | 139 [(set_attr "type" "store") |
| 140 (set_attr "length" "4")]) | |
| 141 | |
| 142 ;; 64-bit MachO load/store support | |
| 143 (define_insn "movdi_low" | |
|
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update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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changeset
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144 [(set (match_operand:DI 0 "gpc_reg_operand" "=r,*!d") |
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nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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diff
changeset
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145 (mem:DI (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b,b") |
| 0 | 146 (match_operand 2 "" ""))))] |
| 147 "TARGET_MACHO && TARGET_64BIT" | |
|
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nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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148 "@ |
| 111 | 149 ld %0,lo16(%2)(%1) |
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update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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changeset
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150 lfd %0,lo16(%2)(%1)" |
| 0 | 151 [(set_attr "type" "load") |
| 152 (set_attr "length" "4")]) | |
| 153 | |
| 154 (define_insn "movsi_low_st" | |
| 155 [(set (mem:SI (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b") | |
| 156 (match_operand 2 "" ""))) | |
| 157 (match_operand:SI 0 "gpc_reg_operand" "r"))] | |
| 158 "TARGET_MACHO && ! TARGET_64BIT" | |
| 111 | 159 "stw %0,lo16(%2)(%1)" |
| 0 | 160 [(set_attr "type" "store") |
| 161 (set_attr "length" "4")]) | |
| 162 | |
| 163 (define_insn "movdi_low_st" | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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changeset
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164 [(set (mem:DI (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b,b") |
| 0 | 165 (match_operand 2 "" ""))) |
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67
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update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
166 (match_operand:DI 0 "gpc_reg_operand" "r,*!d"))] |
| 0 | 167 "TARGET_MACHO && TARGET_64BIT" |
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nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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changeset
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168 "@ |
| 111 | 169 std %0,lo16(%2)(%1) |
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update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
170 stfd %0,lo16(%2)(%1)" |
| 0 | 171 [(set_attr "type" "store") |
| 172 (set_attr "length" "4")]) | |
| 173 | |
| 174 ;; Mach-O PIC trickery. | |
| 175 (define_expand "macho_high" | |
| 176 [(set (match_operand 0 "" "") | |
| 177 (high (match_operand 1 "" "")))] | |
| 178 "TARGET_MACHO" | |
| 179 { | |
| 180 if (TARGET_64BIT) | |
| 181 emit_insn (gen_macho_high_di (operands[0], operands[1])); | |
| 182 else | |
| 183 emit_insn (gen_macho_high_si (operands[0], operands[1])); | |
| 184 | |
| 185 DONE; | |
| 186 }) | |
| 187 | |
| 188 (define_insn "macho_high_si" | |
| 189 [(set (match_operand:SI 0 "gpc_reg_operand" "=b*r") | |
| 190 (high:SI (match_operand 1 "" "")))] | |
| 191 "TARGET_MACHO && ! TARGET_64BIT" | |
| 111 | 192 "lis %0,ha16(%1)") |
| 0 | 193 |
| 194 | |
| 195 (define_insn "macho_high_di" | |
| 196 [(set (match_operand:DI 0 "gpc_reg_operand" "=b*r") | |
| 197 (high:DI (match_operand 1 "" "")))] | |
| 198 "TARGET_MACHO && TARGET_64BIT" | |
| 111 | 199 "lis %0,ha16(%1)") |
| 0 | 200 |
| 201 (define_expand "macho_low" | |
| 202 [(set (match_operand 0 "" "") | |
| 203 (lo_sum (match_operand 1 "" "") | |
| 204 (match_operand 2 "" "")))] | |
| 205 "TARGET_MACHO" | |
| 206 { | |
| 207 if (TARGET_64BIT) | |
| 208 emit_insn (gen_macho_low_di (operands[0], operands[1], operands[2])); | |
| 209 else | |
| 210 emit_insn (gen_macho_low_si (operands[0], operands[1], operands[2])); | |
| 211 | |
| 212 DONE; | |
| 213 }) | |
| 214 | |
| 215 (define_insn "macho_low_si" | |
| 111 | 216 [(set (match_operand:SI 0 "gpc_reg_operand" "=r") |
| 217 (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b") | |
| 0 | 218 (match_operand 2 "" "")))] |
| 219 "TARGET_MACHO && ! TARGET_64BIT" | |
| 111 | 220 "la %0,lo16(%2)(%1)") |
| 0 | 221 |
| 222 (define_insn "macho_low_di" | |
| 111 | 223 [(set (match_operand:DI 0 "gpc_reg_operand" "=r") |
| 224 (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b") | |
| 0 | 225 (match_operand 2 "" "")))] |
| 226 "TARGET_MACHO && TARGET_64BIT" | |
| 111 | 227 "la %0,lo16(%2)(%1)") |
| 0 | 228 |
| 229 (define_split | |
| 230 [(set (mem:V4SI (plus:DI (match_operand:DI 0 "gpc_reg_operand" "") | |
| 231 (match_operand:DI 1 "short_cint_operand" ""))) | |
| 232 (match_operand:V4SI 2 "register_operand" "")) | |
| 233 (clobber (match_operand:DI 3 "gpc_reg_operand" ""))] | |
| 234 "TARGET_MACHO && TARGET_64BIT" | |
| 235 [(set (match_dup 3) (plus:DI (match_dup 0) (match_dup 1))) | |
| 236 (set (mem:V4SI (match_dup 3)) | |
| 237 (match_dup 2))] | |
| 238 "") | |
| 239 | |
| 240 (define_expand "load_macho_picbase" | |
| 111 | 241 [(set (reg:SI LR_REGNO) |
| 0 | 242 (unspec [(match_operand 0 "" "")] |
| 243 UNSPEC_LD_MPIC))] | |
| 244 "(DEFAULT_ABI == ABI_DARWIN) && flag_pic" | |
| 245 { | |
| 246 if (TARGET_32BIT) | |
| 247 emit_insn (gen_load_macho_picbase_si (operands[0])); | |
| 248 else | |
| 249 emit_insn (gen_load_macho_picbase_di (operands[0])); | |
| 250 | |
| 251 DONE; | |
| 252 }) | |
| 253 | |
| 254 (define_insn "load_macho_picbase_si" | |
| 111 | 255 [(set (reg:SI LR_REGNO) |
| 0 | 256 (unspec:SI [(match_operand:SI 0 "immediate_operand" "s") |
| 257 (pc)] UNSPEC_LD_MPIC))] | |
| 258 "(DEFAULT_ABI == ABI_DARWIN) && flag_pic" | |
| 111 | 259 { |
| 260 #if TARGET_MACHO | |
| 261 machopic_should_output_picbase_label (); /* Update for new func. */ | |
| 262 #else | |
| 263 gcc_unreachable (); | |
| 264 #endif | |
| 265 return "bcl 20,31,%0\\n%0:"; | |
| 266 } | |
| 0 | 267 [(set_attr "type" "branch") |
| 111 | 268 (set_attr "cannot_copy" "yes") |
| 0 | 269 (set_attr "length" "4")]) |
| 270 | |
| 271 (define_insn "load_macho_picbase_di" | |
| 111 | 272 [(set (reg:DI LR_REGNO) |
| 0 | 273 (unspec:DI [(match_operand:DI 0 "immediate_operand" "s") |
| 274 (pc)] UNSPEC_LD_MPIC))] | |
| 275 "(DEFAULT_ABI == ABI_DARWIN) && flag_pic && TARGET_64BIT" | |
| 111 | 276 { |
| 277 #if TARGET_MACHO | |
| 278 machopic_should_output_picbase_label (); /* Update for new func. */ | |
| 279 #else | |
| 280 gcc_unreachable (); | |
| 281 #endif | |
| 282 return "bcl 20,31,%0\\n%0:"; | |
| 283 } | |
| 0 | 284 [(set_attr "type" "branch") |
| 111 | 285 (set_attr "cannot_copy" "yes") |
| 0 | 286 (set_attr "length" "4")]) |
| 287 | |
| 288 (define_expand "macho_correct_pic" | |
| 289 [(set (match_operand 0 "" "") | |
| 290 (plus (match_operand 1 "" "") | |
| 291 (unspec [(match_operand 2 "" "") | |
| 292 (match_operand 3 "" "")] | |
| 293 UNSPEC_MPIC_CORRECT)))] | |
| 294 "DEFAULT_ABI == ABI_DARWIN" | |
| 295 { | |
| 296 if (TARGET_32BIT) | |
| 297 emit_insn (gen_macho_correct_pic_si (operands[0], operands[1], operands[2], | |
| 298 operands[3])); | |
| 299 else | |
| 300 emit_insn (gen_macho_correct_pic_di (operands[0], operands[1], operands[2], | |
| 301 operands[3])); | |
| 302 | |
| 303 DONE; | |
| 304 }) | |
| 305 | |
| 306 (define_insn "macho_correct_pic_si" | |
| 307 [(set (match_operand:SI 0 "gpc_reg_operand" "=r") | |
| 308 (plus:SI (match_operand:SI 1 "gpc_reg_operand" "r") | |
| 309 (unspec:SI [(match_operand:SI 2 "immediate_operand" "s") | |
| 310 (match_operand:SI 3 "immediate_operand" "s")] | |
| 311 UNSPEC_MPIC_CORRECT)))] | |
| 312 "DEFAULT_ABI == ABI_DARWIN" | |
| 313 "addis %0,%1,ha16(%2-%3)\n\taddi %0,%0,lo16(%2-%3)" | |
| 314 [(set_attr "length" "8")]) | |
| 315 | |
| 316 (define_insn "macho_correct_pic_di" | |
| 317 [(set (match_operand:DI 0 "gpc_reg_operand" "=r") | |
| 318 (plus:DI (match_operand:DI 1 "gpc_reg_operand" "r") | |
| 319 (unspec:DI [(match_operand:DI 2 "immediate_operand" "s") | |
| 320 (match_operand:DI 3 "immediate_operand" "s")] | |
| 321 16)))] | |
| 322 "DEFAULT_ABI == ABI_DARWIN && TARGET_64BIT" | |
| 323 "addis %0,%1,ha16(%2-%3)\n\taddi %0,%0,lo16(%2-%3)" | |
| 324 [(set_attr "length" "8")]) | |
| 325 | |
| 326 (define_insn "*call_indirect_nonlocal_darwin64" | |
| 327 [(call (mem:SI (match_operand:DI 0 "register_operand" "c,*l,c,*l")) | |
| 328 (match_operand 1 "" "g,g,g,g")) | |
| 329 (use (match_operand:SI 2 "immediate_operand" "O,O,n,n")) | |
| 111 | 330 (clobber (reg:SI LR_REGNO))] |
| 0 | 331 "DEFAULT_ABI == ABI_DARWIN && TARGET_64BIT" |
| 332 { | |
| 333 return "b%T0l"; | |
| 334 } | |
| 335 [(set_attr "type" "jmpreg,jmpreg,jmpreg,jmpreg") | |
| 336 (set_attr "length" "4,4,8,8")]) | |
| 337 | |
| 338 (define_insn "*call_nonlocal_darwin64" | |
| 339 [(call (mem:SI (match_operand:DI 0 "symbol_ref_operand" "s,s")) | |
| 340 (match_operand 1 "" "g,g")) | |
| 341 (use (match_operand:SI 2 "immediate_operand" "O,n")) | |
| 111 | 342 (clobber (reg:SI LR_REGNO))] |
| 0 | 343 "(DEFAULT_ABI == ABI_DARWIN) |
| 344 && (INTVAL (operands[2]) & CALL_LONG) == 0" | |
| 345 { | |
| 346 #if TARGET_MACHO | |
| 347 return output_call(insn, operands, 0, 2); | |
| 348 #else | |
| 349 gcc_unreachable (); | |
| 350 #endif | |
| 351 } | |
| 352 [(set_attr "type" "branch,branch") | |
| 353 (set_attr "length" "4,8")]) | |
| 354 | |
| 355 (define_insn "*call_value_indirect_nonlocal_darwin64" | |
| 356 [(set (match_operand 0 "" "") | |
| 357 (call (mem:SI (match_operand:DI 1 "register_operand" "c,*l,c,*l")) | |
| 358 (match_operand 2 "" "g,g,g,g"))) | |
| 359 (use (match_operand:SI 3 "immediate_operand" "O,O,n,n")) | |
| 111 | 360 (clobber (reg:SI LR_REGNO))] |
| 0 | 361 "DEFAULT_ABI == ABI_DARWIN" |
| 362 { | |
| 363 return "b%T1l"; | |
| 364 } | |
| 365 [(set_attr "type" "jmpreg,jmpreg,jmpreg,jmpreg") | |
| 366 (set_attr "length" "4,4,8,8")]) | |
| 367 | |
| 368 (define_insn "*call_value_nonlocal_darwin64" | |
| 369 [(set (match_operand 0 "" "") | |
| 370 (call (mem:SI (match_operand:DI 1 "symbol_ref_operand" "s,s")) | |
| 371 (match_operand 2 "" "g,g"))) | |
| 372 (use (match_operand:SI 3 "immediate_operand" "O,n")) | |
| 111 | 373 (clobber (reg:SI LR_REGNO))] |
| 0 | 374 "(DEFAULT_ABI == ABI_DARWIN) |
| 375 && (INTVAL (operands[3]) & CALL_LONG) == 0" | |
| 376 { | |
| 377 #if TARGET_MACHO | |
| 378 return output_call(insn, operands, 1, 3); | |
| 379 #else | |
| 380 gcc_unreachable (); | |
| 381 #endif | |
| 382 } | |
| 383 [(set_attr "type" "branch,branch") | |
| 384 (set_attr "length" "4,8")]) | |
| 385 | |
| 111 | 386 (define_expand "reload_macho_picbase" |
| 387 [(set (reg:SI LR_REGNO) | |
| 388 (unspec [(match_operand 0 "" "")] | |
| 389 UNSPEC_RELD_MPIC))] | |
| 390 "(DEFAULT_ABI == ABI_DARWIN) && flag_pic" | |
| 0 | 391 { |
| 111 | 392 if (TARGET_32BIT) |
| 393 emit_insn (gen_reload_macho_picbase_si (operands[0])); | |
| 394 else | |
| 395 emit_insn (gen_reload_macho_picbase_di (operands[0])); | |
| 396 | |
| 397 DONE; | |
| 398 }) | |
| 0 | 399 |
| 111 | 400 (define_insn "reload_macho_picbase_si" |
| 401 [(set (reg:SI LR_REGNO) | |
| 402 (unspec:SI [(match_operand:SI 0 "immediate_operand" "s") | |
| 403 (pc)] UNSPEC_RELD_MPIC))] | |
| 404 "(DEFAULT_ABI == ABI_DARWIN) && flag_pic" | |
| 0 | 405 { |
| 111 | 406 #if TARGET_MACHO |
| 407 if (machopic_should_output_picbase_label ()) | |
| 0 | 408 { |
| 111 | 409 static char tmp[64]; |
| 410 const char *cnam = machopic_get_function_picbase (); | |
| 411 snprintf (tmp, 64, "bcl 20,31,%s\\n%s:\\n%%0:", cnam, cnam); | |
| 412 return tmp; | |
| 0 | 413 } |
| 111 | 414 else |
| 415 #else | |
| 416 gcc_unreachable (); | |
| 417 #endif | |
| 418 return "bcl 20,31,%0\\n%0:"; | |
| 419 } | |
| 0 | 420 [(set_attr "type" "branch") |
| 111 | 421 (set_attr "cannot_copy" "yes") |
| 0 | 422 (set_attr "length" "4")]) |
| 423 | |
| 111 | 424 (define_insn "reload_macho_picbase_di" |
| 425 [(set (reg:DI LR_REGNO) | |
| 426 (unspec:DI [(match_operand:DI 0 "immediate_operand" "s") | |
| 427 (pc)] UNSPEC_RELD_MPIC))] | |
| 428 "(DEFAULT_ABI == ABI_DARWIN) && flag_pic && TARGET_64BIT" | |
| 0 | 429 { |
| 111 | 430 #if TARGET_MACHO |
| 431 if (machopic_should_output_picbase_label ()) | |
| 0 | 432 { |
| 111 | 433 static char tmp[64]; |
| 434 const char *cnam = machopic_get_function_picbase (); | |
| 435 snprintf (tmp, 64, "bcl 20,31,%s\\n%s:\\n%%0:", cnam, cnam); | |
| 436 return tmp; | |
| 0 | 437 } |
| 111 | 438 else |
| 439 #else | |
| 440 gcc_unreachable (); | |
| 441 #endif | |
| 442 return "bcl 20,31,%0\\n%0:"; | |
| 443 } | |
| 0 | 444 [(set_attr "type" "branch") |
| 111 | 445 (set_attr "cannot_copy" "yes") |
| 0 | 446 (set_attr "length" "4")]) |
| 111 | 447 |
| 448 ;; We need to restore the PIC register, at the site of nonlocal label. | |
| 449 | |
| 450 (define_insn_and_split "nonlocal_goto_receiver" | |
| 451 [(unspec_volatile [(const_int 0)] UNSPECV_NLGR)] | |
| 452 "TARGET_MACHO && flag_pic" | |
| 453 "#" | |
| 454 "&& reload_completed" | |
| 455 [(const_int 0)] | |
| 456 { | |
| 457 #if TARGET_MACHO | |
| 458 if (crtl->uses_pic_offset_table) | |
| 459 { | |
| 460 static unsigned n = 0; | |
| 461 rtx picrtx = gen_rtx_SYMBOL_REF (Pmode, MACHOPIC_FUNCTION_BASE_NAME); | |
| 462 rtx picreg = gen_rtx_REG (Pmode, RS6000_PIC_OFFSET_TABLE_REGNUM); | |
| 463 rtx tmplrtx; | |
| 464 char tmplab[20]; | |
| 465 | |
| 466 ASM_GENERATE_INTERNAL_LABEL(tmplab, "Lnlgr", ++n); | |
| 467 tmplrtx = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (tmplab)); | |
| 468 | |
| 469 emit_insn (gen_reload_macho_picbase (tmplrtx)); | |
| 470 emit_move_insn (picreg, gen_rtx_REG (Pmode, LR_REGNO)); | |
| 471 emit_insn (gen_macho_correct_pic (picreg, picreg, picrtx, tmplrtx)); | |
| 472 } | |
| 473 else | |
| 474 /* Not using PIC reg, no reload needed. */ | |
| 475 emit_note (NOTE_INSN_DELETED); | |
| 476 #else | |
| 477 gcc_unreachable (); | |
| 478 #endif | |
| 479 DONE; | |
| 480 }) |