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annotate gcc/config/rs6000/vector.md @ 111:04ced10e8804

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gcc 7
author kono
date Fri, 27 Oct 2017 22:46:09 +0900
parents f6334be47118
children 84e7813d76e9
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
55
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1 ;; Expander definitions for vector support between altivec & vsx. No
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2 ;; instructions are in this file, this file provides the generic vector
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3 ;; expander, and the actual vector instructions will be in altivec.md and
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4 ;; vsx.md
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5
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6 ;; Copyright (C) 2009-2017 Free Software Foundation, Inc.
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7 ;; Contributed by Michael Meissner <meissner@linux.vnet.ibm.com>
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8
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9 ;; This file is part of GCC.
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10
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11 ;; GCC is free software; you can redistribute it and/or modify it
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12 ;; under the terms of the GNU General Public License as published
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13 ;; by the Free Software Foundation; either version 3, or (at your
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14 ;; option) any later version.
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15
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16 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
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17 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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18 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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19 ;; License for more details.
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20
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21 ;; You should have received a copy of the GNU General Public License
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22 ;; along with GCC; see the file COPYING3. If not see
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23 ;; <http://www.gnu.org/licenses/>.
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24
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25
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26 ;; Vector int modes
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27 (define_mode_iterator VEC_I [V16QI V8HI V4SI V2DI])
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28
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29 ;; Vector int modes for parity
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30 (define_mode_iterator VEC_IP [V8HI
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31 V4SI
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32 V2DI
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33 V1TI
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34 TI])
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35
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36 ;; Vector float modes
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37 (define_mode_iterator VEC_F [V4SF V2DF])
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38
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39 ;; Vector arithmetic modes
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40 (define_mode_iterator VEC_A [V16QI V8HI V4SI V2DI V4SF V2DF])
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41
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42 ;; Vector modes that need alginment via permutes
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43 (define_mode_iterator VEC_K [V16QI V8HI V4SI V4SF])
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44
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45 ;; Vector logical modes
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46 (define_mode_iterator VEC_L [V16QI V8HI V4SI V2DI V4SF V2DF V1TI TI KF TF])
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47
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48 ;; Vector modes for moves. Don't do TImode or TFmode here, since their
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49 ;; moves are handled elsewhere.
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50 (define_mode_iterator VEC_M [V16QI V8HI V4SI V2DI V4SF V2DF V1TI KF])
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51
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52 ;; Vector modes for types that don't need a realignment under VSX
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53 (define_mode_iterator VEC_N [V4SI V4SF V2DI V2DF V1TI KF TF])
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54
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55 ;; Vector comparison modes
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56 (define_mode_iterator VEC_C [V16QI V8HI V4SI V2DI V4SF V2DF])
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57
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58 ;; Vector init/extract modes
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59 (define_mode_iterator VEC_E [V16QI V8HI V4SI V2DI V4SF V2DF])
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60
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61 ;; Vector modes for 64-bit base types
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62 (define_mode_iterator VEC_64 [V2DI V2DF])
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63
111
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64 ;; Vector integer modes
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65 (define_mode_iterator VI [V4SI V8HI V16QI])
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66
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67 ;; Base type from vector mode
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68 (define_mode_attr VEC_base [(V16QI "QI")
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69 (V8HI "HI")
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70 (V4SI "SI")
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71 (V2DI "DI")
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72 (V4SF "SF")
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73 (V2DF "DF")
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74 (V1TI "TI")
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75 (TI "TI")])
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76
111
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77 ;; As above, but in lower case
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78 (define_mode_attr VEC_base_l [(V16QI "qi")
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79 (V8HI "hi")
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80 (V4SI "si")
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81 (V2DI "di")
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82 (V4SF "sf")
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83 (V2DF "df")
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84 (V1TI "ti")
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85 (TI "ti")])
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86
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87 ;; Same size integer type for floating point data
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88 (define_mode_attr VEC_int [(V4SF "v4si")
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89 (V2DF "v2di")])
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90
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91 (define_mode_attr VEC_INT [(V4SF "V4SI")
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92 (V2DF "V2DI")])
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93
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94 ;; constants for unspec
111
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95 (define_c_enum "unspec" [UNSPEC_PREDICATE
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96 UNSPEC_REDUC
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97 UNSPEC_NEZ_P])
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98
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99 ;; Vector reduction code iterators
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100 (define_code_iterator VEC_reduc [plus smin smax])
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101
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102 (define_code_attr VEC_reduc_name [(plus "plus")
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103 (smin "smin")
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104 (smax "smax")])
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105
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106 (define_code_attr VEC_reduc_rtx [(plus "add")
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107 (smin "smin")
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108 (smax "smax")])
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109
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110
111
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111 ;; Vector move instructions. Little-endian VSX loads and stores require
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112 ;; special handling to circumvent "element endianness."
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113 (define_expand "mov<mode>"
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114 [(set (match_operand:VEC_M 0 "nonimmediate_operand" "")
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115 (match_operand:VEC_M 1 "any_operand" ""))]
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116 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
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117 {
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118 if (can_create_pseudo_p ())
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119 {
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120 if (CONSTANT_P (operands[1]))
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121 {
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122 if (FLOAT128_VECTOR_P (<MODE>mode))
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123 {
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124 if (!easy_fp_constant (operands[1], <MODE>mode))
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125 operands[1] = force_const_mem (<MODE>mode, operands[1]);
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126 }
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127 else if (!easy_vector_constant (operands[1], <MODE>mode))
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128 operands[1] = force_const_mem (<MODE>mode, operands[1]);
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129 }
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130
111
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131 if (!vlogical_operand (operands[0], <MODE>mode)
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132 && !vlogical_operand (operands[1], <MODE>mode))
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133 operands[1] = force_reg (<MODE>mode, operands[1]);
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134 }
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135 if (!BYTES_BIG_ENDIAN
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136 && VECTOR_MEM_VSX_P (<MODE>mode)
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137 && !TARGET_P9_VECTOR
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138 && !gpr_or_gpr_p (operands[0], operands[1])
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139 && (memory_operand (operands[0], <MODE>mode)
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140 ^ memory_operand (operands[1], <MODE>mode)))
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141 {
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142 rs6000_emit_le_vsx_move (operands[0], operands[1], <MODE>mode);
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143 DONE;
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144 }
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145 })
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146
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147 ;; Generic vector floating point load/store instructions. These will match
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148 ;; insns defined in vsx.md or altivec.md depending on the switches.
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149 (define_expand "vector_load_<mode>"
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150 [(set (match_operand:VEC_M 0 "vfloat_operand" "")
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151 (match_operand:VEC_M 1 "memory_operand" ""))]
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152 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
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153 "")
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154
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155 (define_expand "vector_store_<mode>"
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156 [(set (match_operand:VEC_M 0 "memory_operand" "")
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157 (match_operand:VEC_M 1 "vfloat_operand" ""))]
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158 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
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ryoma <e075725@ie.u-ryukyu.ac.jp>
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diff changeset
159 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
160
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
161 ;; Splits if a GPR register was chosen for the move
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
162 (define_split
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
163 [(set (match_operand:VEC_L 0 "nonimmediate_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
164 (match_operand:VEC_L 1 "input_operand" ""))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
165 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
166 && reload_completed
111
kono
parents: 67
diff changeset
167 && gpr_or_gpr_p (operands[0], operands[1])
kono
parents: 67
diff changeset
168 && !direct_move_p (operands[0], operands[1])
kono
parents: 67
diff changeset
169 && !quad_load_store_p (operands[0], operands[1])"
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
170 [(pc)]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
171 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
172 rs6000_split_multireg_move (operands[0], operands[1]);
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
173 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
174 })
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
175
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
176 ;; Vector floating point load/store instructions that uses the Altivec
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
177 ;; instructions even if we are compiling for VSX, since the Altivec
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
178 ;; instructions silently ignore the bottom 3 bits of the address, and VSX does
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
179 ;; not.
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
180 (define_expand "vector_altivec_load_<mode>"
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
181 [(set (match_operand:VEC_M 0 "vfloat_operand" "")
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
182 (match_operand:VEC_M 1 "memory_operand" ""))]
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
183 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
184 "
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
185 {
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
186 gcc_assert (VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode));
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
187
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
188 if (VECTOR_MEM_VSX_P (<MODE>mode))
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
189 {
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
190 operands[1] = rs6000_address_for_altivec (operands[1]);
111
kono
parents: 67
diff changeset
191 rtx and_op = XEXP (operands[1], 0);
kono
parents: 67
diff changeset
192 gcc_assert (GET_CODE (and_op) == AND);
kono
parents: 67
diff changeset
193 rtx addr = XEXP (and_op, 0);
kono
parents: 67
diff changeset
194 if (GET_CODE (addr) == PLUS)
kono
parents: 67
diff changeset
195 emit_insn (gen_altivec_lvx_<mode>_2op (operands[0], XEXP (addr, 0),
kono
parents: 67
diff changeset
196 XEXP (addr, 1)));
kono
parents: 67
diff changeset
197 else
kono
parents: 67
diff changeset
198 emit_insn (gen_altivec_lvx_<mode>_1op (operands[0], operands[1]));
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
199 DONE;
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
200 }
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
201 }")
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
202
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
203 (define_expand "vector_altivec_store_<mode>"
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
204 [(set (match_operand:VEC_M 0 "memory_operand" "")
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
205 (match_operand:VEC_M 1 "vfloat_operand" ""))]
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
206 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
207 "
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
208 {
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
209 gcc_assert (VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode));
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
210
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
211 if (VECTOR_MEM_VSX_P (<MODE>mode))
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
212 {
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
213 operands[0] = rs6000_address_for_altivec (operands[0]);
111
kono
parents: 67
diff changeset
214 rtx and_op = XEXP (operands[0], 0);
kono
parents: 67
diff changeset
215 gcc_assert (GET_CODE (and_op) == AND);
kono
parents: 67
diff changeset
216 rtx addr = XEXP (and_op, 0);
kono
parents: 67
diff changeset
217 if (GET_CODE (addr) == PLUS)
kono
parents: 67
diff changeset
218 emit_insn (gen_altivec_stvx_<mode>_2op (operands[1], XEXP (addr, 0),
kono
parents: 67
diff changeset
219 XEXP (addr, 1)));
kono
parents: 67
diff changeset
220 else
kono
parents: 67
diff changeset
221 emit_insn (gen_altivec_stvx_<mode>_1op (operands[1], operands[0]));
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
222 DONE;
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
223 }
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
224 }")
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
225
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
226
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
227
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
228 ;; Generic floating point vector arithmetic support
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
229 (define_expand "add<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
230 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
231 (plus:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
232 (match_operand:VEC_F 2 "vfloat_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
233 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
234 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
235
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
236 (define_expand "sub<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
237 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
238 (minus:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
239 (match_operand:VEC_F 2 "vfloat_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
240 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
241 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
242
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
243 (define_expand "mul<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
244 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
245 (mult:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
246 (match_operand:VEC_F 2 "vfloat_operand" "")))]
111
kono
parents: 67
diff changeset
247 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
248 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
249 if (<MODE>mode == V4SFmode && VECTOR_UNIT_ALTIVEC_P (<MODE>mode))
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
250 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
251 emit_insn (gen_altivec_mulv4sf3 (operands[0], operands[1], operands[2]));
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
252 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
253 }
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
254 })
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
255
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
256 (define_expand "div<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
257 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
258 (div:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
259 (match_operand:VEC_F 2 "vfloat_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
260 "VECTOR_UNIT_VSX_P (<MODE>mode)"
111
kono
parents: 67
diff changeset
261 {
kono
parents: 67
diff changeset
262 if (RS6000_RECIP_AUTO_RE_P (<MODE>mode)
kono
parents: 67
diff changeset
263 && can_create_pseudo_p () && flag_finite_math_only
kono
parents: 67
diff changeset
264 && !flag_trapping_math && flag_reciprocal_math)
kono
parents: 67
diff changeset
265 {
kono
parents: 67
diff changeset
266 rs6000_emit_swdiv (operands[0], operands[1], operands[2], true);
kono
parents: 67
diff changeset
267 DONE;
kono
parents: 67
diff changeset
268 }
kono
parents: 67
diff changeset
269 })
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
270
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
271 (define_expand "neg<mode>2"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
272 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
273 (neg:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
274 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
275 "
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
276 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
277 if (<MODE>mode == V4SFmode && VECTOR_UNIT_ALTIVEC_P (<MODE>mode))
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
278 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
279 emit_insn (gen_altivec_negv4sf2 (operands[0], operands[1]));
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
280 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
281 }
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
282 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
283
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
284 (define_expand "abs<mode>2"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
285 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
286 (abs:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
287 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
288 "
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
289 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
290 if (<MODE>mode == V4SFmode && VECTOR_UNIT_ALTIVEC_P (<MODE>mode))
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
291 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
292 emit_insn (gen_altivec_absv4sf2 (operands[0], operands[1]));
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
293 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
294 }
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
295 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
296
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
297 (define_expand "smin<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
298 [(set (match_operand:VEC_F 0 "register_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
299 (smin:VEC_F (match_operand:VEC_F 1 "register_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
300 (match_operand:VEC_F 2 "register_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
301 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
302 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
303
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
304 (define_expand "smax<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
305 [(set (match_operand:VEC_F 0 "register_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
306 (smax:VEC_F (match_operand:VEC_F 1 "register_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
307 (match_operand:VEC_F 2 "register_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
308 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
309 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
310
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
311
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
312 (define_expand "sqrt<mode>2"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
313 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
314 (sqrt:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
315 "VECTOR_UNIT_VSX_P (<MODE>mode)"
111
kono
parents: 67
diff changeset
316 {
kono
parents: 67
diff changeset
317 if (<MODE>mode == V4SFmode
kono
parents: 67
diff changeset
318 && !optimize_function_for_size_p (cfun)
kono
parents: 67
diff changeset
319 && flag_finite_math_only && !flag_trapping_math
kono
parents: 67
diff changeset
320 && flag_unsafe_math_optimizations)
kono
parents: 67
diff changeset
321 {
kono
parents: 67
diff changeset
322 rs6000_emit_swsqrt (operands[0], operands[1], 0);
kono
parents: 67
diff changeset
323 DONE;
kono
parents: 67
diff changeset
324 }
kono
parents: 67
diff changeset
325 })
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
326
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
327 (define_expand "rsqrte<mode>2"
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
328 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
329 (unspec:VEC_F [(match_operand:VEC_F 1 "vfloat_operand" "")]
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
330 UNSPEC_RSQRT))]
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
331 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
332 "")
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
333
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
334 (define_expand "re<mode>2"
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
335 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
336 (unspec:VEC_F [(match_operand:VEC_F 1 "vfloat_operand" "f")]
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
337 UNSPEC_FRES))]
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
338 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
339 "")
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
340
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
341 (define_expand "ftrunc<mode>2"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
342 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
343 (fix:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
344 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
345 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
346
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
347 (define_expand "vector_ceil<mode>2"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
348 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
349 (unspec:VEC_F [(match_operand:VEC_F 1 "vfloat_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
350 UNSPEC_FRIP))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
351 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
352 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
353
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
354 (define_expand "vector_floor<mode>2"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
355 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
356 (unspec:VEC_F [(match_operand:VEC_F 1 "vfloat_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
357 UNSPEC_FRIM))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
358 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
359 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
360
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
361 (define_expand "vector_btrunc<mode>2"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
362 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
363 (fix:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
364 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
365 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
366
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
367 (define_expand "vector_copysign<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
368 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
67
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
369 (unspec:VEC_F [(match_operand:VEC_F 1 "vfloat_operand" "")
f6334be47118 update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents: 63
diff changeset
370 (match_operand:VEC_F 2 "vfloat_operand" "")] UNSPEC_COPYSIGN))]
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
371 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
372 "
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
373 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
374 if (<MODE>mode == V4SFmode && VECTOR_UNIT_ALTIVEC_P (<MODE>mode))
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
375 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
376 emit_insn (gen_altivec_copysign_v4sf3 (operands[0], operands[1],
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
377 operands[2]));
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
378 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
379 }
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
380 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
381
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
382
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
383 ;; Vector comparisons
111
kono
parents: 67
diff changeset
384 (define_expand "vcond<mode><mode>"
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
385 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
386 (if_then_else:VEC_F
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
387 (match_operator 3 "comparison_operator"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
388 [(match_operand:VEC_F 4 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
389 (match_operand:VEC_F 5 "vfloat_operand" "")])
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
390 (match_operand:VEC_F 1 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
391 (match_operand:VEC_F 2 "vfloat_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
392 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
393 "
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
394 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
395 if (rs6000_emit_vector_cond_expr (operands[0], operands[1], operands[2],
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
396 operands[3], operands[4], operands[5]))
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
397 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
398 else
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
399 FAIL;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
400 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
401
111
kono
parents: 67
diff changeset
402 (define_expand "vcond<mode><mode>"
kono
parents: 67
diff changeset
403 [(set (match_operand:VEC_I 0 "vint_operand")
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
404 (if_then_else:VEC_I
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
405 (match_operator 3 "comparison_operator"
111
kono
parents: 67
diff changeset
406 [(match_operand:VEC_I 4 "vint_operand")
kono
parents: 67
diff changeset
407 (match_operand:VEC_I 5 "vint_operand")])
kono
parents: 67
diff changeset
408 (match_operand:VEC_I 1 "vector_int_reg_or_same_bit")
kono
parents: 67
diff changeset
409 (match_operand:VEC_I 2 "vector_int_reg_or_same_bit")))]
kono
parents: 67
diff changeset
410 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
kono
parents: 67
diff changeset
411 "
kono
parents: 67
diff changeset
412 {
kono
parents: 67
diff changeset
413 if (rs6000_emit_vector_cond_expr (operands[0], operands[1], operands[2],
kono
parents: 67
diff changeset
414 operands[3], operands[4], operands[5]))
kono
parents: 67
diff changeset
415 DONE;
kono
parents: 67
diff changeset
416 else
kono
parents: 67
diff changeset
417 FAIL;
kono
parents: 67
diff changeset
418 }")
kono
parents: 67
diff changeset
419
kono
parents: 67
diff changeset
420 (define_expand "vcondv4sfv4si"
kono
parents: 67
diff changeset
421 [(set (match_operand:V4SF 0 "vfloat_operand" "")
kono
parents: 67
diff changeset
422 (if_then_else:V4SF
kono
parents: 67
diff changeset
423 (match_operator 3 "comparison_operator"
kono
parents: 67
diff changeset
424 [(match_operand:V4SI 4 "vint_operand" "")
kono
parents: 67
diff changeset
425 (match_operand:V4SI 5 "vint_operand" "")])
kono
parents: 67
diff changeset
426 (match_operand:V4SF 1 "vfloat_operand" "")
kono
parents: 67
diff changeset
427 (match_operand:V4SF 2 "vfloat_operand" "")))]
kono
parents: 67
diff changeset
428 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SFmode)
kono
parents: 67
diff changeset
429 && VECTOR_UNIT_ALTIVEC_P (V4SImode)"
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
430 "
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
431 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
432 if (rs6000_emit_vector_cond_expr (operands[0], operands[1], operands[2],
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
433 operands[3], operands[4], operands[5]))
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
434 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
435 else
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
436 FAIL;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
437 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
438
111
kono
parents: 67
diff changeset
439 (define_expand "vcondv4siv4sf"
kono
parents: 67
diff changeset
440 [(set (match_operand:V4SI 0 "vint_operand" "")
kono
parents: 67
diff changeset
441 (if_then_else:V4SI
kono
parents: 67
diff changeset
442 (match_operator 3 "comparison_operator"
kono
parents: 67
diff changeset
443 [(match_operand:V4SF 4 "vfloat_operand" "")
kono
parents: 67
diff changeset
444 (match_operand:V4SF 5 "vfloat_operand" "")])
kono
parents: 67
diff changeset
445 (match_operand:V4SI 1 "vint_operand" "")
kono
parents: 67
diff changeset
446 (match_operand:V4SI 2 "vint_operand" "")))]
kono
parents: 67
diff changeset
447 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SFmode)
kono
parents: 67
diff changeset
448 && VECTOR_UNIT_ALTIVEC_P (V4SImode)"
kono
parents: 67
diff changeset
449 "
kono
parents: 67
diff changeset
450 {
kono
parents: 67
diff changeset
451 if (rs6000_emit_vector_cond_expr (operands[0], operands[1], operands[2],
kono
parents: 67
diff changeset
452 operands[3], operands[4], operands[5]))
kono
parents: 67
diff changeset
453 DONE;
kono
parents: 67
diff changeset
454 else
kono
parents: 67
diff changeset
455 FAIL;
kono
parents: 67
diff changeset
456 }")
kono
parents: 67
diff changeset
457
kono
parents: 67
diff changeset
458 (define_expand "vcondu<mode><mode>"
kono
parents: 67
diff changeset
459 [(set (match_operand:VEC_I 0 "vint_operand")
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
460 (if_then_else:VEC_I
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
461 (match_operator 3 "comparison_operator"
111
kono
parents: 67
diff changeset
462 [(match_operand:VEC_I 4 "vint_operand")
kono
parents: 67
diff changeset
463 (match_operand:VEC_I 5 "vint_operand")])
kono
parents: 67
diff changeset
464 (match_operand:VEC_I 1 "vector_int_reg_or_same_bit")
kono
parents: 67
diff changeset
465 (match_operand:VEC_I 2 "vector_int_reg_or_same_bit")))]
kono
parents: 67
diff changeset
466 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
kono
parents: 67
diff changeset
467 "
kono
parents: 67
diff changeset
468 {
kono
parents: 67
diff changeset
469 if (rs6000_emit_vector_cond_expr (operands[0], operands[1], operands[2],
kono
parents: 67
diff changeset
470 operands[3], operands[4], operands[5]))
kono
parents: 67
diff changeset
471 DONE;
kono
parents: 67
diff changeset
472 else
kono
parents: 67
diff changeset
473 FAIL;
kono
parents: 67
diff changeset
474 }")
kono
parents: 67
diff changeset
475
kono
parents: 67
diff changeset
476 (define_expand "vconduv4sfv4si"
kono
parents: 67
diff changeset
477 [(set (match_operand:V4SF 0 "vfloat_operand" "")
kono
parents: 67
diff changeset
478 (if_then_else:V4SF
kono
parents: 67
diff changeset
479 (match_operator 3 "comparison_operator"
kono
parents: 67
diff changeset
480 [(match_operand:V4SI 4 "vint_operand" "")
kono
parents: 67
diff changeset
481 (match_operand:V4SI 5 "vint_operand" "")])
kono
parents: 67
diff changeset
482 (match_operand:V4SF 1 "vfloat_operand" "")
kono
parents: 67
diff changeset
483 (match_operand:V4SF 2 "vfloat_operand" "")))]
kono
parents: 67
diff changeset
484 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SFmode)
kono
parents: 67
diff changeset
485 && VECTOR_UNIT_ALTIVEC_P (V4SImode)"
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
486 "
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
487 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
488 if (rs6000_emit_vector_cond_expr (operands[0], operands[1], operands[2],
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
489 operands[3], operands[4], operands[5]))
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
490 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
491 else
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
492 FAIL;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
493 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
494
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
495 (define_expand "vector_eq<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
496 [(set (match_operand:VEC_C 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
497 (eq:VEC_C (match_operand:VEC_C 1 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
498 (match_operand:VEC_C 2 "vlogical_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
499 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
500 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
501
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
502 (define_expand "vector_gt<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
503 [(set (match_operand:VEC_C 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
504 (gt:VEC_C (match_operand:VEC_C 1 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
505 (match_operand:VEC_C 2 "vlogical_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
506 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
507 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
508
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
509 (define_expand "vector_ge<mode>"
111
kono
parents: 67
diff changeset
510 [(set (match_operand:VEC_F 0 "vlogical_operand" "")
kono
parents: 67
diff changeset
511 (ge:VEC_F (match_operand:VEC_F 1 "vlogical_operand" "")
kono
parents: 67
diff changeset
512 (match_operand:VEC_F 2 "vlogical_operand" "")))]
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
513 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
514 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
515
111
kono
parents: 67
diff changeset
516 ; >= for integer vectors: swap operands and apply not-greater-than
kono
parents: 67
diff changeset
517 (define_expand "vector_nlt<mode>"
kono
parents: 67
diff changeset
518 [(set (match_operand:VEC_I 3 "vlogical_operand" "")
kono
parents: 67
diff changeset
519 (gt:VEC_I (match_operand:VEC_I 2 "vlogical_operand" "")
kono
parents: 67
diff changeset
520 (match_operand:VEC_I 1 "vlogical_operand" "")))
kono
parents: 67
diff changeset
521 (set (match_operand:VEC_I 0 "vlogical_operand" "")
kono
parents: 67
diff changeset
522 (not:VEC_I (match_dup 3)))]
kono
parents: 67
diff changeset
523 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
kono
parents: 67
diff changeset
524 "
kono
parents: 67
diff changeset
525 {
kono
parents: 67
diff changeset
526 operands[3] = gen_reg_rtx_and_attrs (operands[0]);
kono
parents: 67
diff changeset
527 }")
kono
parents: 67
diff changeset
528
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
529 (define_expand "vector_gtu<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
530 [(set (match_operand:VEC_I 0 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
531 (gtu:VEC_I (match_operand:VEC_I 1 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
532 (match_operand:VEC_I 2 "vint_operand" "")))]
111
kono
parents: 67
diff changeset
533 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
534 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
535
111
kono
parents: 67
diff changeset
536 ; >= for integer vectors: swap operands and apply not-greater-than
kono
parents: 67
diff changeset
537 (define_expand "vector_nltu<mode>"
kono
parents: 67
diff changeset
538 [(set (match_operand:VEC_I 3 "vlogical_operand" "")
kono
parents: 67
diff changeset
539 (gtu:VEC_I (match_operand:VEC_I 2 "vlogical_operand" "")
kono
parents: 67
diff changeset
540 (match_operand:VEC_I 1 "vlogical_operand" "")))
kono
parents: 67
diff changeset
541 (set (match_operand:VEC_I 0 "vlogical_operand" "")
kono
parents: 67
diff changeset
542 (not:VEC_I (match_dup 3)))]
kono
parents: 67
diff changeset
543 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
kono
parents: 67
diff changeset
544 "
kono
parents: 67
diff changeset
545 {
kono
parents: 67
diff changeset
546 operands[3] = gen_reg_rtx_and_attrs (operands[0]);
kono
parents: 67
diff changeset
547 }")
kono
parents: 67
diff changeset
548
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
549 (define_expand "vector_geu<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
550 [(set (match_operand:VEC_I 0 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
551 (geu:VEC_I (match_operand:VEC_I 1 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
552 (match_operand:VEC_I 2 "vint_operand" "")))]
111
kono
parents: 67
diff changeset
553 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
554 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
555
111
kono
parents: 67
diff changeset
556 ; <= for integer vectors: apply not-greater-than
kono
parents: 67
diff changeset
557 (define_expand "vector_ngt<mode>"
kono
parents: 67
diff changeset
558 [(set (match_operand:VEC_I 3 "vlogical_operand" "")
kono
parents: 67
diff changeset
559 (gt:VEC_I (match_operand:VEC_I 1 "vlogical_operand" "")
kono
parents: 67
diff changeset
560 (match_operand:VEC_I 2 "vlogical_operand" "")))
kono
parents: 67
diff changeset
561 (set (match_operand:VEC_I 0 "vlogical_operand" "")
kono
parents: 67
diff changeset
562 (not:VEC_I (match_dup 3)))]
kono
parents: 67
diff changeset
563 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
kono
parents: 67
diff changeset
564 "
kono
parents: 67
diff changeset
565 {
kono
parents: 67
diff changeset
566 operands[3] = gen_reg_rtx_and_attrs (operands[0]);
kono
parents: 67
diff changeset
567 }")
kono
parents: 67
diff changeset
568
kono
parents: 67
diff changeset
569 (define_expand "vector_ngtu<mode>"
kono
parents: 67
diff changeset
570 [(set (match_operand:VEC_I 3 "vlogical_operand" "")
kono
parents: 67
diff changeset
571 (gtu:VEC_I (match_operand:VEC_I 1 "vlogical_operand" "")
kono
parents: 67
diff changeset
572 (match_operand:VEC_I 2 "vlogical_operand" "")))
kono
parents: 67
diff changeset
573 (set (match_operand:VEC_I 0 "vlogical_operand" "")
kono
parents: 67
diff changeset
574 (not:VEC_I (match_dup 3)))]
kono
parents: 67
diff changeset
575 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
kono
parents: 67
diff changeset
576 "
kono
parents: 67
diff changeset
577 {
kono
parents: 67
diff changeset
578 operands[3] = gen_reg_rtx_and_attrs (operands[0]);
kono
parents: 67
diff changeset
579 }")
kono
parents: 67
diff changeset
580
kono
parents: 67
diff changeset
581 (define_insn_and_split "*vector_uneq<mode>"
kono
parents: 67
diff changeset
582 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
kono
parents: 67
diff changeset
583 (uneq:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")
kono
parents: 67
diff changeset
584 (match_operand:VEC_F 2 "vfloat_operand" "")))]
kono
parents: 67
diff changeset
585 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
kono
parents: 67
diff changeset
586 "#"
kono
parents: 67
diff changeset
587 ""
kono
parents: 67
diff changeset
588 [(set (match_dup 3)
kono
parents: 67
diff changeset
589 (gt:VEC_F (match_dup 1)
kono
parents: 67
diff changeset
590 (match_dup 2)))
kono
parents: 67
diff changeset
591 (set (match_dup 4)
kono
parents: 67
diff changeset
592 (gt:VEC_F (match_dup 2)
kono
parents: 67
diff changeset
593 (match_dup 1)))
kono
parents: 67
diff changeset
594 (set (match_dup 0)
kono
parents: 67
diff changeset
595 (and:VEC_F (not:VEC_F (match_dup 3))
kono
parents: 67
diff changeset
596 (not:VEC_F (match_dup 4))))]
kono
parents: 67
diff changeset
597 {
kono
parents: 67
diff changeset
598 operands[3] = gen_reg_rtx (<MODE>mode);
kono
parents: 67
diff changeset
599 operands[4] = gen_reg_rtx (<MODE>mode);
kono
parents: 67
diff changeset
600 })
kono
parents: 67
diff changeset
601
kono
parents: 67
diff changeset
602 (define_insn_and_split "*vector_ltgt<mode>"
kono
parents: 67
diff changeset
603 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
kono
parents: 67
diff changeset
604 (ltgt:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")
kono
parents: 67
diff changeset
605 (match_operand:VEC_F 2 "vfloat_operand" "")))]
kono
parents: 67
diff changeset
606 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
kono
parents: 67
diff changeset
607 "#"
kono
parents: 67
diff changeset
608 ""
kono
parents: 67
diff changeset
609 [(set (match_dup 3)
kono
parents: 67
diff changeset
610 (gt:VEC_F (match_dup 1)
kono
parents: 67
diff changeset
611 (match_dup 2)))
kono
parents: 67
diff changeset
612 (set (match_dup 4)
kono
parents: 67
diff changeset
613 (gt:VEC_F (match_dup 2)
kono
parents: 67
diff changeset
614 (match_dup 1)))
kono
parents: 67
diff changeset
615 (set (match_dup 0)
kono
parents: 67
diff changeset
616 (ior:VEC_F (match_dup 3)
kono
parents: 67
diff changeset
617 (match_dup 4)))]
kono
parents: 67
diff changeset
618 "
kono
parents: 67
diff changeset
619 {
kono
parents: 67
diff changeset
620 operands[3] = gen_reg_rtx (<MODE>mode);
kono
parents: 67
diff changeset
621 operands[4] = gen_reg_rtx (<MODE>mode);
kono
parents: 67
diff changeset
622 }")
kono
parents: 67
diff changeset
623
kono
parents: 67
diff changeset
624 (define_insn_and_split "*vector_ordered<mode>"
kono
parents: 67
diff changeset
625 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
kono
parents: 67
diff changeset
626 (ordered:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")
kono
parents: 67
diff changeset
627 (match_operand:VEC_F 2 "vfloat_operand" "")))]
kono
parents: 67
diff changeset
628 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
kono
parents: 67
diff changeset
629 "#"
kono
parents: 67
diff changeset
630 ""
kono
parents: 67
diff changeset
631 [(set (match_dup 3)
kono
parents: 67
diff changeset
632 (ge:VEC_F (match_dup 1)
kono
parents: 67
diff changeset
633 (match_dup 2)))
kono
parents: 67
diff changeset
634 (set (match_dup 4)
kono
parents: 67
diff changeset
635 (ge:VEC_F (match_dup 2)
kono
parents: 67
diff changeset
636 (match_dup 1)))
kono
parents: 67
diff changeset
637 (set (match_dup 0)
kono
parents: 67
diff changeset
638 (ior:VEC_F (match_dup 3)
kono
parents: 67
diff changeset
639 (match_dup 4)))]
kono
parents: 67
diff changeset
640 "
kono
parents: 67
diff changeset
641 {
kono
parents: 67
diff changeset
642 operands[3] = gen_reg_rtx (<MODE>mode);
kono
parents: 67
diff changeset
643 operands[4] = gen_reg_rtx (<MODE>mode);
kono
parents: 67
diff changeset
644 }")
kono
parents: 67
diff changeset
645
kono
parents: 67
diff changeset
646 (define_insn_and_split "*vector_unordered<mode>"
kono
parents: 67
diff changeset
647 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
kono
parents: 67
diff changeset
648 (unordered:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")
kono
parents: 67
diff changeset
649 (match_operand:VEC_F 2 "vfloat_operand" "")))]
kono
parents: 67
diff changeset
650 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
kono
parents: 67
diff changeset
651 "#"
kono
parents: 67
diff changeset
652 ""
kono
parents: 67
diff changeset
653 [(set (match_dup 3)
kono
parents: 67
diff changeset
654 (ge:VEC_F (match_dup 1)
kono
parents: 67
diff changeset
655 (match_dup 2)))
kono
parents: 67
diff changeset
656 (set (match_dup 4)
kono
parents: 67
diff changeset
657 (ge:VEC_F (match_dup 2)
kono
parents: 67
diff changeset
658 (match_dup 1)))
kono
parents: 67
diff changeset
659 (set (match_dup 0)
kono
parents: 67
diff changeset
660 (and:VEC_F (not:VEC_F (match_dup 3))
kono
parents: 67
diff changeset
661 (not:VEC_F (match_dup 4))))]
kono
parents: 67
diff changeset
662 "
kono
parents: 67
diff changeset
663 {
kono
parents: 67
diff changeset
664 operands[3] = gen_reg_rtx (<MODE>mode);
kono
parents: 67
diff changeset
665 operands[4] = gen_reg_rtx (<MODE>mode);
kono
parents: 67
diff changeset
666 }")
kono
parents: 67
diff changeset
667
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
668 ;; Note the arguments for __builtin_altivec_vsel are op2, op1, mask
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
669 ;; which is in the reverse order that we want
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
670 (define_expand "vector_select_<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
671 [(set (match_operand:VEC_L 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
672 (if_then_else:VEC_L
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
673 (ne:CC (match_operand:VEC_L 3 "vlogical_operand" "")
111
kono
parents: 67
diff changeset
674 (match_dup 4))
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
675 (match_operand:VEC_L 2 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
676 (match_operand:VEC_L 1 "vlogical_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
677 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
111
kono
parents: 67
diff changeset
678 "operands[4] = CONST0_RTX (<MODE>mode);")
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
679
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
680 (define_expand "vector_select_<mode>_uns"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
681 [(set (match_operand:VEC_L 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
682 (if_then_else:VEC_L
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
683 (ne:CCUNS (match_operand:VEC_L 3 "vlogical_operand" "")
111
kono
parents: 67
diff changeset
684 (match_dup 4))
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
685 (match_operand:VEC_L 2 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
686 (match_operand:VEC_L 1 "vlogical_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
687 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
111
kono
parents: 67
diff changeset
688 "operands[4] = CONST0_RTX (<MODE>mode);")
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
689
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
690 ;; Expansions that compare vectors producing a vector result and a predicate,
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
691 ;; setting CR6 to indicate a combined status
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
692 (define_expand "vector_eq_<mode>_p"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
693 [(parallel
111
kono
parents: 67
diff changeset
694 [(set (reg:CC CR6_REGNO)
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
695 (unspec:CC [(eq:CC (match_operand:VEC_A 1 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
696 (match_operand:VEC_A 2 "vlogical_operand" ""))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
697 UNSPEC_PREDICATE))
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
698 (set (match_operand:VEC_A 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
699 (eq:VEC_A (match_dup 1)
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
700 (match_dup 2)))])]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
701 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
702 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
703
111
kono
parents: 67
diff changeset
704 ;; This expansion handles the V16QI, V8HI, and V4SI modes in the
kono
parents: 67
diff changeset
705 ;; implementation of the vec_all_ne built-in functions on Power9.
kono
parents: 67
diff changeset
706 (define_expand "vector_ne_<mode>_p"
kono
parents: 67
diff changeset
707 [(parallel
kono
parents: 67
diff changeset
708 [(set (reg:CC CR6_REGNO)
kono
parents: 67
diff changeset
709 (unspec:CC [(ne:CC (match_operand:VI 1 "vlogical_operand")
kono
parents: 67
diff changeset
710 (match_operand:VI 2 "vlogical_operand"))]
kono
parents: 67
diff changeset
711 UNSPEC_PREDICATE))
kono
parents: 67
diff changeset
712 (set (match_dup 3)
kono
parents: 67
diff changeset
713 (ne:VI (match_dup 1)
kono
parents: 67
diff changeset
714 (match_dup 2)))])
kono
parents: 67
diff changeset
715 (set (match_operand:SI 0 "register_operand" "=r")
kono
parents: 67
diff changeset
716 (lt:SI (reg:CC CR6_REGNO)
kono
parents: 67
diff changeset
717 (const_int 0)))]
kono
parents: 67
diff changeset
718 "TARGET_P9_VECTOR"
kono
parents: 67
diff changeset
719 {
kono
parents: 67
diff changeset
720 operands[3] = gen_reg_rtx (<MODE>mode);
kono
parents: 67
diff changeset
721 })
kono
parents: 67
diff changeset
722
kono
parents: 67
diff changeset
723 ;; This expansion handles the V16QI, V8HI, and V4SI modes in the
kono
parents: 67
diff changeset
724 ;; implementation of the vec_any_eq built-in functions on Power9.
kono
parents: 67
diff changeset
725 (define_expand "vector_ae_<mode>_p"
kono
parents: 67
diff changeset
726 [(parallel
kono
parents: 67
diff changeset
727 [(set (reg:CC CR6_REGNO)
kono
parents: 67
diff changeset
728 (unspec:CC [(ne:CC (match_operand:VI 1 "vlogical_operand")
kono
parents: 67
diff changeset
729 (match_operand:VI 2 "vlogical_operand"))]
kono
parents: 67
diff changeset
730 UNSPEC_PREDICATE))
kono
parents: 67
diff changeset
731 (set (match_dup 3)
kono
parents: 67
diff changeset
732 (ne:VI (match_dup 1)
kono
parents: 67
diff changeset
733 (match_dup 2)))])
kono
parents: 67
diff changeset
734 (set (match_operand:SI 0 "register_operand" "=r")
kono
parents: 67
diff changeset
735 (lt:SI (reg:CC CR6_REGNO)
kono
parents: 67
diff changeset
736 (const_int 0)))
kono
parents: 67
diff changeset
737 (set (match_dup 0)
kono
parents: 67
diff changeset
738 (xor:SI (match_dup 0)
kono
parents: 67
diff changeset
739 (const_int 1)))]
kono
parents: 67
diff changeset
740 "TARGET_P9_VECTOR"
kono
parents: 67
diff changeset
741 {
kono
parents: 67
diff changeset
742 operands[3] = gen_reg_rtx (<MODE>mode);
kono
parents: 67
diff changeset
743 })
kono
parents: 67
diff changeset
744
kono
parents: 67
diff changeset
745 ;; This expansion handles the V16QI, V8HI, and V4SI modes in the
kono
parents: 67
diff changeset
746 ;; implementation of the vec_all_nez and vec_any_eqz built-in
kono
parents: 67
diff changeset
747 ;; functions on Power9.
kono
parents: 67
diff changeset
748 (define_expand "vector_nez_<mode>_p"
kono
parents: 67
diff changeset
749 [(parallel
kono
parents: 67
diff changeset
750 [(set (reg:CC CR6_REGNO)
kono
parents: 67
diff changeset
751 (unspec:CC [(unspec:VI
kono
parents: 67
diff changeset
752 [(match_operand:VI 1 "vlogical_operand")
kono
parents: 67
diff changeset
753 (match_operand:VI 2 "vlogical_operand")]
kono
parents: 67
diff changeset
754 UNSPEC_NEZ_P)]
kono
parents: 67
diff changeset
755 UNSPEC_PREDICATE))
kono
parents: 67
diff changeset
756 (set (match_operand:VI 0 "vlogical_operand")
kono
parents: 67
diff changeset
757 (unspec:VI [(match_dup 1)
kono
parents: 67
diff changeset
758 (match_dup 2)]
kono
parents: 67
diff changeset
759 UNSPEC_NEZ_P))])]
kono
parents: 67
diff changeset
760 "TARGET_P9_VECTOR"
kono
parents: 67
diff changeset
761 "")
kono
parents: 67
diff changeset
762
kono
parents: 67
diff changeset
763 ;; This expansion handles the V2DI mode in the implementation of the
kono
parents: 67
diff changeset
764 ;; vec_all_ne built-in function on Power9.
kono
parents: 67
diff changeset
765 ;;
kono
parents: 67
diff changeset
766 ;; Since the Power9 "xvcmpne<mode>." instruction does not support DImode,
kono
parents: 67
diff changeset
767 ;; this expands into the same rtl that would be used for the Power8
kono
parents: 67
diff changeset
768 ;; architecture.
kono
parents: 67
diff changeset
769 (define_expand "vector_ne_v2di_p"
kono
parents: 67
diff changeset
770 [(parallel
kono
parents: 67
diff changeset
771 [(set (reg:CC CR6_REGNO)
kono
parents: 67
diff changeset
772 (unspec:CC [(eq:CC (match_operand:V2DI 1 "vlogical_operand")
kono
parents: 67
diff changeset
773 (match_operand:V2DI 2 "vlogical_operand"))]
kono
parents: 67
diff changeset
774 UNSPEC_PREDICATE))
kono
parents: 67
diff changeset
775 (set (match_dup 3)
kono
parents: 67
diff changeset
776 (eq:V2DI (match_dup 1)
kono
parents: 67
diff changeset
777 (match_dup 2)))])
kono
parents: 67
diff changeset
778 (set (match_operand:SI 0 "register_operand" "=r")
kono
parents: 67
diff changeset
779 (eq:SI (reg:CC CR6_REGNO)
kono
parents: 67
diff changeset
780 (const_int 0)))]
kono
parents: 67
diff changeset
781 "TARGET_P9_VECTOR"
kono
parents: 67
diff changeset
782 {
kono
parents: 67
diff changeset
783 operands[3] = gen_reg_rtx (V2DImode);
kono
parents: 67
diff changeset
784 })
kono
parents: 67
diff changeset
785
kono
parents: 67
diff changeset
786 ;; This expansion handles the V2DI mode in the implementation of the
kono
parents: 67
diff changeset
787 ;; vec_any_eq built-in function on Power9.
kono
parents: 67
diff changeset
788 ;;
kono
parents: 67
diff changeset
789 ;; Since the Power9 "xvcmpne<mode>." instruction does not support DImode,
kono
parents: 67
diff changeset
790 ;; this expands into the same rtl that would be used for the Power8
kono
parents: 67
diff changeset
791 ;; architecture.
kono
parents: 67
diff changeset
792 (define_expand "vector_ae_v2di_p"
kono
parents: 67
diff changeset
793 [(parallel
kono
parents: 67
diff changeset
794 [(set (reg:CC CR6_REGNO)
kono
parents: 67
diff changeset
795 (unspec:CC [(eq:CC (match_operand:V2DI 1 "vlogical_operand")
kono
parents: 67
diff changeset
796 (match_operand:V2DI 2 "vlogical_operand"))]
kono
parents: 67
diff changeset
797 UNSPEC_PREDICATE))
kono
parents: 67
diff changeset
798 (set (match_dup 3)
kono
parents: 67
diff changeset
799 (eq:V2DI (match_dup 1)
kono
parents: 67
diff changeset
800 (match_dup 2)))])
kono
parents: 67
diff changeset
801 (set (match_operand:SI 0 "register_operand" "=r")
kono
parents: 67
diff changeset
802 (eq:SI (reg:CC CR6_REGNO)
kono
parents: 67
diff changeset
803 (const_int 0)))
kono
parents: 67
diff changeset
804 (set (match_dup 0)
kono
parents: 67
diff changeset
805 (xor:SI (match_dup 0)
kono
parents: 67
diff changeset
806 (const_int 1)))]
kono
parents: 67
diff changeset
807 "TARGET_P9_VECTOR"
kono
parents: 67
diff changeset
808 {
kono
parents: 67
diff changeset
809 operands[3] = gen_reg_rtx (V2DImode);
kono
parents: 67
diff changeset
810 })
kono
parents: 67
diff changeset
811
kono
parents: 67
diff changeset
812 ;; This expansion handles the V4SF and V2DF modes in the Power9
kono
parents: 67
diff changeset
813 ;; implementation of the vec_all_ne built-in functions. Note that the
kono
parents: 67
diff changeset
814 ;; expansions for this pattern with these modes makes no use of power9-
kono
parents: 67
diff changeset
815 ;; specific instructions since there are no new power9 instructions
kono
parents: 67
diff changeset
816 ;; for vector compare not equal with floating point arguments.
kono
parents: 67
diff changeset
817 (define_expand "vector_ne_<mode>_p"
kono
parents: 67
diff changeset
818 [(parallel
kono
parents: 67
diff changeset
819 [(set (reg:CC CR6_REGNO)
kono
parents: 67
diff changeset
820 (unspec:CC [(eq:CC (match_operand:VEC_F 1 "vlogical_operand")
kono
parents: 67
diff changeset
821 (match_operand:VEC_F 2 "vlogical_operand"))]
kono
parents: 67
diff changeset
822 UNSPEC_PREDICATE))
kono
parents: 67
diff changeset
823 (set (match_dup 3)
kono
parents: 67
diff changeset
824 (eq:VEC_F (match_dup 1)
kono
parents: 67
diff changeset
825 (match_dup 2)))])
kono
parents: 67
diff changeset
826 (set (match_operand:SI 0 "register_operand" "=r")
kono
parents: 67
diff changeset
827 (eq:SI (reg:CC CR6_REGNO)
kono
parents: 67
diff changeset
828 (const_int 0)))]
kono
parents: 67
diff changeset
829 "TARGET_P9_VECTOR"
kono
parents: 67
diff changeset
830 {
kono
parents: 67
diff changeset
831 operands[3] = gen_reg_rtx (<MODE>mode);
kono
parents: 67
diff changeset
832 })
kono
parents: 67
diff changeset
833
kono
parents: 67
diff changeset
834 ;; This expansion handles the V4SF and V2DF modes in the Power9
kono
parents: 67
diff changeset
835 ;; implementation of the vec_any_eq built-in functions. Note that the
kono
parents: 67
diff changeset
836 ;; expansions for this pattern with these modes makes no use of power9-
kono
parents: 67
diff changeset
837 ;; specific instructions since there are no new power9 instructions
kono
parents: 67
diff changeset
838 ;; for vector compare not equal with floating point arguments.
kono
parents: 67
diff changeset
839 (define_expand "vector_ae_<mode>_p"
kono
parents: 67
diff changeset
840 [(parallel
kono
parents: 67
diff changeset
841 [(set (reg:CC CR6_REGNO)
kono
parents: 67
diff changeset
842 (unspec:CC [(eq:CC (match_operand:VEC_F 1 "vlogical_operand")
kono
parents: 67
diff changeset
843 (match_operand:VEC_F 2 "vlogical_operand"))]
kono
parents: 67
diff changeset
844 UNSPEC_PREDICATE))
kono
parents: 67
diff changeset
845 (set (match_dup 3)
kono
parents: 67
diff changeset
846 (eq:VEC_F (match_dup 1)
kono
parents: 67
diff changeset
847 (match_dup 2)))])
kono
parents: 67
diff changeset
848 (set (match_operand:SI 0 "register_operand" "=r")
kono
parents: 67
diff changeset
849 (eq:SI (reg:CC CR6_REGNO)
kono
parents: 67
diff changeset
850 (const_int 0)))
kono
parents: 67
diff changeset
851 (set (match_dup 0)
kono
parents: 67
diff changeset
852 (xor:SI (match_dup 0)
kono
parents: 67
diff changeset
853 (const_int 1)))]
kono
parents: 67
diff changeset
854 "TARGET_P9_VECTOR"
kono
parents: 67
diff changeset
855 {
kono
parents: 67
diff changeset
856 operands[3] = gen_reg_rtx (<MODE>mode);
kono
parents: 67
diff changeset
857 })
kono
parents: 67
diff changeset
858
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
859 (define_expand "vector_gt_<mode>_p"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
860 [(parallel
111
kono
parents: 67
diff changeset
861 [(set (reg:CC CR6_REGNO)
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
862 (unspec:CC [(gt:CC (match_operand:VEC_A 1 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
863 (match_operand:VEC_A 2 "vlogical_operand" ""))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
864 UNSPEC_PREDICATE))
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
865 (set (match_operand:VEC_A 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
866 (gt:VEC_A (match_dup 1)
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
867 (match_dup 2)))])]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
868 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
869 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
870
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
871 (define_expand "vector_ge_<mode>_p"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
872 [(parallel
111
kono
parents: 67
diff changeset
873 [(set (reg:CC CR6_REGNO)
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
874 (unspec:CC [(ge:CC (match_operand:VEC_F 1 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
875 (match_operand:VEC_F 2 "vfloat_operand" ""))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
876 UNSPEC_PREDICATE))
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
877 (set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
878 (ge:VEC_F (match_dup 1)
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
879 (match_dup 2)))])]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
880 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
881 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
882
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
883 (define_expand "vector_gtu_<mode>_p"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
884 [(parallel
111
kono
parents: 67
diff changeset
885 [(set (reg:CC CR6_REGNO)
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
886 (unspec:CC [(gtu:CC (match_operand:VEC_I 1 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
887 (match_operand:VEC_I 2 "vint_operand" ""))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
888 UNSPEC_PREDICATE))
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
889 (set (match_operand:VEC_I 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
890 (gtu:VEC_I (match_dup 1)
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
891 (match_dup 2)))])]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
892 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
893 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
894
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
895 ;; AltiVec/VSX predicates.
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
896
111
kono
parents: 67
diff changeset
897 ;; This expansion is triggered during expansion of predicate built-in
kono
parents: 67
diff changeset
898 ;; functions (built-ins defined with the RS6000_BUILTIN_P macro) by the
kono
parents: 67
diff changeset
899 ;; altivec_expand_predicate_builtin() function when the value of the
kono
parents: 67
diff changeset
900 ;; integer constant first argument equals zero (aka __CR6_EQ in altivec.h).
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
901 (define_expand "cr6_test_for_zero"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
902 [(set (match_operand:SI 0 "register_operand" "=r")
111
kono
parents: 67
diff changeset
903 (eq:SI (reg:CC CR6_REGNO)
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
904 (const_int 0)))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
905 "TARGET_ALTIVEC || TARGET_VSX"
63
b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 55
diff changeset
906 "")
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
907
111
kono
parents: 67
diff changeset
908 ;; This expansion is triggered during expansion of predicate built-in
kono
parents: 67
diff changeset
909 ;; functions (built-ins defined with the RS6000_BUILTIN_P macro) by the
kono
parents: 67
diff changeset
910 ;; altivec_expand_predicate_builtin() function when the value of the
kono
parents: 67
diff changeset
911 ;; integer constant first argument equals one (aka __CR6_EQ_REV in altivec.h).
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
912 (define_expand "cr6_test_for_zero_reverse"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
913 [(set (match_operand:SI 0 "register_operand" "=r")
111
kono
parents: 67
diff changeset
914 (eq:SI (reg:CC CR6_REGNO)
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
915 (const_int 0)))
111
kono
parents: 67
diff changeset
916 (set (match_dup 0)
kono
parents: 67
diff changeset
917 (xor:SI (match_dup 0)
kono
parents: 67
diff changeset
918 (const_int 1)))]
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
919 "TARGET_ALTIVEC || TARGET_VSX"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
920 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
921
111
kono
parents: 67
diff changeset
922 ;; This expansion is triggered during expansion of predicate built-in
kono
parents: 67
diff changeset
923 ;; functions (built-ins defined with the RS6000_BUILTIN_P macro) by the
kono
parents: 67
diff changeset
924 ;; altivec_expand_predicate_builtin() function when the value of the
kono
parents: 67
diff changeset
925 ;; integer constant first argument equals two (aka __CR6_LT in altivec.h).
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
926 (define_expand "cr6_test_for_lt"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
927 [(set (match_operand:SI 0 "register_operand" "=r")
111
kono
parents: 67
diff changeset
928 (lt:SI (reg:CC CR6_REGNO)
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
929 (const_int 0)))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
930 "TARGET_ALTIVEC || TARGET_VSX"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
931 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
932
111
kono
parents: 67
diff changeset
933 ;; This expansion is triggered during expansion of predicate built-in
kono
parents: 67
diff changeset
934 ;; functions (built-ins defined with the RS6000_BUILTIN_P macro) by the
kono
parents: 67
diff changeset
935 ;; altivec_expand_predicate_builtin() function when the value of the
kono
parents: 67
diff changeset
936 ;; integer constant first argument equals three
kono
parents: 67
diff changeset
937 ;; (aka __CR6_LT_REV in altivec.h).
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
938 (define_expand "cr6_test_for_lt_reverse"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
939 [(set (match_operand:SI 0 "register_operand" "=r")
111
kono
parents: 67
diff changeset
940 (lt:SI (reg:CC CR6_REGNO)
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
941 (const_int 0)))
111
kono
parents: 67
diff changeset
942 (set (match_dup 0)
kono
parents: 67
diff changeset
943 (xor:SI (match_dup 0)
kono
parents: 67
diff changeset
944 (const_int 1)))]
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
945 "TARGET_ALTIVEC || TARGET_VSX"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
946 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
947
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
948
111
kono
parents: 67
diff changeset
949 ;; Vector count leading zeros
kono
parents: 67
diff changeset
950 (define_expand "clz<mode>2"
kono
parents: 67
diff changeset
951 [(set (match_operand:VEC_I 0 "register_operand" "")
kono
parents: 67
diff changeset
952 (clz:VEC_I (match_operand:VEC_I 1 "register_operand" "")))]
kono
parents: 67
diff changeset
953 "TARGET_P8_VECTOR")
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
954
111
kono
parents: 67
diff changeset
955 ;; Vector count trailing zeros
kono
parents: 67
diff changeset
956 (define_expand "ctz<mode>2"
kono
parents: 67
diff changeset
957 [(set (match_operand:VEC_I 0 "register_operand" "")
kono
parents: 67
diff changeset
958 (ctz:VEC_I (match_operand:VEC_I 1 "register_operand" "")))]
kono
parents: 67
diff changeset
959 "TARGET_P9_VECTOR")
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
960
111
kono
parents: 67
diff changeset
961 ;; Vector population count
kono
parents: 67
diff changeset
962 (define_expand "popcount<mode>2"
kono
parents: 67
diff changeset
963 [(set (match_operand:VEC_I 0 "register_operand" "")
kono
parents: 67
diff changeset
964 (popcount:VEC_I (match_operand:VEC_I 1 "register_operand" "")))]
kono
parents: 67
diff changeset
965 "TARGET_P8_VECTOR")
63
b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 55
diff changeset
966
111
kono
parents: 67
diff changeset
967 ;; Vector parity
kono
parents: 67
diff changeset
968 (define_expand "parity<mode>2"
kono
parents: 67
diff changeset
969 [(set (match_operand:VEC_IP 0 "register_operand" "")
kono
parents: 67
diff changeset
970 (parity:VEC_IP (match_operand:VEC_IP 1 "register_operand" "")))]
kono
parents: 67
diff changeset
971 "TARGET_P9_VECTOR")
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
972
111
kono
parents: 67
diff changeset
973
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
974 ;; Same size conversions
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
975 (define_expand "float<VEC_int><mode>2"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
976 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
977 (float:VEC_F (match_operand:<VEC_INT> 1 "vint_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
978 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
979 "
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
980 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
981 if (<MODE>mode == V4SFmode && VECTOR_UNIT_ALTIVEC_P (<MODE>mode))
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
982 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
983 emit_insn (gen_altivec_vcfsx (operands[0], operands[1], const0_rtx));
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
984 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
985 }
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
986 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
987
111
kono
parents: 67
diff changeset
988 (define_expand "floatuns<VEC_int><mode>2"
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
989 [(set (match_operand:VEC_F 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
990 (unsigned_float:VEC_F (match_operand:<VEC_INT> 1 "vint_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
991 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
992 "
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
993 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
994 if (<MODE>mode == V4SFmode && VECTOR_UNIT_ALTIVEC_P (<MODE>mode))
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
995 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
996 emit_insn (gen_altivec_vcfux (operands[0], operands[1], const0_rtx));
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
997 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
998 }
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
999 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1000
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1001 (define_expand "fix_trunc<mode><VEC_int>2"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1002 [(set (match_operand:<VEC_INT> 0 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1003 (fix:<VEC_INT> (match_operand:VEC_F 1 "vfloat_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1004 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1005 "
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1006 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1007 if (<MODE>mode == V4SFmode && VECTOR_UNIT_ALTIVEC_P (<MODE>mode))
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1008 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1009 emit_insn (gen_altivec_vctsxs (operands[0], operands[1], const0_rtx));
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1010 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1011 }
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1012 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1013
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1014 (define_expand "fixuns_trunc<mode><VEC_int>2"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1015 [(set (match_operand:<VEC_INT> 0 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1016 (unsigned_fix:<VEC_INT> (match_operand:VEC_F 1 "vfloat_operand" "")))]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1017 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1018 "
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1019 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1020 if (<MODE>mode == V4SFmode && VECTOR_UNIT_ALTIVEC_P (<MODE>mode))
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1021 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1022 emit_insn (gen_altivec_vctuxs (operands[0], operands[1], const0_rtx));
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1023 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1024 }
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1025 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1026
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1027
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1028 ;; Vector initialization, set, extract
111
kono
parents: 67
diff changeset
1029 (define_expand "vec_init<mode><VEC_base_l>"
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1030 [(match_operand:VEC_E 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1031 (match_operand:VEC_E 1 "" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1032 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1033 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1034 rs6000_expand_vector_init (operands[0], operands[1]);
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1035 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1036 })
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1037
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1038 (define_expand "vec_set<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1039 [(match_operand:VEC_E 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1040 (match_operand:<VEC_base> 1 "register_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1041 (match_operand 2 "const_int_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1042 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1043 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1044 rs6000_expand_vector_set (operands[0], operands[1], INTVAL (operands[2]));
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1045 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1046 })
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1047
111
kono
parents: 67
diff changeset
1048 (define_expand "vec_extract<mode><VEC_base_l>"
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1049 [(match_operand:<VEC_base> 0 "register_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1050 (match_operand:VEC_E 1 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1051 (match_operand 2 "const_int_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1052 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1053 {
111
kono
parents: 67
diff changeset
1054 rs6000_expand_vector_extract (operands[0], operands[1], operands[2]);
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1055 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1056 })
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1057
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1058 ;; Convert double word types to single word types
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1059 (define_expand "vec_pack_trunc_v2df"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1060 [(match_operand:V4SF 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1061 (match_operand:V2DF 1 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1062 (match_operand:V2DF 2 "vfloat_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1063 "VECTOR_UNIT_VSX_P (V2DFmode) && TARGET_ALTIVEC"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1064 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1065 rtx r1 = gen_reg_rtx (V4SFmode);
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1066 rtx r2 = gen_reg_rtx (V4SFmode);
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1067
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1068 emit_insn (gen_vsx_xvcvdpsp (r1, operands[1]));
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1069 emit_insn (gen_vsx_xvcvdpsp (r2, operands[2]));
111
kono
parents: 67
diff changeset
1070 rs6000_expand_extract_even (operands[0], r1, r2);
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1071 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1072 })
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1073
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1074 (define_expand "vec_pack_sfix_trunc_v2df"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1075 [(match_operand:V4SI 0 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1076 (match_operand:V2DF 1 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1077 (match_operand:V2DF 2 "vfloat_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1078 "VECTOR_UNIT_VSX_P (V2DFmode) && TARGET_ALTIVEC"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1079 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1080 rtx r1 = gen_reg_rtx (V4SImode);
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1081 rtx r2 = gen_reg_rtx (V4SImode);
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1082
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1083 emit_insn (gen_vsx_xvcvdpsxws (r1, operands[1]));
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1084 emit_insn (gen_vsx_xvcvdpsxws (r2, operands[2]));
111
kono
parents: 67
diff changeset
1085 rs6000_expand_extract_even (operands[0], r1, r2);
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1086 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1087 })
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1088
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1089 (define_expand "vec_pack_ufix_trunc_v2df"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1090 [(match_operand:V4SI 0 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1091 (match_operand:V2DF 1 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1092 (match_operand:V2DF 2 "vfloat_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1093 "VECTOR_UNIT_VSX_P (V2DFmode) && TARGET_ALTIVEC"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1094 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1095 rtx r1 = gen_reg_rtx (V4SImode);
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1096 rtx r2 = gen_reg_rtx (V4SImode);
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1097
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1098 emit_insn (gen_vsx_xvcvdpuxws (r1, operands[1]));
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1099 emit_insn (gen_vsx_xvcvdpuxws (r2, operands[2]));
111
kono
parents: 67
diff changeset
1100 rs6000_expand_extract_even (operands[0], r1, r2);
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1101 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1102 })
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1103
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1104 ;; Convert single word types to double word
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1105 (define_expand "vec_unpacks_hi_v4sf"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1106 [(match_operand:V2DF 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1107 (match_operand:V4SF 1 "vfloat_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1108 "VECTOR_UNIT_VSX_P (V2DFmode) && VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SFmode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1109 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1110 rtx reg = gen_reg_rtx (V4SFmode);
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1111
111
kono
parents: 67
diff changeset
1112 rs6000_expand_interleave (reg, operands[1], operands[1], BYTES_BIG_ENDIAN);
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1113 emit_insn (gen_vsx_xvcvspdp (operands[0], reg));
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1114 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1115 })
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1116
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1117 (define_expand "vec_unpacks_lo_v4sf"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1118 [(match_operand:V2DF 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1119 (match_operand:V4SF 1 "vfloat_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1120 "VECTOR_UNIT_VSX_P (V2DFmode) && VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SFmode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1121 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1122 rtx reg = gen_reg_rtx (V4SFmode);
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1123
111
kono
parents: 67
diff changeset
1124 rs6000_expand_interleave (reg, operands[1], operands[1], !BYTES_BIG_ENDIAN);
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1125 emit_insn (gen_vsx_xvcvspdp (operands[0], reg));
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1126 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1127 })
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1128
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1129 (define_expand "vec_unpacks_float_hi_v4si"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1130 [(match_operand:V2DF 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1131 (match_operand:V4SI 1 "vint_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1132 "VECTOR_UNIT_VSX_P (V2DFmode) && VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SImode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1133 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1134 rtx reg = gen_reg_rtx (V4SImode);
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1135
111
kono
parents: 67
diff changeset
1136 rs6000_expand_interleave (reg, operands[1], operands[1], BYTES_BIG_ENDIAN);
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1137 emit_insn (gen_vsx_xvcvsxwdp (operands[0], reg));
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1138 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1139 })
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1140
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1141 (define_expand "vec_unpacks_float_lo_v4si"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1142 [(match_operand:V2DF 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1143 (match_operand:V4SI 1 "vint_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1144 "VECTOR_UNIT_VSX_P (V2DFmode) && VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SImode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1145 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1146 rtx reg = gen_reg_rtx (V4SImode);
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1147
111
kono
parents: 67
diff changeset
1148 rs6000_expand_interleave (reg, operands[1], operands[1], !BYTES_BIG_ENDIAN);
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1149 emit_insn (gen_vsx_xvcvsxwdp (operands[0], reg));
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1150 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1151 })
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1152
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1153 (define_expand "vec_unpacku_float_hi_v4si"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1154 [(match_operand:V2DF 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1155 (match_operand:V4SI 1 "vint_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1156 "VECTOR_UNIT_VSX_P (V2DFmode) && VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SImode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1157 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1158 rtx reg = gen_reg_rtx (V4SImode);
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1159
111
kono
parents: 67
diff changeset
1160 rs6000_expand_interleave (reg, operands[1], operands[1], BYTES_BIG_ENDIAN);
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1161 emit_insn (gen_vsx_xvcvuxwdp (operands[0], reg));
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1162 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1163 })
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1164
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1165 (define_expand "vec_unpacku_float_lo_v4si"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1166 [(match_operand:V2DF 0 "vfloat_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1167 (match_operand:V4SI 1 "vint_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1168 "VECTOR_UNIT_VSX_P (V2DFmode) && VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SImode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1169 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1170 rtx reg = gen_reg_rtx (V4SImode);
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1171
111
kono
parents: 67
diff changeset
1172 rs6000_expand_interleave (reg, operands[1], operands[1], !BYTES_BIG_ENDIAN);
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1173 emit_insn (gen_vsx_xvcvuxwdp (operands[0], reg));
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1174 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1175 })
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1176
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1177
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1178 ;; Align vector loads with a permute.
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1179 (define_expand "vec_realign_load_<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1180 [(match_operand:VEC_K 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1181 (match_operand:VEC_K 1 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1182 (match_operand:VEC_K 2 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1183 (match_operand:V16QI 3 "vlogical_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1184 "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1185 {
111
kono
parents: 67
diff changeset
1186 if (BYTES_BIG_ENDIAN)
kono
parents: 67
diff changeset
1187 emit_insn (gen_altivec_vperm_<mode> (operands[0], operands[1],
kono
parents: 67
diff changeset
1188 operands[2], operands[3]));
kono
parents: 67
diff changeset
1189 else
kono
parents: 67
diff changeset
1190 {
kono
parents: 67
diff changeset
1191 /* We have changed lvsr to lvsl, so to complete the transformation
kono
parents: 67
diff changeset
1192 of vperm for LE, we must swap the inputs. */
kono
parents: 67
diff changeset
1193 rtx unspec = gen_rtx_UNSPEC (<MODE>mode,
kono
parents: 67
diff changeset
1194 gen_rtvec (3, operands[2],
kono
parents: 67
diff changeset
1195 operands[1], operands[3]),
kono
parents: 67
diff changeset
1196 UNSPEC_VPERM);
kono
parents: 67
diff changeset
1197 emit_move_insn (operands[0], unspec);
kono
parents: 67
diff changeset
1198 }
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1199 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1200 })
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1201
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1202 ;; Under VSX, vectors of 4/8 byte alignments do not need to be aligned
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1203 ;; since the load already handles it.
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1204 (define_expand "movmisalign<mode>"
111
kono
parents: 67
diff changeset
1205 [(set (match_operand:VEC_N 0 "nonimmediate_operand" "")
kono
parents: 67
diff changeset
1206 (match_operand:VEC_N 1 "any_operand" ""))]
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1207 "VECTOR_MEM_VSX_P (<MODE>mode) && TARGET_ALLOW_MOVMISALIGN"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1208 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1209
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1210 ;; Vector shift right in bits. Currently supported ony for shift
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1211 ;; amounts that can be expressed as byte shifts (divisible by 8).
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1212 ;; General shift amounts can be supported using vsro + vsr. We're
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1213 ;; not expecting to see these yet (the vectorizer currently
111
kono
parents: 67
diff changeset
1214 ;; generates only shifts by a whole number of vector elements).
kono
parents: 67
diff changeset
1215 ;; Note that the vec_shr operation is actually defined as
kono
parents: 67
diff changeset
1216 ;; 'shift toward element 0' so is a shr for LE and shl for BE.
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1217 (define_expand "vec_shr_<mode>"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1218 [(match_operand:VEC_L 0 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1219 (match_operand:VEC_L 1 "vlogical_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1220 (match_operand:QI 2 "reg_or_short_operand" "")]
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1221 "TARGET_ALTIVEC"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1222 "
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1223 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1224 rtx bitshift = operands[2];
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1225 rtx shift;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1226 rtx insn;
111
kono
parents: 67
diff changeset
1227 rtx zero_reg, op1, op2;
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1228 HOST_WIDE_INT bitshift_val;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1229 HOST_WIDE_INT byteshift_val;
63
b7f97abdc517 update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents: 55
diff changeset
1230
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1231 if (! CONSTANT_P (bitshift))
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1232 FAIL;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1233 bitshift_val = INTVAL (bitshift);
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1234 if (bitshift_val & 0x7)
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1235 FAIL;
111
kono
parents: 67
diff changeset
1236 byteshift_val = (bitshift_val >> 3);
kono
parents: 67
diff changeset
1237 zero_reg = gen_reg_rtx (<MODE>mode);
kono
parents: 67
diff changeset
1238 emit_move_insn (zero_reg, CONST0_RTX (<MODE>mode));
kono
parents: 67
diff changeset
1239 if (!BYTES_BIG_ENDIAN)
kono
parents: 67
diff changeset
1240 {
kono
parents: 67
diff changeset
1241 byteshift_val = 16 - byteshift_val;
kono
parents: 67
diff changeset
1242 op1 = zero_reg;
kono
parents: 67
diff changeset
1243 op2 = operands[1];
kono
parents: 67
diff changeset
1244 }
kono
parents: 67
diff changeset
1245 else
kono
parents: 67
diff changeset
1246 {
kono
parents: 67
diff changeset
1247 op1 = operands[1];
kono
parents: 67
diff changeset
1248 op2 = zero_reg;
kono
parents: 67
diff changeset
1249 }
kono
parents: 67
diff changeset
1250
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1251 if (TARGET_VSX && (byteshift_val & 0x3) == 0)
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1252 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1253 shift = gen_rtx_CONST_INT (QImode, byteshift_val >> 2);
111
kono
parents: 67
diff changeset
1254 insn = gen_vsx_xxsldwi_<mode> (operands[0], op1, op2, shift);
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1255 }
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1256 else
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1257 {
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1258 shift = gen_rtx_CONST_INT (QImode, byteshift_val);
111
kono
parents: 67
diff changeset
1259 insn = gen_altivec_vsldoi_<mode> (operands[0], op1, op2, shift);
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1260 }
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1261
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1262 emit_insn (insn);
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1263 DONE;
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1264 }")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1265
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1266 ;; Expanders for rotate each element in a vector
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1267 (define_expand "vrotl<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1268 [(set (match_operand:VEC_I 0 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1269 (rotate:VEC_I (match_operand:VEC_I 1 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1270 (match_operand:VEC_I 2 "vint_operand" "")))]
111
kono
parents: 67
diff changeset
1271 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1272 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1273
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1274 ;; Expanders for arithmetic shift left on each vector element
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1275 (define_expand "vashl<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1276 [(set (match_operand:VEC_I 0 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1277 (ashift:VEC_I (match_operand:VEC_I 1 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1278 (match_operand:VEC_I 2 "vint_operand" "")))]
111
kono
parents: 67
diff changeset
1279 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1280 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1281
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1282 ;; Expanders for logical shift right on each vector element
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1283 (define_expand "vlshr<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1284 [(set (match_operand:VEC_I 0 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1285 (lshiftrt:VEC_I (match_operand:VEC_I 1 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1286 (match_operand:VEC_I 2 "vint_operand" "")))]
111
kono
parents: 67
diff changeset
1287 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1288 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1289
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1290 ;; Expanders for arithmetic shift right on each vector element
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1291 (define_expand "vashr<mode>3"
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1292 [(set (match_operand:VEC_I 0 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1293 (ashiftrt:VEC_I (match_operand:VEC_I 1 "vint_operand" "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1294 (match_operand:VEC_I 2 "vint_operand" "")))]
111
kono
parents: 67
diff changeset
1295 "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1296 "")
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1297
111
kono
parents: 67
diff changeset
1298 ;; Vector reduction expanders for VSX
kono
parents: 67
diff changeset
1299 ; The (VEC_reduc:...
kono
parents: 67
diff changeset
1300 ; (op1)
kono
parents: 67
diff changeset
1301 ; (unspec:... [(const_int 0)] UNSPEC_REDUC))
kono
parents: 67
diff changeset
1302 ;
kono
parents: 67
diff changeset
1303 ; is to allow us to use a code iterator, but not completely list all of the
kono
parents: 67
diff changeset
1304 ; vector rotates, etc. to prevent canonicalization
55
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1305
77e2b8dfacca update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
diff changeset
1306
111
kono
parents: 67
diff changeset
1307 (define_expand "reduc_<VEC_reduc:VEC_reduc_name>_scal_<VEC_F:mode>"
kono
parents: 67
diff changeset
1308 [(match_operand:<VEC_base> 0 "register_operand" "")
kono
parents: 67
diff changeset
1309 (VEC_reduc:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")
kono
parents: 67
diff changeset
1310 (unspec:VEC_F [(const_int 0)] UNSPEC_REDUC))]
kono
parents: 67
diff changeset
1311 "VECTOR_UNIT_VSX_P (<VEC_F:MODE>mode)"
kono
parents: 67
diff changeset
1312 {
kono
parents: 67
diff changeset
1313 rtx vec = gen_reg_rtx (<VEC_F:MODE>mode);
kono
parents: 67
diff changeset
1314 rtx elt = BYTES_BIG_ENDIAN
kono
parents: 67
diff changeset
1315 ? gen_int_mode (GET_MODE_NUNITS (<VEC_F:MODE>mode) - 1, QImode)
kono
parents: 67
diff changeset
1316 : const0_rtx;
kono
parents: 67
diff changeset
1317 emit_insn (gen_vsx_reduc_<VEC_reduc:VEC_reduc_name>_<VEC_F:mode> (vec,
kono
parents: 67
diff changeset
1318 operand1));
kono
parents: 67
diff changeset
1319 emit_insn (gen_vsx_extract_<VEC_F:mode> (operand0, vec, elt));
kono
parents: 67
diff changeset
1320 DONE;
kono
parents: 67
diff changeset
1321 })