Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/alpha/alpha.h @ 145:1830386684a0
gcc-9.2.0
| author | anatofuz |
|---|---|
| date | Thu, 13 Feb 2020 11:34:05 +0900 |
| parents | 84e7813d76e9 |
| children |
| rev | line source |
|---|---|
| 0 | 1 /* Definitions of target machine for GNU compiler, for DEC Alpha. |
| 145 | 2 Copyright (C) 1992-2020 Free Software Foundation, Inc. |
| 0 | 3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) |
| 4 | |
| 5 This file is part of GCC. | |
| 6 | |
| 7 GCC is free software; you can redistribute it and/or modify | |
| 8 it under the terms of the GNU General Public License as published by | |
| 9 the Free Software Foundation; either version 3, or (at your option) | |
| 10 any later version. | |
| 11 | |
| 12 GCC is distributed in the hope that it will be useful, | |
| 13 but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 15 GNU General Public License for more details. | |
| 16 | |
| 17 You should have received a copy of the GNU General Public License | |
| 18 along with GCC; see the file COPYING3. If not see | |
| 19 <http://www.gnu.org/licenses/>. */ | |
| 20 | |
| 21 /* Target CPU builtins. */ | |
| 22 #define TARGET_CPU_CPP_BUILTINS() \ | |
| 23 do \ | |
| 24 { \ | |
| 25 builtin_define ("__alpha"); \ | |
| 26 builtin_define ("__alpha__"); \ | |
| 27 builtin_assert ("cpu=alpha"); \ | |
| 28 builtin_assert ("machine=alpha"); \ | |
| 29 if (TARGET_CIX) \ | |
| 30 { \ | |
| 31 builtin_define ("__alpha_cix__"); \ | |
| 32 builtin_assert ("cpu=cix"); \ | |
| 33 } \ | |
| 34 if (TARGET_FIX) \ | |
| 35 { \ | |
| 36 builtin_define ("__alpha_fix__"); \ | |
| 37 builtin_assert ("cpu=fix"); \ | |
| 38 } \ | |
| 39 if (TARGET_BWX) \ | |
| 40 { \ | |
| 41 builtin_define ("__alpha_bwx__"); \ | |
| 42 builtin_assert ("cpu=bwx"); \ | |
| 43 } \ | |
| 44 if (TARGET_MAX) \ | |
| 45 { \ | |
| 46 builtin_define ("__alpha_max__"); \ | |
| 47 builtin_assert ("cpu=max"); \ | |
| 48 } \ | |
| 49 if (alpha_cpu == PROCESSOR_EV6) \ | |
| 50 { \ | |
| 51 builtin_define ("__alpha_ev6__"); \ | |
| 52 builtin_assert ("cpu=ev6"); \ | |
| 53 } \ | |
| 54 else if (alpha_cpu == PROCESSOR_EV5) \ | |
| 55 { \ | |
| 56 builtin_define ("__alpha_ev5__"); \ | |
| 57 builtin_assert ("cpu=ev5"); \ | |
| 58 } \ | |
| 59 else /* Presumably ev4. */ \ | |
| 60 { \ | |
| 61 builtin_define ("__alpha_ev4__"); \ | |
| 62 builtin_assert ("cpu=ev4"); \ | |
| 63 } \ | |
| 64 if (TARGET_IEEE || TARGET_IEEE_WITH_INEXACT) \ | |
| 65 builtin_define ("_IEEE_FP"); \ | |
| 66 if (TARGET_IEEE_WITH_INEXACT) \ | |
| 67 builtin_define ("_IEEE_FP_INEXACT"); \ | |
| 68 if (TARGET_LONG_DOUBLE_128) \ | |
| 69 builtin_define ("__LONG_DOUBLE_128__"); \ | |
| 70 \ | |
| 71 /* Macros dependent on the C dialect. */ \ | |
| 72 SUBTARGET_LANGUAGE_CPP_BUILTINS(); \ | |
| 73 } while (0) | |
| 74 | |
| 75 #ifndef SUBTARGET_LANGUAGE_CPP_BUILTINS | |
| 76 #define SUBTARGET_LANGUAGE_CPP_BUILTINS() \ | |
| 77 do \ | |
| 78 { \ | |
| 79 if (preprocessing_asm_p ()) \ | |
| 80 builtin_define_std ("LANGUAGE_ASSEMBLY"); \ | |
| 81 else if (c_dialect_cxx ()) \ | |
| 82 { \ | |
| 83 builtin_define ("__LANGUAGE_C_PLUS_PLUS"); \ | |
| 84 builtin_define ("__LANGUAGE_C_PLUS_PLUS__"); \ | |
| 85 } \ | |
| 86 else \ | |
| 87 builtin_define_std ("LANGUAGE_C"); \ | |
| 88 if (c_dialect_objc ()) \ | |
| 89 { \ | |
| 90 builtin_define ("__LANGUAGE_OBJECTIVE_C"); \ | |
| 91 builtin_define ("__LANGUAGE_OBJECTIVE_C__"); \ | |
| 92 } \ | |
| 93 } \ | |
| 94 while (0) | |
| 95 #endif | |
| 96 | |
| 97 /* Run-time compilation parameters selecting different hardware subsets. */ | |
| 98 | |
| 99 /* Which processor to schedule for. The cpu attribute defines a list that | |
| 100 mirrors this list, so changes to alpha.md must be made at the same time. */ | |
| 101 | |
| 102 enum processor_type | |
| 103 { | |
| 104 PROCESSOR_EV4, /* 2106[46]{a,} */ | |
| 105 PROCESSOR_EV5, /* 21164{a,pc,} */ | |
| 106 PROCESSOR_EV6, /* 21264 */ | |
| 107 PROCESSOR_MAX | |
| 108 }; | |
| 109 | |
| 110 extern enum processor_type alpha_cpu; | |
| 111 extern enum processor_type alpha_tune; | |
| 112 | |
| 113 enum alpha_trap_precision | |
| 114 { | |
| 115 ALPHA_TP_PROG, /* No precision (default). */ | |
| 116 ALPHA_TP_FUNC, /* Trap contained within originating function. */ | |
| 117 ALPHA_TP_INSN /* Instruction accuracy and code is resumption safe. */ | |
| 118 }; | |
| 119 | |
| 120 enum alpha_fp_rounding_mode | |
| 121 { | |
| 122 ALPHA_FPRM_NORM, /* Normal rounding mode. */ | |
| 123 ALPHA_FPRM_MINF, /* Round towards minus-infinity. */ | |
| 124 ALPHA_FPRM_CHOP, /* Chopped rounding mode (towards 0). */ | |
| 125 ALPHA_FPRM_DYN /* Dynamic rounding mode. */ | |
| 126 }; | |
| 127 | |
| 128 enum alpha_fp_trap_mode | |
| 129 { | |
| 130 ALPHA_FPTM_N, /* Normal trap mode. */ | |
| 131 ALPHA_FPTM_U, /* Underflow traps enabled. */ | |
| 132 ALPHA_FPTM_SU, /* Software completion, w/underflow traps */ | |
| 133 ALPHA_FPTM_SUI /* Software completion, w/underflow & inexact traps */ | |
| 134 }; | |
| 135 | |
| 136 extern enum alpha_trap_precision alpha_tp; | |
| 137 extern enum alpha_fp_rounding_mode alpha_fprm; | |
| 138 extern enum alpha_fp_trap_mode alpha_fptm; | |
| 139 | |
| 140 /* Invert the easy way to make options work. */ | |
| 141 #define TARGET_FP (!TARGET_SOFT_FP) | |
| 142 | |
| 143 /* These are for target os support and cannot be changed at runtime. */ | |
| 111 | 144 #define TARGET_ABI_OPEN_VMS 0 |
| 145 #define TARGET_ABI_OSF (!TARGET_ABI_OPEN_VMS) | |
| 0 | 146 |
| 147 #ifndef TARGET_CAN_FAULT_IN_PROLOGUE | |
| 148 #define TARGET_CAN_FAULT_IN_PROLOGUE 0 | |
| 149 #endif | |
| 150 #ifndef TARGET_HAS_XFLOATING_LIBS | |
| 151 #define TARGET_HAS_XFLOATING_LIBS TARGET_LONG_DOUBLE_128 | |
| 152 #endif | |
| 153 #ifndef TARGET_PROFILING_NEEDS_GP | |
| 154 #define TARGET_PROFILING_NEEDS_GP 0 | |
| 155 #endif | |
| 156 #ifndef TARGET_FIXUP_EV5_PREFETCH | |
| 157 #define TARGET_FIXUP_EV5_PREFETCH 0 | |
| 158 #endif | |
| 159 #ifndef HAVE_AS_TLS | |
| 160 #define HAVE_AS_TLS 0 | |
| 161 #endif | |
| 162 | |
| 163 #define TARGET_DEFAULT MASK_FPREGS | |
| 164 | |
| 165 #ifndef TARGET_CPU_DEFAULT | |
| 166 #define TARGET_CPU_DEFAULT 0 | |
| 167 #endif | |
| 168 | |
| 169 #ifndef TARGET_DEFAULT_EXPLICIT_RELOCS | |
| 170 #ifdef HAVE_AS_EXPLICIT_RELOCS | |
| 171 #define TARGET_DEFAULT_EXPLICIT_RELOCS MASK_EXPLICIT_RELOCS | |
| 172 #define TARGET_SUPPORT_ARCH 1 | |
| 173 #else | |
| 174 #define TARGET_DEFAULT_EXPLICIT_RELOCS 0 | |
| 175 #endif | |
| 176 #endif | |
| 177 | |
| 178 #ifndef TARGET_SUPPORT_ARCH | |
| 179 #define TARGET_SUPPORT_ARCH 0 | |
| 180 #endif | |
| 181 | |
| 182 /* Support for a compile-time default CPU, et cetera. The rules are: | |
| 183 --with-cpu is ignored if -mcpu is specified. | |
| 184 --with-tune is ignored if -mtune is specified. */ | |
| 185 #define OPTION_DEFAULT_SPECS \ | |
| 186 {"cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }, \ | |
| 187 {"tune", "%{!mtune=*:-mtune=%(VALUE)}" } | |
| 188 | |
| 189 | |
| 190 /* target machine storage layout */ | |
| 191 | |
| 192 /* Define the size of `int'. The default is the same as the word size. */ | |
| 193 #define INT_TYPE_SIZE 32 | |
| 194 | |
| 195 /* Define the size of `long long'. The default is the twice the word size. */ | |
| 196 #define LONG_LONG_TYPE_SIZE 64 | |
| 197 | |
| 198 /* The two floating-point formats we support are S-floating, which is | |
| 199 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double' | |
| 200 and `long double' are T. */ | |
| 201 | |
| 202 #define FLOAT_TYPE_SIZE 32 | |
| 203 #define DOUBLE_TYPE_SIZE 64 | |
| 204 #define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64) | |
| 205 | |
| 206 /* Work around target_flags dependency in ada/targtyps.c. */ | |
| 207 #define WIDEST_HARDWARE_FP_SIZE 64 | |
| 208 | |
| 209 #define WCHAR_TYPE "unsigned int" | |
| 210 #define WCHAR_TYPE_SIZE 32 | |
| 211 | |
| 212 /* Define this macro if it is advisable to hold scalars in registers | |
| 213 in a wider mode than that declared by the program. In such cases, | |
| 214 the value is constrained to be within the bounds of the declared | |
| 215 type, but kept valid in the wider mode. The signedness of the | |
| 216 extension may differ from that of the type. | |
| 217 | |
| 218 For Alpha, we always store objects in a full register. 32-bit integers | |
| 219 are always sign-extended, but smaller objects retain their signedness. | |
| 220 | |
| 221 Note that small vector types can get mapped onto integer modes at the | |
| 222 whim of not appearing in alpha-modes.def. We never promoted these | |
| 223 values before; don't do so now that we've trimmed the set of modes to | |
| 224 those actually implemented in the backend. */ | |
| 225 | |
| 226 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ | |
| 227 if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
| 228 && (TYPE == NULL || TREE_CODE (TYPE) != VECTOR_TYPE) \ | |
| 229 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ | |
| 230 { \ | |
| 231 if ((MODE) == SImode) \ | |
| 232 (UNSIGNEDP) = 0; \ | |
| 233 (MODE) = DImode; \ | |
| 234 } | |
| 235 | |
| 236 /* Define this if most significant bit is lowest numbered | |
| 237 in instructions that operate on numbered bit-fields. | |
| 238 | |
| 239 There are no such instructions on the Alpha, but the documentation | |
| 240 is little endian. */ | |
| 241 #define BITS_BIG_ENDIAN 0 | |
| 242 | |
| 243 /* Define this if most significant byte of a word is the lowest numbered. | |
| 244 This is false on the Alpha. */ | |
| 245 #define BYTES_BIG_ENDIAN 0 | |
| 246 | |
| 247 /* Define this if most significant word of a multiword number is lowest | |
| 248 numbered. | |
| 249 | |
| 250 For Alpha we can decide arbitrarily since there are no machine instructions | |
| 251 for them. Might as well be consistent with bytes. */ | |
| 252 #define WORDS_BIG_ENDIAN 0 | |
| 253 | |
| 254 /* Width of a word, in units (bytes). */ | |
| 255 #define UNITS_PER_WORD 8 | |
| 256 | |
| 257 /* Width in bits of a pointer. | |
| 258 See also the macro `Pmode' defined below. */ | |
| 259 #define POINTER_SIZE 64 | |
| 260 | |
| 261 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
| 262 #define PARM_BOUNDARY 64 | |
| 263 | |
| 264 /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
| 265 #define STACK_BOUNDARY 128 | |
| 266 | |
| 267 /* Allocation boundary (in *bits*) for the code of a function. */ | |
| 268 #define FUNCTION_BOUNDARY 32 | |
| 269 | |
| 270 /* Alignment of field after `int : 0' in a structure. */ | |
| 271 #define EMPTY_FIELD_BOUNDARY 64 | |
| 272 | |
| 273 /* Every structure's size must be a multiple of this. */ | |
| 274 #define STRUCTURE_SIZE_BOUNDARY 8 | |
| 275 | |
| 276 /* A bit-field declared as `int' forces `int' alignment for the struct. */ | |
| 111 | 277 #undef PCC_BITFILED_TYPE_MATTERS |
| 0 | 278 #define PCC_BITFIELD_TYPE_MATTERS 1 |
| 279 | |
| 280 /* No data type wants to be aligned rounder than this. */ | |
| 281 #define BIGGEST_ALIGNMENT 128 | |
| 282 | |
| 283 /* For atomic access to objects, must have at least 32-bit alignment | |
| 284 unless the machine has byte operations. */ | |
| 285 #define MINIMUM_ATOMIC_ALIGNMENT ((unsigned int) (TARGET_BWX ? 8 : 32)) | |
| 286 | |
| 287 /* Align all constants and variables to at least a word boundary so | |
| 288 we can pick up pieces of them faster. */ | |
| 289 /* ??? Only if block-move stuff knows about different source/destination | |
| 290 alignment. */ | |
| 291 #if 0 | |
| 292 #define DATA_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD) | |
| 293 #endif | |
| 294 | |
| 295 /* Set this nonzero if move instructions will actually fail to work | |
| 296 when given unaligned data. | |
| 297 | |
| 298 Since we get an error message when we do one, call them invalid. */ | |
| 299 | |
| 300 #define STRICT_ALIGNMENT 1 | |
| 301 | |
| 302 /* Standard register usage. */ | |
| 303 | |
| 304 /* Number of actual hardware registers. | |
| 305 The hardware registers are assigned numbers for the compiler | |
| 306 from 0 to just below FIRST_PSEUDO_REGISTER. | |
| 307 All registers that the compiler knows about must be given numbers, | |
| 308 even those that are not normally considered general registers. | |
| 309 | |
| 310 We define all 32 integer registers, even though $31 is always zero, | |
| 311 and all 32 floating-point registers, even though $f31 is also | |
| 312 always zero. We do not bother defining the FP status register and | |
| 313 there are no other registers. | |
| 314 | |
| 315 Since $31 is always zero, we will use register number 31 as the | |
| 316 argument pointer. It will never appear in the generated code | |
| 317 because we will always be eliminating it in favor of the stack | |
| 318 pointer or hardware frame pointer. | |
| 319 | |
| 320 Likewise, we use $f31 for the frame pointer, which will always | |
| 321 be eliminated in favor of the hardware frame pointer or the | |
| 322 stack pointer. */ | |
| 323 | |
| 324 #define FIRST_PSEUDO_REGISTER 64 | |
| 325 | |
| 326 /* 1 for registers that have pervasive standard uses | |
| 327 and are not available for the register allocator. */ | |
| 328 | |
| 329 #define FIXED_REGISTERS \ | |
| 330 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 331 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \ | |
| 332 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 333 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 } | |
| 334 | |
| 335 /* 1 for registers not available across function calls. | |
| 336 These must include the FIXED_REGISTERS and also any | |
| 337 registers that can be used without being saved. | |
| 338 The latter must include the registers where values are returned | |
| 339 and the register where structure-value addresses are passed. | |
| 340 Aside from that, you can include as many other registers as you like. */ | |
| 341 #define CALL_USED_REGISTERS \ | |
| 342 {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \ | |
| 343 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \ | |
| 344 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \ | |
| 345 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } | |
| 346 | |
| 347 /* List the order in which to allocate registers. Each register must be | |
| 348 listed once, even those in FIXED_REGISTERS. */ | |
| 349 | |
| 350 #define REG_ALLOC_ORDER { \ | |
| 351 1, 2, 3, 4, 5, 6, 7, 8, /* nonsaved integer registers */ \ | |
| 352 22, 23, 24, 25, 28, /* likewise */ \ | |
| 353 0, /* likewise, but return value */ \ | |
| 354 21, 20, 19, 18, 17, 16, /* likewise, but input args */ \ | |
| 355 27, /* likewise, but OSF procedure value */ \ | |
| 356 \ | |
| 357 42, 43, 44, 45, 46, 47, /* nonsaved floating-point registers */ \ | |
| 358 54, 55, 56, 57, 58, 59, /* likewise */ \ | |
| 359 60, 61, 62, /* likewise */ \ | |
| 360 32, 33, /* likewise, but return values */ \ | |
| 361 53, 52, 51, 50, 49, 48, /* likewise, but input args */ \ | |
| 362 \ | |
| 363 9, 10, 11, 12, 13, 14, /* saved integer registers */ \ | |
| 364 26, /* return address */ \ | |
| 365 15, /* hard frame pointer */ \ | |
| 366 \ | |
| 367 34, 35, 36, 37, 38, 39, /* saved floating-point registers */ \ | |
| 368 40, 41, /* likewise */ \ | |
| 369 \ | |
| 370 29, 30, 31, 63 /* gp, sp, ap, sfp */ \ | |
| 371 } | |
| 372 | |
| 373 /* Specify the registers used for certain standard purposes. | |
| 374 The values of these macros are register numbers. */ | |
| 375 | |
| 376 /* Alpha pc isn't overloaded on a register that the compiler knows about. */ | |
| 377 /* #define PC_REGNUM */ | |
| 378 | |
| 379 /* Register to use for pushing function arguments. */ | |
| 380 #define STACK_POINTER_REGNUM 30 | |
| 381 | |
| 382 /* Base register for access to local variables of the function. */ | |
| 383 #define HARD_FRAME_POINTER_REGNUM 15 | |
| 384 | |
| 385 /* Base register for access to arguments of the function. */ | |
| 386 #define ARG_POINTER_REGNUM 31 | |
| 387 | |
| 388 /* Base register for access to local variables of function. */ | |
| 389 #define FRAME_POINTER_REGNUM 63 | |
| 390 | |
| 391 /* Register in which static-chain is passed to a function. | |
| 392 | |
| 393 For the Alpha, this is based on an example; the calling sequence | |
| 394 doesn't seem to specify this. */ | |
| 395 #define STATIC_CHAIN_REGNUM 1 | |
| 396 | |
| 397 /* The register number of the register used to address a table of | |
| 398 static data addresses in memory. */ | |
| 399 #define PIC_OFFSET_TABLE_REGNUM 29 | |
| 400 | |
| 401 /* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM' | |
| 402 is clobbered by calls. */ | |
| 403 /* ??? It is and it isn't. It's required to be valid for a given | |
| 404 function when the function returns. It isn't clobbered by | |
| 405 current_file functions. Moreover, we do not expose the ldgp | |
| 406 until after reload, so we're probably safe. */ | |
| 407 /* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */ | |
| 408 | |
| 409 /* Define the classes of registers for register constraints in the | |
| 410 machine description. Also define ranges of constants. | |
| 411 | |
| 412 One of the classes must always be named ALL_REGS and include all hard regs. | |
| 413 If there is more than one class, another class must be named NO_REGS | |
| 414 and contain no registers. | |
| 415 | |
| 416 The name GENERAL_REGS must be the name of a class (or an alias for | |
| 417 another name such as ALL_REGS). This is the class of registers | |
| 418 that is allowed by "g" or "r" in a register constraint. | |
| 419 Also, registers outside this class are allocated only when | |
| 420 instructions express preferences for them. | |
| 421 | |
| 422 The classes must be numbered in nondecreasing order; that is, | |
| 423 a larger-numbered class must never be contained completely | |
| 424 in a smaller-numbered class. | |
| 425 | |
| 426 For any two classes, it is very desirable that there be another | |
| 427 class that represents their union. */ | |
| 428 | |
| 429 enum reg_class { | |
| 430 NO_REGS, R0_REG, R24_REG, R25_REG, R27_REG, | |
| 431 GENERAL_REGS, FLOAT_REGS, ALL_REGS, | |
| 432 LIM_REG_CLASSES | |
| 433 }; | |
| 434 | |
| 435 #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
| 436 | |
| 437 /* Give names of register classes as strings for dump file. */ | |
| 438 | |
| 439 #define REG_CLASS_NAMES \ | |
| 440 {"NO_REGS", "R0_REG", "R24_REG", "R25_REG", "R27_REG", \ | |
| 441 "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" } | |
| 442 | |
| 443 /* Define which registers fit in which classes. | |
| 444 This is an initializer for a vector of HARD_REG_SET | |
| 445 of length N_REG_CLASSES. */ | |
| 446 | |
| 447 #define REG_CLASS_CONTENTS \ | |
| 448 { {0x00000000, 0x00000000}, /* NO_REGS */ \ | |
| 449 {0x00000001, 0x00000000}, /* R0_REG */ \ | |
| 450 {0x01000000, 0x00000000}, /* R24_REG */ \ | |
| 451 {0x02000000, 0x00000000}, /* R25_REG */ \ | |
| 452 {0x08000000, 0x00000000}, /* R27_REG */ \ | |
| 453 {0xffffffff, 0x80000000}, /* GENERAL_REGS */ \ | |
| 454 {0x00000000, 0x7fffffff}, /* FLOAT_REGS */ \ | |
| 455 {0xffffffff, 0xffffffff} } | |
| 456 | |
| 457 /* The same information, inverted: | |
| 458 Return the class number of the smallest class containing | |
| 459 reg number REGNO. This could be a conditional expression | |
| 460 or could index an array. */ | |
| 461 | |
| 462 #define REGNO_REG_CLASS(REGNO) \ | |
| 463 ((REGNO) == 0 ? R0_REG \ | |
| 464 : (REGNO) == 24 ? R24_REG \ | |
| 465 : (REGNO) == 25 ? R25_REG \ | |
| 466 : (REGNO) == 27 ? R27_REG \ | |
|
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77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
467 : IN_RANGE ((REGNO), 32, 62) ? FLOAT_REGS \ |
| 0 | 468 : GENERAL_REGS) |
| 469 | |
| 470 /* The class value for index registers, and the one for base regs. */ | |
| 471 #define INDEX_REG_CLASS NO_REGS | |
| 472 #define BASE_REG_CLASS GENERAL_REGS | |
| 473 | |
| 474 /* Given an rtx X being reloaded into a reg required to be | |
| 475 in class CLASS, return the class of reg to actually use. | |
| 476 In general this is just CLASS; but on some machines | |
| 477 in some cases it is preferable to use a more restrictive class. */ | |
| 478 | |
| 479 #define PREFERRED_RELOAD_CLASS alpha_preferred_reload_class | |
| 480 | |
| 481 /* Provide the cost of a branch. Exact meaning under development. */ | |
| 482 #define BRANCH_COST(speed_p, predictable_p) 5 | |
| 483 | |
| 484 /* Stack layout; function entry, exit and calling. */ | |
| 485 | |
| 486 /* Define this if pushing a word on the stack | |
| 487 makes the stack pointer a smaller address. */ | |
| 111 | 488 #define STACK_GROWS_DOWNWARD 1 |
| 0 | 489 |
| 490 /* Define this to nonzero if the nominal address of the stack frame | |
| 491 is at the high-address end of the local variables; | |
| 492 that is, each additional local variable allocated | |
| 493 goes at a more negative offset in the frame. */ | |
| 494 /* #define FRAME_GROWS_DOWNWARD 0 */ | |
| 495 | |
| 496 /* If we generate an insn to push BYTES bytes, | |
| 497 this says how many the stack pointer really advances by. | |
| 498 On Alpha, don't define this because there are no push insns. */ | |
| 499 /* #define PUSH_ROUNDING(BYTES) */ | |
| 500 | |
| 501 /* Define this to be nonzero if stack checking is built into the ABI. */ | |
| 502 #define STACK_CHECK_BUILTIN 1 | |
| 503 | |
| 504 /* Define this if the maximum size of all the outgoing args is to be | |
| 505 accumulated and pushed during the prologue. The amount can be | |
| 506 found in the variable crtl->outgoing_args_size. */ | |
| 507 #define ACCUMULATE_OUTGOING_ARGS 1 | |
| 508 | |
| 509 /* Offset of first parameter from the argument pointer register value. */ | |
| 510 | |
| 511 #define FIRST_PARM_OFFSET(FNDECL) 0 | |
| 512 | |
| 513 /* Definitions for register eliminations. | |
| 514 | |
| 515 We have two registers that can be eliminated on the Alpha. First, the | |
| 516 frame pointer register can often be eliminated in favor of the stack | |
| 517 pointer register. Secondly, the argument pointer register can always be | |
| 518 eliminated; it is replaced with either the stack or frame pointer. */ | |
| 519 | |
| 520 /* This is an array of structures. Each structure initializes one pair | |
| 521 of eliminable registers. The "from" register number is given first, | |
| 522 followed by "to". Eliminations of the same "from" register are listed | |
| 523 in order of preference. */ | |
| 524 | |
| 525 #define ELIMINABLE_REGS \ | |
| 526 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
| 527 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ | |
| 528 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
| 529 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} | |
| 530 | |
| 531 /* Round up to a multiple of 16 bytes. */ | |
| 111 | 532 #define ALPHA_ROUND(X) ROUND_UP ((X), 16) |
| 0 | 533 |
| 534 /* Define the offset between two registers, one to be eliminated, and the other | |
| 535 its replacement, at the start of a routine. */ | |
| 536 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
| 537 ((OFFSET) = alpha_initial_elimination_offset(FROM, TO)) | |
| 538 | |
| 539 /* Define this if stack space is still allocated for a parameter passed | |
| 540 in a register. */ | |
| 541 /* #define REG_PARM_STACK_SPACE */ | |
| 542 | |
| 543 /* 1 if N is a possible register number for function argument passing. | |
| 544 On Alpha, these are $16-$21 and $f16-$f21. */ | |
| 545 | |
| 546 #define FUNCTION_ARG_REGNO_P(N) \ | |
|
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547 (IN_RANGE ((N), 16, 21) || ((N) >= 16 + 32 && (N) <= 21 + 32)) |
| 0 | 548 |
| 549 /* Define a data type for recording info about an argument list | |
| 550 during the scan of that argument list. This data type should | |
| 551 hold all necessary information about the function itself | |
| 552 and about the args processed so far, enough to enable macros | |
| 553 such as FUNCTION_ARG to determine where the next arg should go. | |
| 554 | |
| 555 On Alpha, this is a single integer, which is a number of words | |
| 556 of arguments scanned so far. | |
| 557 Thus 6 or more means all following args should go on the stack. */ | |
| 558 | |
| 559 #define CUMULATIVE_ARGS int | |
| 560 | |
| 561 /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
| 562 for a call to a function whose data type is FNTYPE. | |
| 563 For a library call, FNTYPE is 0. */ | |
| 564 | |
| 565 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ | |
| 566 (CUM) = 0 | |
| 567 | |
| 111 | 568 /* Define intermediate macro to compute |
| 569 the size (in registers) of an argument. */ | |
| 0 | 570 |
| 111 | 571 #define ALPHA_ARG_SIZE(MODE, TYPE) \ |
| 0 | 572 ((MODE) == TFmode || (MODE) == TCmode ? 1 \ |
| 111 | 573 : CEIL (((MODE) == BLKmode \ |
| 574 ? int_size_in_bytes (TYPE) \ | |
| 575 : GET_MODE_SIZE (MODE)), \ | |
| 576 UNITS_PER_WORD)) | |
| 0 | 577 |
| 578 /* Make (or fake) .linkage entry for function call. | |
| 579 IS_LOCAL is 0 if name is used in call, 1 if name is used in definition. */ | |
| 580 | |
| 581 /* This macro defines the start of an assembly comment. */ | |
| 582 | |
| 583 #define ASM_COMMENT_START " #" | |
| 584 | |
| 585 /* This macro produces the initial definition of a function. */ | |
| 586 | |
| 111 | 587 #undef ASM_DECLARE_FUNCTION_NAME |
| 0 | 588 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \ |
| 589 alpha_start_function(FILE,NAME,DECL); | |
| 590 | |
| 591 /* This macro closes up a function definition for the assembler. */ | |
| 592 | |
| 111 | 593 #undef ASM_DECLARE_FUNCTION_SIZE |
| 0 | 594 #define ASM_DECLARE_FUNCTION_SIZE(FILE,NAME,DECL) \ |
| 595 alpha_end_function(FILE,NAME,DECL) | |
| 596 | |
| 597 /* Output any profiling code before the prologue. */ | |
| 598 | |
| 599 #define PROFILE_BEFORE_PROLOGUE 1 | |
| 600 | |
| 601 /* Never use profile counters. */ | |
| 602 | |
| 603 #define NO_PROFILE_COUNTERS 1 | |
| 604 | |
| 605 /* Output assembler code to FILE to increment profiler label # LABELNO | |
| 606 for profiling a function entry. Under OSF/1, profiling is enabled | |
| 607 by simply passing -pg to the assembler and linker. */ | |
| 608 | |
| 609 #define FUNCTION_PROFILER(FILE, LABELNO) | |
| 610 | |
| 611 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
| 612 the stack pointer does not matter. The value is tested only in | |
| 613 functions that have frame pointers. | |
| 614 No definition is equivalent to always zero. */ | |
| 615 | |
| 616 #define EXIT_IGNORE_STACK 1 | |
| 617 | |
| 618 /* Define registers used by the epilogue and return instruction. */ | |
| 619 | |
| 620 #define EPILOGUE_USES(REGNO) ((REGNO) == 26) | |
| 621 | |
| 622 /* Length in units of the trampoline for entering a nested function. */ | |
| 623 | |
| 624 #define TRAMPOLINE_SIZE 32 | |
| 625 | |
| 626 /* The alignment of a trampoline, in bits. */ | |
| 627 | |
| 628 #define TRAMPOLINE_ALIGNMENT 64 | |
| 629 | |
| 630 /* A C expression whose value is RTL representing the value of the return | |
| 631 address for the frame COUNT steps up from the current frame. | |
| 632 FRAMEADDR is the frame pointer of the COUNT frame, or the frame pointer of | |
| 633 the COUNT-1 frame if RETURN_ADDR_IN_PREVIOUS_FRAME is defined. */ | |
| 634 | |
| 635 #define RETURN_ADDR_RTX alpha_return_addr | |
| 636 | |
|
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637 /* Provide a definition of DWARF_FRAME_REGNUM here so that fallback unwinders |
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638 can use DWARF_ALT_FRAME_RETURN_COLUMN defined below. This is just the same |
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639 as the default definition in dwarf2out.c. */ |
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640 #undef DWARF_FRAME_REGNUM |
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641 #define DWARF_FRAME_REGNUM(REG) DBX_REGISTER_NUMBER (REG) |
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642 |
| 0 | 643 /* Before the prologue, RA lives in $26. */ |
| 644 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, 26) | |
| 645 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (26) | |
| 646 #define DWARF_ALT_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (64) | |
| 647 #define DWARF_ZERO_REG 31 | |
| 648 | |
| 649 /* Describe how we implement __builtin_eh_return. */ | |
| 650 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 16 : INVALID_REGNUM) | |
| 651 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 28) | |
| 652 #define EH_RETURN_HANDLER_RTX \ | |
| 111 | 653 gen_rtx_MEM (Pmode, plus_constant (Pmode, stack_pointer_rtx, \ |
| 0 | 654 crtl->outgoing_args_size)) |
| 655 | |
| 656 /* Addressing modes, and classification of registers for them. */ | |
| 657 | |
| 658 /* Macros to check register numbers against specific register classes. */ | |
| 659 | |
| 660 /* These assume that REGNO is a hard or pseudo reg number. | |
| 661 They give nonzero only if REGNO is a hard reg of the suitable class | |
| 662 or a pseudo reg currently allocated to a suitable hard reg. | |
| 663 Since they use reg_renumber, they are safe only once reg_renumber | |
| 111 | 664 has been allocated, which happens in reginfo.c during register |
| 665 allocation. */ | |
| 0 | 666 |
| 667 #define REGNO_OK_FOR_INDEX_P(REGNO) 0 | |
| 668 #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
| 669 ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32 \ | |
| 670 || (REGNO) == 63 || reg_renumber[REGNO] == 63) | |
| 671 | |
| 672 /* Maximum number of registers that can appear in a valid memory address. */ | |
| 673 #define MAX_REGS_PER_ADDRESS 1 | |
| 674 | |
| 675 /* Recognize any constant value that is a valid address. For the Alpha, | |
| 676 there are only constants none since we want to use LDA to load any | |
| 677 symbolic addresses into registers. */ | |
| 678 | |
| 679 #define CONSTANT_ADDRESS_P(X) \ | |
|
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680 (CONST_INT_P (X) \ |
| 131 | 681 && (UINTVAL (X) + 0x8000) < 0x10000) |
| 0 | 682 |
| 683 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
| 684 and check its validity for a certain class. | |
| 685 We have two alternate definitions for each of them. | |
| 686 The usual definition accepts all pseudo regs; the other rejects | |
| 687 them unless they have been allocated suitable hard regs. | |
| 688 The symbol REG_OK_STRICT causes the latter definition to be used. | |
| 689 | |
| 690 Most source files want to accept pseudo regs in the hope that | |
| 691 they will get allocated to the class that the insn wants them to be in. | |
| 692 Source files for reload pass need to be strict. | |
| 693 After reload, it makes no difference, since pseudo regs have | |
| 694 been eliminated by then. */ | |
| 695 | |
| 696 /* Nonzero if X is a hard reg that can be used as an index | |
| 697 or if it is a pseudo reg. */ | |
| 698 #define REG_OK_FOR_INDEX_P(X) 0 | |
| 699 | |
| 700 /* Nonzero if X is a hard reg that can be used as a base reg | |
| 701 or if it is a pseudo reg. */ | |
| 702 #define NONSTRICT_REG_OK_FOR_BASE_P(X) \ | |
| 703 (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER) | |
| 704 | |
| 705 /* ??? Nonzero if X is the frame pointer, or some virtual register | |
| 706 that may eliminate to the frame pointer. These will be allowed to | |
| 707 have offsets greater than 32K. This is done because register | |
| 708 elimination offsets will change the hi/lo split, and if we split | |
| 709 before reload, we will require additional instructions. */ | |
| 710 #define NONSTRICT_REG_OK_FP_BASE_P(X) \ | |
| 711 (REGNO (X) == 31 || REGNO (X) == 63 \ | |
| 712 || (REGNO (X) >= FIRST_PSEUDO_REGISTER \ | |
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713 && REGNO (X) < LAST_VIRTUAL_POINTER_REGISTER)) |
| 0 | 714 |
| 715 /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
| 716 #define STRICT_REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
| 717 | |
| 718 #ifdef REG_OK_STRICT | |
| 719 #define REG_OK_FOR_BASE_P(X) STRICT_REG_OK_FOR_BASE_P (X) | |
| 720 #else | |
| 721 #define REG_OK_FOR_BASE_P(X) NONSTRICT_REG_OK_FOR_BASE_P (X) | |
| 722 #endif | |
| 723 | |
| 724 /* Try a machine-dependent way of reloading an illegitimate address | |
| 725 operand. If we find one, push the reload and jump to WIN. This | |
| 726 macro is used in only one place: `find_reloads_address' in reload.c. */ | |
| 727 | |
| 728 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \ | |
| 729 do { \ | |
| 730 rtx new_x = alpha_legitimize_reload_address (X, MODE, OPNUM, TYPE, IND_L); \ | |
| 731 if (new_x) \ | |
| 732 { \ | |
| 733 X = new_x; \ | |
| 734 goto WIN; \ | |
| 735 } \ | |
| 736 } while (0) | |
| 737 | |
| 738 | |
| 739 /* Specify the machine mode that this machine uses | |
| 740 for the index in the tablejump instruction. */ | |
| 741 #define CASE_VECTOR_MODE SImode | |
| 742 | |
| 743 /* Define as C expression which evaluates to nonzero if the tablejump | |
| 744 instruction expects the table to contain offsets from the address of the | |
| 745 table. | |
| 746 | |
| 747 Do not define this if the table should contain absolute addresses. | |
| 748 On the Alpha, the table is really GP-relative, not relative to the PC | |
| 749 of the table, but we pretend that it is PC-relative; this should be OK, | |
| 750 but we should try to find some better way sometime. */ | |
| 751 #define CASE_VECTOR_PC_RELATIVE 1 | |
| 752 | |
| 753 /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
| 754 #define DEFAULT_SIGNED_CHAR 1 | |
| 755 | |
| 756 /* Max number of bytes we can move to or from memory | |
| 757 in one reasonably fast instruction. */ | |
| 758 | |
| 759 #define MOVE_MAX 8 | |
| 760 | |
| 761 /* If a memory-to-memory move would take MOVE_RATIO or more simple | |
| 145 | 762 move-instruction pairs, we will do a cpymem or libcall instead. |
| 0 | 763 |
| 764 Without byte/word accesses, we want no more than four instructions; | |
| 765 with, several single byte accesses are better. */ | |
| 766 | |
| 767 #define MOVE_RATIO(speed) (TARGET_BWX ? 7 : 2) | |
| 768 | |
| 769 /* Largest number of bytes of an object that can be placed in a register. | |
| 770 On the Alpha we have plenty of registers, so use TImode. */ | |
| 771 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode) | |
| 772 | |
| 773 /* Nonzero if access to memory by bytes is no faster than for words. | |
| 774 Also nonzero if doing byte operations (specifically shifts) in registers | |
| 775 is undesirable. | |
| 776 | |
| 777 On the Alpha, we want to not use the byte operation and instead use | |
| 778 masking operations to access fields; these will save instructions. */ | |
| 779 | |
| 780 #define SLOW_BYTE_ACCESS 1 | |
| 781 | |
| 782 /* Define if operations between registers always perform the operation | |
| 783 on the full register even if a narrower mode is specified. */ | |
| 111 | 784 #define WORD_REGISTER_OPERATIONS 1 |
| 0 | 785 |
| 786 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD | |
| 787 will either zero-extend or sign-extend. The value of this macro should | |
| 788 be the code that says which one of the two operations is implicitly | |
| 789 done, UNKNOWN if none. */ | |
| 790 #define LOAD_EXTEND_OP(MODE) ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND) | |
| 791 | |
| 792 /* Define if loading short immediate values into registers sign extends. */ | |
| 111 | 793 #define SHORT_IMMEDIATES_SIGN_EXTEND 1 |
| 0 | 794 |
| 795 /* The CIX ctlz and cttz instructions return 64 for zero. */ | |
| 111 | 796 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, \ |
| 797 TARGET_CIX ? 1 : 0) | |
| 798 #define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, \ | |
| 799 TARGET_CIX ? 1 : 0) | |
| 0 | 800 |
| 801 /* Define the value returned by a floating-point comparison instruction. */ | |
| 802 | |
| 803 #define FLOAT_STORE_FLAG_VALUE(MODE) \ | |
| 804 REAL_VALUE_ATOF ((TARGET_FLOAT_VAX ? "0.5" : "2.0"), (MODE)) | |
| 805 | |
| 806 /* Specify the machine mode that pointers have. | |
| 807 After generation of rtl, the compiler makes no further distinction | |
| 808 between pointers and any other objects of this machine mode. */ | |
| 809 #define Pmode DImode | |
| 810 | |
| 811 /* Mode of a function address in a call instruction (for indexing purposes). */ | |
| 812 | |
| 813 #define FUNCTION_MODE Pmode | |
| 814 | |
| 815 /* Define this if addresses of constant functions | |
| 816 shouldn't be put through pseudo regs where they can be cse'd. | |
| 817 Desirable on machines where ordinary constants are expensive | |
| 818 but a CALL with constant address is cheap. | |
| 819 | |
| 820 We define this on the Alpha so that gen_call and gen_call_value | |
| 821 get to see the SYMBOL_REF (for the hint field of the jsr). It will | |
| 822 then copy it into a register, thus actually letting the address be | |
| 823 cse'ed. */ | |
| 824 | |
| 111 | 825 #define NO_FUNCTION_CSE 1 |
| 0 | 826 |
| 827 /* Define this to be nonzero if shift instructions ignore all but the low-order | |
| 828 few bits. */ | |
| 829 #define SHIFT_COUNT_TRUNCATED 1 | |
| 830 | |
| 831 /* Control the assembler format that we output. */ | |
| 832 | |
| 833 /* Output to assembler file text saying following lines | |
| 834 may contain character constants, extra white space, comments, etc. */ | |
| 835 #define ASM_APP_ON (TARGET_EXPLICIT_RELOCS ? "\t.set\tmacro\n" : "") | |
| 836 | |
| 837 /* Output to assembler file text saying following lines | |
| 838 no longer contain unusual constructs. */ | |
| 839 #define ASM_APP_OFF (TARGET_EXPLICIT_RELOCS ? "\t.set\tnomacro\n" : "") | |
| 840 | |
| 841 #define TEXT_SECTION_ASM_OP "\t.text" | |
| 842 | |
| 843 /* Output before writable data. */ | |
| 844 | |
| 845 #define DATA_SECTION_ASM_OP "\t.data" | |
| 846 | |
| 847 /* How to refer to registers in assembler output. | |
| 848 This sequence is indexed by compiler's hard-register-number (see above). */ | |
| 849 | |
| 850 #define REGISTER_NAMES \ | |
| 851 {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \ | |
| 852 "$9", "$10", "$11", "$12", "$13", "$14", "$15", \ | |
| 853 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \ | |
| 854 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \ | |
| 855 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \ | |
| 856 "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \ | |
| 857 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\ | |
| 858 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"} | |
| 859 | |
| 860 /* Strip name encoding when emitting labels. */ | |
| 861 | |
| 862 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \ | |
| 863 do { \ | |
| 864 const char *name_ = NAME; \ | |
| 865 if (*name_ == '@' || *name_ == '%') \ | |
| 866 name_ += 2; \ | |
| 867 if (*name_ == '*') \ | |
| 868 name_++; \ | |
| 869 else \ | |
| 870 fputs (user_label_prefix, STREAM); \ | |
| 871 fputs (name_, STREAM); \ | |
| 872 } while (0) | |
| 873 | |
| 874 /* Globalizing directive for a label. */ | |
| 875 #define GLOBAL_ASM_OP "\t.globl " | |
| 876 | |
| 111 | 877 /* Use dollar signs rather than periods in special g++ assembler names. */ |
| 0 | 878 |
| 111 | 879 #undef NO_DOLLAR_IN_LABEL |
| 0 | 880 |
| 881 /* This is how to store into the string LABEL | |
| 882 the symbol_ref name of an internal numbered label where | |
| 883 PREFIX is the class of label and NUM is the number within the class. | |
| 884 This is suitable for output with `assemble_name'. */ | |
| 885 | |
| 111 | 886 #undef ASM_GENERATE_INTERNAL_LABEL |
| 0 | 887 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ |
| 888 sprintf ((LABEL), "*$%s%ld", (PREFIX), (long)(NUM)) | |
| 889 | |
| 890 /* This is how to output an element of a case-vector that is relative. */ | |
| 891 | |
| 892 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ | |
| 111 | 893 fprintf (FILE, "\t.gprel32 $L%d\n", (VALUE)) |
| 0 | 894 |
| 895 /* If we use NM, pass -g to it so it only lists globals. */ | |
| 896 #define NM_FLAGS "-pg" | |
| 897 | |
| 898 /* Definitions for debugging. */ | |
| 899 | |
| 900 /* Correct the offset of automatic variables and arguments. Note that | |
| 901 the Alpha debug format wants all automatic variables and arguments | |
| 902 to be in terms of two different offsets from the virtual frame pointer, | |
| 903 which is the stack pointer before any adjustment in the function. | |
| 904 The offset for the argument pointer is fixed for the native compiler, | |
| 905 it is either zero (for the no arguments case) or large enough to hold | |
| 906 all argument registers. | |
| 907 The offset for the auto pointer is the fourth argument to the .frame | |
| 908 directive (local_offset). | |
| 909 To stay compatible with the native tools we use the same offsets | |
| 910 from the virtual frame pointer and adjust the debugger arg/auto offsets | |
| 911 accordingly. These debugger offsets are set up in output_prolog. */ | |
| 912 | |
| 913 extern long alpha_arg_offset; | |
| 914 extern long alpha_auto_offset; | |
| 915 #define DEBUGGER_AUTO_OFFSET(X) \ | |
| 916 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset) | |
| 917 #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset) | |
| 918 | |
| 919 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \ | |
| 920 alpha_output_filename (STREAM, NAME) | |
| 921 | |
| 922 /* By default, turn on GDB extensions. */ | |
| 923 #define DEFAULT_GDB_EXTENSIONS 1 | |
| 924 | |
| 111 | 925 #define TARGET_SUPPORTS_WIDE_INT 1 |