Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/spu/spu.h @ 19:58ad6c70ea60
update gcc from 4.4.0 to 4.4.1.
| author | kent@firefly.cr.ie.u-ryukyu.ac.jp |
|---|---|
| date | Thu, 24 Sep 2009 13:21:57 +0900 |
| parents | a06113de4d67 |
| children | 77e2b8dfacca |
| rev | line source |
|---|---|
| 0 | 1 /* Copyright (C) 2006, 2007, 2008 Free Software Foundation, Inc. |
| 2 | |
| 3 This file is free software; you can redistribute it and/or modify it under | |
| 4 the terms of the GNU General Public License as published by the Free | |
| 5 Software Foundation; either version 3 of the License, or (at your option) | |
| 6 any later version. | |
| 7 | |
| 8 This file is distributed in the hope that it will be useful, but WITHOUT | |
| 9 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 10 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 11 for more details. | |
| 12 | |
| 13 You should have received a copy of the GNU General Public License | |
| 14 along with GCC; see the file COPYING3. If not see | |
| 15 <http://www.gnu.org/licenses/>. */ | |
| 16 | |
| 17 | |
| 18 /* Run-time Target */ | |
| 19 #define TARGET_CPU_CPP_BUILTINS() spu_cpu_cpp_builtins(pfile) | |
| 20 | |
| 21 #define TARGET_VERSION fprintf (stderr, " (spu %s)", __DATE__); | |
| 22 | |
| 23 #define OVERRIDE_OPTIONS spu_override_options() | |
| 24 #define C_COMMON_OVERRIDE_OPTIONS spu_c_common_override_options() | |
| 25 | |
| 26 #define OPTIMIZATION_OPTIONS(level,size) \ | |
| 27 spu_optimization_options(level,size) | |
| 28 | |
| 29 #define INIT_EXPANDERS spu_init_expanders() | |
| 30 | |
| 31 extern int target_flags; | |
| 32 extern const char *spu_fixed_range_string; | |
| 33 | |
| 34 /* Which processor to generate code or schedule for. */ | |
| 35 enum processor_type | |
| 36 { | |
| 37 PROCESSOR_CELL, | |
| 38 PROCESSOR_CELLEDP | |
| 39 }; | |
| 40 | |
| 41 extern GTY(()) int spu_arch; | |
| 42 extern GTY(()) int spu_tune; | |
| 43 | |
| 44 /* Support for a compile-time default architecture and tuning. The rules are: | |
| 45 --with-arch is ignored if -march is specified. | |
| 46 --with-tune is ignored if -mtune is specified. */ | |
| 47 #define OPTION_DEFAULT_SPECS \ | |
| 48 {"arch", "%{!march=*:-march=%(VALUE)}" }, \ | |
| 49 {"tune", "%{!mtune=*:-mtune=%(VALUE)}" } | |
| 50 | |
| 51 /* Default target_flags if no switches specified. */ | |
| 52 #ifndef TARGET_DEFAULT | |
| 53 #define TARGET_DEFAULT (MASK_ERROR_RELOC | MASK_SAFE_DMA | MASK_BRANCH_HINTS \ | |
| 54 | MASK_SAFE_HINTS) | |
| 55 #endif | |
| 56 | |
| 57 | |
| 58 /* Storage Layout */ | |
| 59 | |
| 60 #define BITS_BIG_ENDIAN 1 | |
| 61 | |
| 62 #define BYTES_BIG_ENDIAN 1 | |
| 63 | |
| 64 #define WORDS_BIG_ENDIAN 1 | |
| 65 | |
| 66 #define BITS_PER_UNIT 8 | |
| 67 | |
| 68 /* GCC uses word_mode in many places, assuming that it is the fastest | |
| 69 integer mode. That is not the case for SPU though. We can't use | |
| 70 32 here because (of some reason I can't remember.) */ | |
| 71 #define BITS_PER_WORD 128 | |
| 72 | |
| 73 #define UNITS_PER_WORD (BITS_PER_WORD/BITS_PER_UNIT) | |
| 74 | |
| 75 /* We never actually change UNITS_PER_WORD, but defining this causes | |
| 76 libgcc to use some different sizes of types when compiling. */ | |
| 77 #define MIN_UNITS_PER_WORD 4 | |
| 78 | |
| 79 #define POINTER_SIZE 32 | |
| 80 | |
| 81 #define PARM_BOUNDARY 128 | |
| 82 | |
| 83 #define STACK_BOUNDARY 128 | |
| 84 | |
| 85 /* We want it 8-byte aligned so we can properly use dual-issue | |
| 86 instructions, which can only happen on an 8-byte aligned address. */ | |
| 87 #define FUNCTION_BOUNDARY 64 | |
| 88 | |
| 89 /* We would like to allow a larger alignment for data objects (for DMA) | |
| 90 but the aligned attribute is limited by BIGGEST_ALIGNMENT. We don't | |
| 91 define BIGGEST_ALIGNMENT as larger because it is used in other places | |
| 92 and would end up wasting space. (Is this still true?) */ | |
| 93 #define BIGGEST_ALIGNMENT 128 | |
| 94 | |
| 95 #define MINIMUM_ATOMIC_ALIGNMENT 128 | |
| 96 | |
| 97 /* Make all static objects 16-byte aligned. This allows us to assume | |
| 98 they are also padded to 16-bytes, which means we can use a single | |
| 99 load or store instruction to access them. Do the same for objects | |
| 100 on the stack. (Except a bug (?) allows some stack objects to be | |
| 101 unaligned.) */ | |
| 102 #define DATA_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128) | |
| 103 #define CONSTANT_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128) | |
| 104 #define LOCAL_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128) | |
| 105 | |
| 106 #define EMPTY_FIELD_BOUNDARY 32 | |
| 107 | |
| 108 #define STRICT_ALIGNMENT 1 | |
| 109 | |
| 110 /* symbol_ref's of functions are not aligned to 16 byte boundary. */ | |
| 111 #define ALIGNED_SYMBOL_REF_P(X) \ | |
| 112 (GET_CODE (X) == SYMBOL_REF \ | |
| 113 && (SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_ALIGN1) == 0 \ | |
| 114 && (! SYMBOL_REF_FUNCTION_P (X) \ | |
| 115 || align_functions >= 16)) | |
| 116 | |
| 117 #define PCC_BITFIELD_TYPE_MATTERS 1 | |
| 118 | |
| 119 #define MAX_FIXED_MODE_SIZE 128 | |
| 120 | |
| 121 #define STACK_SAVEAREA_MODE(save_level) \ | |
| 122 (save_level == SAVE_FUNCTION ? VOIDmode \ | |
| 123 : save_level == SAVE_NONLOCAL ? SImode \ | |
| 124 : Pmode) | |
| 125 | |
| 126 #define STACK_SIZE_MODE SImode | |
| 127 | |
| 128 | |
| 129 /* Type Layout */ | |
| 130 | |
| 131 #define INT_TYPE_SIZE 32 | |
| 132 | |
| 133 #define LONG_TYPE_SIZE 32 | |
| 134 | |
| 135 #define LONG_LONG_TYPE_SIZE 64 | |
| 136 | |
| 137 #define FLOAT_TYPE_SIZE 32 | |
| 138 | |
| 139 #define DOUBLE_TYPE_SIZE 64 | |
| 140 | |
| 141 #define LONG_DOUBLE_TYPE_SIZE 64 | |
| 142 | |
| 143 #define DEFAULT_SIGNED_CHAR 0 | |
| 144 | |
| 145 | |
| 146 /* Register Basics */ | |
| 147 | |
| 148 /* 128-130 are special registers that never appear in assembly code. */ | |
| 149 #define FIRST_PSEUDO_REGISTER 131 | |
| 150 | |
| 151 #define FIXED_REGISTERS { \ | |
| 152 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 153 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 154 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 155 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 156 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 157 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 158 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 159 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 160 1, 1, 1 \ | |
| 161 } | |
| 162 | |
| 163 #define CALL_USED_REGISTERS { \ | |
| 164 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
| 165 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
| 166 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
| 167 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
| 168 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ | |
| 169 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 170 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 171 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
| 172 1, 1, 1 \ | |
| 173 } | |
| 174 | |
| 175 #define CONDITIONAL_REGISTER_USAGE \ | |
| 176 spu_conditional_register_usage() | |
| 177 | |
| 178 | |
| 179 /* Values in Registers */ | |
| 180 | |
| 181 #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
| 182 ((GET_MODE_BITSIZE(MODE)+MAX_FIXED_MODE_SIZE-1)/MAX_FIXED_MODE_SIZE) | |
| 183 | |
| 184 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1 | |
| 185 | |
| 186 #define MODES_TIEABLE_P(MODE1, MODE2) \ | |
| 187 (GET_MODE_BITSIZE (MODE1) <= MAX_FIXED_MODE_SIZE \ | |
| 188 && GET_MODE_BITSIZE (MODE2) <= MAX_FIXED_MODE_SIZE) | |
| 189 | |
| 190 | |
| 191 /* Register Classes */ | |
| 192 | |
| 193 enum reg_class { | |
| 194 NO_REGS, | |
| 195 GENERAL_REGS, | |
| 196 ALL_REGS, | |
| 197 LIM_REG_CLASSES | |
| 198 }; | |
| 199 | |
| 200 /* SPU is simple, it really only has one class of registers. */ | |
| 201 #define IRA_COVER_CLASSES { GENERAL_REGS, LIM_REG_CLASSES } | |
| 202 | |
| 203 #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
| 204 | |
| 205 #define REG_CLASS_NAMES \ | |
| 206 { "NO_REGS", \ | |
| 207 "GENERAL_REGS", \ | |
| 208 "ALL_REGS" \ | |
| 209 } | |
| 210 | |
| 211 #define REG_CLASS_CONTENTS { \ | |
| 212 {0, 0, 0, 0, 0}, /* no regs */ \ | |
| 213 {0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x3}, /* general regs */ \ | |
| 214 {0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x3}} /* all regs */ | |
| 215 | |
| 216 #define REGNO_REG_CLASS(REGNO) (GENERAL_REGS) | |
| 217 | |
| 218 #define BASE_REG_CLASS GENERAL_REGS | |
| 219 | |
| 220 #define INDEX_REG_CLASS GENERAL_REGS | |
| 221 | |
| 222 #define REGNO_OK_FOR_BASE_P(regno) \ | |
| 223 ((regno) < FIRST_PSEUDO_REGISTER || (regno > LAST_VIRTUAL_REGISTER && reg_renumber[regno] >= 0)) | |
| 224 | |
| 225 #define REGNO_OK_FOR_INDEX_P(regno) \ | |
| 226 ((regno) < FIRST_PSEUDO_REGISTER || (regno > LAST_VIRTUAL_REGISTER && reg_renumber[regno] >= 0)) | |
| 227 | |
| 228 #define INT_REG_OK_FOR_INDEX_P(X,STRICT) \ | |
| 229 ((!(STRICT) || REGNO_OK_FOR_INDEX_P (REGNO (X)))) | |
| 230 #define INT_REG_OK_FOR_BASE_P(X,STRICT) \ | |
| 231 ((!(STRICT) || REGNO_OK_FOR_BASE_P (REGNO (X)))) | |
| 232 | |
| 233 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS) | |
| 234 | |
| 235 #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
| 236 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
| 237 | |
| 238 /* GCC assumes that modes are in the lowpart of a register, which is | |
| 239 only true for SPU. */ | |
| 240 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ | |
| 241 ((GET_MODE_SIZE (FROM) > 4 || GET_MODE_SIZE (TO) > 4) \ | |
| 242 && (GET_MODE_SIZE (FROM) < 16 || GET_MODE_SIZE (TO) < 16) \ | |
| 243 && GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO)) | |
| 244 | |
| 245 #define REGISTER_TARGET_PRAGMAS() do { \ | |
| 246 targetm.resolve_overloaded_builtin = spu_resolve_overloaded_builtin; \ | |
| 247 }while (0); | |
| 248 | |
| 249 | |
| 250 /* Frame Layout */ | |
| 251 | |
| 252 #define STACK_GROWS_DOWNWARD | |
| 253 | |
| 254 #define FRAME_GROWS_DOWNWARD 1 | |
| 255 | |
| 256 #define STARTING_FRAME_OFFSET (0) | |
| 257 | |
| 258 #define STACK_POINTER_OFFSET 32 | |
| 259 | |
| 260 #define FIRST_PARM_OFFSET(FNDECL) (0) | |
| 261 | |
| 262 #define DYNAMIC_CHAIN_ADDRESS(FP) plus_constant ((FP), -16) | |
| 263 | |
| 264 #define RETURN_ADDR_RTX(COUNT,FP) (spu_return_addr (COUNT, FP)) | |
| 265 | |
| 266 /* Should this be defined? Would it simplify our implementation. */ | |
| 267 /* #define RETURN_ADDR_IN_PREVIOUS_FRAME */ | |
| 268 | |
| 269 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG(Pmode, LINK_REGISTER_REGNUM) | |
| 270 | |
| 271 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LINK_REGISTER_REGNUM) | |
| 272 | |
| 273 #define ARG_POINTER_CFA_OFFSET(FNDECL) (-STACK_POINTER_OFFSET) | |
| 274 | |
| 275 | |
| 276 /* Stack Checking */ | |
| 277 | |
| 278 /* We store the Available Stack Size in the second slot of the stack | |
| 279 register. We emit stack checking code during the prologue. */ | |
| 280 #define STACK_CHECK_BUILTIN 1 | |
| 281 | |
| 282 | |
| 283 /* Frame Registers, and other registers */ | |
| 284 | |
| 285 #define STACK_POINTER_REGNUM 1 | |
| 286 | |
| 287 /* Will be eliminated. */ | |
| 288 #define FRAME_POINTER_REGNUM 128 | |
| 289 | |
| 290 /* This is not specified in any ABI, so could be set to anything. */ | |
| 291 #define HARD_FRAME_POINTER_REGNUM 127 | |
| 292 | |
| 293 /* Will be eliminated. */ | |
| 294 #define ARG_POINTER_REGNUM 129 | |
| 295 | |
| 296 #define STATIC_CHAIN_REGNUM 2 | |
| 297 | |
| 298 #define LINK_REGISTER_REGNUM 0 | |
| 299 | |
| 300 /* Used to keep track of instructions that have clobbered the hint | |
| 301 * buffer. Users can also specify it in inline asm. */ | |
| 302 #define HBR_REGNUM 130 | |
| 303 | |
| 304 #define MAX_REGISTER_ARGS 72 | |
| 305 #define FIRST_ARG_REGNUM 3 | |
| 306 #define LAST_ARG_REGNUM (FIRST_ARG_REGNUM + MAX_REGISTER_ARGS - 1) | |
| 307 | |
| 308 #define MAX_REGISTER_RETURN 72 | |
| 309 #define FIRST_RETURN_REGNUM 3 | |
| 310 #define LAST_RETURN_REGNUM (FIRST_RETURN_REGNUM + MAX_REGISTER_RETURN - 1) | |
| 311 | |
| 312 | |
| 313 /* Elimination */ | |
| 314 | |
| 315 #define FRAME_POINTER_REQUIRED 0 | |
| 316 | |
| 317 #define ELIMINABLE_REGS \ | |
| 318 {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
| 319 {ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ | |
| 320 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
| 321 {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} | |
| 322 | |
| 323 #define CAN_ELIMINATE(FROM,TO) 1 | |
| 324 | |
| 325 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
| 326 ((OFFSET) = spu_initial_elimination_offset((FROM),(TO))) | |
| 327 | |
| 328 | |
| 329 /* Stack Arguments */ | |
| 330 | |
| 331 #define ACCUMULATE_OUTGOING_ARGS 1 | |
| 332 | |
| 333 #define REG_PARM_STACK_SPACE(FNDECL) 0 | |
| 334 | |
| 335 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1 | |
| 336 | |
| 337 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) (0) | |
| 338 | |
| 339 | |
| 340 /* Register Arguments */ | |
| 341 | |
| 342 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ | |
| 343 (spu_function_arg((CUM),(MODE),(TYPE),(NAMED))) | |
| 344 | |
| 345 #define CUMULATIVE_ARGS int | |
| 346 | |
| 347 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,FNDECL,N_NAMED_ARGS) \ | |
| 348 ((CUM) = 0) | |
| 349 | |
| 350 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
| 351 ((CUM) += \ | |
| 352 (TYPE) && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST ? 1 \ | |
| 353 : (MODE) == BLKmode ? ((int_size_in_bytes(TYPE)+15) / 16) \ | |
| 354 : (MODE) == VOIDmode ? 1 \ | |
| 355 : HARD_REGNO_NREGS(CUM,MODE)) | |
| 356 | |
| 357 | |
| 358 /* The SPU ABI wants 32/64-bit types at offset 0 in the quad-word on the | |
| 359 stack. 8/16-bit types should be at offsets 3/2 respectively. */ | |
| 360 #define FUNCTION_ARG_OFFSET(MODE, TYPE) \ | |
| 361 (((TYPE) && INTEGRAL_TYPE_P (TYPE) && GET_MODE_SIZE (MODE) < 4) \ | |
| 362 ? (4 - GET_MODE_SIZE (MODE)) \ | |
| 363 : 0) | |
| 364 | |
| 365 #define FUNCTION_ARG_PADDING(MODE,TYPE) upward | |
| 366 | |
| 367 #define PAD_VARARGS_DOWN 0 | |
| 368 | |
| 369 #define FUNCTION_ARG_REGNO_P(N) ((N) >= (FIRST_ARG_REGNUM) && (N) <= (LAST_ARG_REGNUM)) | |
| 370 | |
| 371 /* Scalar Return */ | |
| 372 | |
| 373 #define FUNCTION_VALUE(VALTYPE, FUNC) \ | |
| 374 (spu_function_value((VALTYPE),(FUNC))) | |
| 375 | |
| 376 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, FIRST_RETURN_REGNUM) | |
| 377 | |
| 378 #define FUNCTION_VALUE_REGNO_P(N) ((N) >= (FIRST_RETURN_REGNUM) && (N) <= (LAST_RETURN_REGNUM)) | |
| 379 | |
| 380 | |
| 381 /* Machine-specific symbol_ref flags. */ | |
| 382 #define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0) | |
| 383 | |
| 384 /* Aggregate Return */ | |
| 385 | |
| 386 #define DEFAULT_PCC_STRUCT_RETURN 0 | |
| 387 | |
| 388 | |
| 389 /* Function Entry */ | |
| 390 | |
| 391 #define EXIT_IGNORE_STACK 0 | |
| 392 | |
| 393 #define EPILOGUE_USES(REGNO) ((REGNO)==1 ? 1 : 0) | |
| 394 | |
| 395 | |
| 396 /* Profiling */ | |
| 397 | |
| 398 /* Nothing, for now. */ | |
| 399 #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
| 400 fprintf (FILE, "\t\n") | |
| 401 | |
| 402 | |
| 403 /* Trampolines */ | |
| 404 | |
| 405 #define TRAMPOLINE_SIZE (TARGET_LARGE_MEM ? 20 : 16) | |
| 406 | |
| 407 #define TRAMPOLINE_ALIGNMENT 128 | |
| 408 | |
| 409 #define INITIALIZE_TRAMPOLINE(TRAMP,FNADDR,CXT) \ | |
| 410 spu_initialize_trampoline(TRAMP,FNADDR,CXT) | |
| 411 | |
| 412 | |
| 413 /* Addressing Modes */ | |
| 414 | |
| 415 #define CONSTANT_ADDRESS_P(X) spu_constant_address_p(X) | |
| 416 | |
| 417 #define MAX_REGS_PER_ADDRESS 2 | |
| 418 | |
| 419 #ifdef REG_OK_STRICT | |
| 420 # define REG_OK_STRICT_FLAG 1 | |
| 421 #else | |
| 422 # define REG_OK_STRICT_FLAG 0 | |
| 423 #endif | |
| 424 | |
| 425 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
| 426 { if (spu_legitimate_address (MODE, X, REG_OK_STRICT_FLAG)) \ | |
| 427 goto ADDR; \ | |
| 428 } | |
| 429 | |
| 430 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ | |
| 431 { rtx result = spu_legitimize_address (X, OLDX, MODE); \ | |
| 432 if (result != NULL_RTX) \ | |
| 433 { \ | |
| 434 (X) = result; \ | |
| 435 goto WIN; \ | |
| 436 } \ | |
| 437 } | |
| 438 | |
| 439 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) | |
| 440 | |
| 441 #define LEGITIMATE_CONSTANT_P(X) spu_legitimate_constant_p(X) | |
| 442 | |
| 443 | |
| 444 /* Costs */ | |
| 445 | |
| 446 #define BRANCH_COST(speed_p, predictable_p) spu_branch_cost | |
| 447 | |
| 448 #define SLOW_BYTE_ACCESS 0 | |
| 449 | |
| 450 #define MOVE_RATIO(speed) 32 | |
| 451 | |
| 452 #define NO_FUNCTION_CSE | |
| 453 | |
| 454 | |
| 455 /* Sections */ | |
| 456 | |
| 457 #define TEXT_SECTION_ASM_OP ".text" | |
| 458 | |
| 459 #define DATA_SECTION_ASM_OP ".data" | |
| 460 | |
| 461 #define JUMP_TABLES_IN_TEXT_SECTION 1 | |
| 462 | |
| 463 | |
| 464 /* PIC */ | |
| 465 #define PIC_OFFSET_TABLE_REGNUM 126 | |
| 466 | |
| 467 | |
| 468 /* File Framework */ | |
| 469 | |
| 470 #define ASM_APP_ON "" | |
| 471 | |
| 472 #define ASM_APP_OFF "" | |
| 473 | |
| 474 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \ | |
| 475 do { fprintf (STREAM, "\t.file\t"); \ | |
| 476 output_quoted_string (STREAM, NAME); \ | |
| 477 fprintf (STREAM, "\n"); \ | |
| 478 } while (0) | |
| 479 | |
| 480 | |
| 481 /* Uninitialized Data */ | |
| 482 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ | |
| 483 ( fputs (".comm ", (FILE)), \ | |
| 484 assemble_name ((FILE), (NAME)), \ | |
| 485 fprintf ((FILE), ",%d\n", (ROUNDED))) | |
| 486 | |
| 487 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ | |
| 488 ( fputs (".lcomm ", (FILE)), \ | |
| 489 assemble_name ((FILE), (NAME)), \ | |
| 490 fprintf ((FILE), ",%d\n", (ROUNDED))) | |
| 491 | |
| 492 | |
| 493 /* Label Output */ | |
| 494 #define ASM_OUTPUT_LABEL(FILE,NAME) \ | |
| 495 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) | |
| 496 | |
| 497 #define ASM_OUTPUT_LABELREF(FILE, NAME) \ | |
| 498 asm_fprintf (FILE, "%U%s", default_strip_name_encoding (NAME)) | |
| 499 | |
| 500 | |
| 501 /* Instruction Output */ | |
| 502 #define REGISTER_NAMES \ | |
| 503 {"$lr", "$sp", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", \ | |
| 504 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25", "$26", "$27", "$28", "$29", "$30", "$31", \ | |
| 505 "$32", "$33", "$34", "$35", "$36", "$37", "$38", "$39", "$40", "$41", "$42", "$43", "$44", "$45", "$46", "$47", \ | |
| 506 "$48", "$49", "$50", "$51", "$52", "$53", "$54", "$55", "$56", "$57", "$58", "$59", "$60", "$61", "$62", "$63", \ | |
| 507 "$64", "$65", "$66", "$67", "$68", "$69", "$70", "$71", "$72", "$73", "$74", "$75", "$76", "$77", "$78", "$79", \ | |
| 508 "$80", "$81", "$82", "$83", "$84", "$85", "$86", "$87", "$88", "$89", "$90", "$91", "$92", "$93", "$94", "$95", \ | |
| 509 "$96", "$97", "$98", "$99", "$100", "$101", "$102", "$103", "$104", "$105", "$106", "$107", "$108", "$109", "$110", "$111", \ | |
| 510 "$112", "$113", "$114", "$115", "$116", "$117", "$118", "$119", "$120", "$121", "$122", "$123", "$124", "$125", "$126", "$127", \ | |
| 511 "$vfp", "$vap", "hbr" \ | |
| 512 } | |
| 513 | |
| 514 #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE) | |
| 515 | |
| 516 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ | |
| 517 print_operand_address (FILE, ADDR) | |
| 518 | |
| 519 #define LOCAL_LABEL_PREFIX "." | |
| 520 | |
| 521 #define USER_LABEL_PREFIX "" | |
| 522 | |
| 523 | |
| 524 /* Dispatch Tables */ | |
| 525 | |
| 526 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ | |
| 527 fprintf (FILE, "\t.word .L%d-.L%d\n", VALUE, REL) | |
| 528 | |
| 529 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ | |
| 530 fprintf (FILE, "\t.word .L%d\n", VALUE) | |
| 531 | |
| 532 | |
| 533 /* Alignment Output */ | |
| 534 | |
| 535 #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
| 536 do { if (LOG!=0) fprintf (FILE, "\t.align\t%d\n", (LOG)); } while (0) | |
| 537 | |
| 538 | |
| 539 /* Model costs for the vectorizer. */ | |
| 540 | |
| 541 /* Cost of conditional branch. */ | |
| 542 #ifndef TARG_COND_BRANCH_COST | |
| 543 #define TARG_COND_BRANCH_COST 6 | |
| 544 #endif | |
| 545 | |
| 546 /* Cost of any scalar operation, excluding load and store. */ | |
| 547 #ifndef TARG_SCALAR_STMT_COST | |
| 548 #define TARG_SCALAR_STMT_COST 1 | |
| 549 #endif | |
| 550 | |
| 551 /* Cost of scalar load. */ | |
| 552 #undef TARG_SCALAR_LOAD_COST | |
| 553 #define TARG_SCALAR_LOAD_COST 2 /* load + rotate */ | |
| 554 | |
| 555 /* Cost of scalar store. */ | |
| 556 #undef TARG_SCALAR_STORE_COST | |
| 557 #define TARG_SCALAR_STORE_COST 10 | |
| 558 | |
| 559 /* Cost of any vector operation, excluding load, store, | |
| 560 or vector to scalar operation. */ | |
| 561 #undef TARG_VEC_STMT_COST | |
| 562 #define TARG_VEC_STMT_COST 1 | |
| 563 | |
| 564 /* Cost of vector to scalar operation. */ | |
| 565 #undef TARG_VEC_TO_SCALAR_COST | |
| 566 #define TARG_VEC_TO_SCALAR_COST 1 | |
| 567 | |
| 568 /* Cost of scalar to vector operation. */ | |
| 569 #undef TARG_SCALAR_TO_VEC_COST | |
| 570 #define TARG_SCALAR_TO_VEC_COST 1 | |
| 571 | |
| 572 /* Cost of aligned vector load. */ | |
| 573 #undef TARG_VEC_LOAD_COST | |
| 574 #define TARG_VEC_LOAD_COST 1 | |
| 575 | |
| 576 /* Cost of misaligned vector load. */ | |
| 577 #undef TARG_VEC_UNALIGNED_LOAD_COST | |
| 578 #define TARG_VEC_UNALIGNED_LOAD_COST 2 | |
| 579 | |
| 580 /* Cost of vector store. */ | |
| 581 #undef TARG_VEC_STORE_COST | |
| 582 #define TARG_VEC_STORE_COST 1 | |
| 583 | |
| 584 /* Cost of vector permutation. */ | |
| 585 #ifndef TARG_VEC_PERMUTE_COST | |
| 586 #define TARG_VEC_PERMUTE_COST 1 | |
| 587 #endif | |
| 588 | |
| 589 | |
| 590 /* Misc */ | |
| 591 | |
| 592 #define CASE_VECTOR_MODE SImode | |
| 593 | |
| 594 #define MOVE_MAX 16 | |
| 595 | |
| 596 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) ((INPREC) <= 32 && (OUTPREC) <= (INPREC)) | |
| 597 | |
| 598 #define STORE_FLAG_VALUE -1 | |
| 599 | |
| 600 #define Pmode SImode | |
| 601 | |
| 602 #define FUNCTION_MODE QImode | |
| 603 | |
| 604 #define NO_IMPLICIT_EXTERN_C 1 | |
| 605 | |
| 606 #define HANDLE_PRAGMA_PACK_PUSH_POP 1 | |
| 607 | |
| 608 /* Canonicalize a comparison from one we don't have to one we do have. */ | |
| 609 #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \ | |
| 610 do { \ | |
| 611 if (((CODE) == LE || (CODE) == LT || (CODE) == LEU || (CODE) == LTU)) \ | |
| 612 { \ | |
| 613 rtx tem = (OP0); \ | |
| 614 (OP0) = (OP1); \ | |
| 615 (OP1) = tem; \ | |
| 616 (CODE) = swap_condition (CODE); \ | |
| 617 } \ | |
| 618 } while (0) | |
| 619 | |
| 620 /* These are set by the cmp patterns and used while expanding | |
| 621 conditional branches. */ | |
| 622 extern GTY(()) rtx spu_compare_op0; | |
| 623 extern GTY(()) rtx spu_compare_op1; | |
| 624 | |
|
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625 |
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626 /* Builtins. */ |
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627 |
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628 enum spu_builtin_type |
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629 { |
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630 B_INSN, |
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631 B_JUMP, |
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632 B_BISLED, |
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633 B_CALL, |
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634 B_HINT, |
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635 B_OVERLOAD, |
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636 B_INTERNAL |
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637 }; |
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638 |
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639 struct spu_builtin_description GTY(()) |
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640 { |
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641 int fcode; |
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642 int icode; |
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643 const char *name; |
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644 enum spu_builtin_type type; |
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645 |
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646 /* The first element of parm is always the return type. The rest |
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647 are a zero terminated list of parameters. */ |
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648 int parm[5]; |
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649 |
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650 tree fndecl; |
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651 }; |
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652 |
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653 extern struct spu_builtin_description spu_builtins[]; |
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654 |