Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/i386/i386.opt @ 131:84e7813d76e9
gcc-8.2
| author | mir3636 |
|---|---|
| date | Thu, 25 Oct 2018 07:37:49 +0900 |
| parents | 04ced10e8804 |
| children | 1830386684a0 |
| rev | line source |
|---|---|
| 0 | 1 ; Options for the IA-32 and AMD64 ports of the compiler. |
| 2 | |
| 131 | 3 ; Copyright (C) 2005-2018 Free Software Foundation, Inc. |
| 0 | 4 ; |
| 5 ; This file is part of GCC. | |
| 6 ; | |
| 7 ; GCC is free software; you can redistribute it and/or modify it under | |
| 8 ; the terms of the GNU General Public License as published by the Free | |
| 9 ; Software Foundation; either version 3, or (at your option) any later | |
| 10 ; version. | |
| 11 ; | |
| 12 ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
| 13 ; WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 14 ; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 15 ; for more details. | |
| 16 ; | |
| 17 ; You should have received a copy of the GNU General Public License | |
| 18 ; along with GCC; see the file COPYING3. If not see | |
| 19 ; <http://www.gnu.org/licenses/>. | |
| 20 | |
| 111 | 21 HeaderInclude |
| 22 config/i386/i386-opts.h | |
| 23 | |
|
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f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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changeset
|
24 ; Bit flags that specify the ISA we are compiling for. |
|
f6334be47118
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nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
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changeset
|
25 Variable |
| 111 | 26 HOST_WIDE_INT ix86_isa_flags = TARGET_64BIT_DEFAULT | TARGET_SUBTARGET_ISA_DEFAULT |
| 27 | |
| 28 Variable | |
| 29 HOST_WIDE_INT ix86_isa_flags2 = 0 | |
| 30 | |
| 31 ; A mask of ix86_isa_flags that includes bit X if X was set or cleared | |
| 32 ; on the command line. | |
| 33 Variable | |
| 34 HOST_WIDE_INT ix86_isa_flags_explicit | |
| 35 | |
| 36 Variable | |
| 37 HOST_WIDE_INT ix86_isa_flags2_explicit | |
| 38 | |
| 39 ; Additional target flags | |
| 40 Variable | |
| 41 int ix86_target_flags | |
| 42 | |
| 43 TargetVariable | |
| 44 int recip_mask = RECIP_MASK_DEFAULT | |
| 45 | |
| 46 Variable | |
| 47 int recip_mask_explicit | |
| 48 | |
| 49 TargetSave | |
| 50 int x_recip_mask_explicit | |
|
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parents:
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changeset
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51 |
| 0 | 52 ;; Definitions to add to the cl_target_option structure |
| 53 ;; -march= processor | |
| 54 TargetSave | |
| 55 unsigned char arch | |
| 56 | |
| 57 ;; -mtune= processor | |
| 58 TargetSave | |
| 59 unsigned char tune | |
| 60 | |
| 111 | 61 ;; -march= processor-string |
| 0 | 62 TargetSave |
| 111 | 63 const char *x_ix86_arch_string |
| 64 | |
| 65 ;; -mtune= processor-string | |
| 66 TargetSave | |
| 67 const char *x_ix86_tune_string | |
| 0 | 68 |
| 69 ;; CPU schedule model | |
| 70 TargetSave | |
| 71 unsigned char schedule | |
| 72 | |
| 111 | 73 ;; True if processor has SSE prefetch instruction. |
| 74 TargetSave | |
| 75 unsigned char prefetch_sse | |
| 76 | |
| 0 | 77 ;; branch cost |
| 78 TargetSave | |
| 79 unsigned char branch_cost | |
| 80 | |
| 81 ;; which flags were passed by the user | |
| 82 TargetSave | |
| 111 | 83 HOST_WIDE_INT x_ix86_isa_flags2_explicit |
| 0 | 84 |
| 85 ;; which flags were passed by the user | |
| 86 TargetSave | |
| 111 | 87 HOST_WIDE_INT x_ix86_isa_flags_explicit |
| 0 | 88 |
| 89 ;; whether -mtune was not specified | |
| 90 TargetSave | |
| 91 unsigned char tune_defaulted | |
| 92 | |
| 93 ;; whether -march was specified | |
| 94 TargetSave | |
| 95 unsigned char arch_specified | |
| 96 | |
| 111 | 97 ;; -mcmodel= model |
| 98 TargetSave | |
| 99 enum cmodel x_ix86_cmodel | |
| 100 | |
| 101 ;; -mabi= | |
| 102 TargetSave | |
| 103 enum calling_abi x_ix86_abi | |
| 104 | |
| 105 ;; -masm= | |
| 106 TargetSave | |
| 107 enum asm_dialect x_ix86_asm_dialect | |
| 108 | |
| 109 ;; -mbranch-cost= | |
| 110 TargetSave | |
| 111 int x_ix86_branch_cost | |
| 112 | |
| 113 ;; -mdump-tune-features= | |
| 114 TargetSave | |
| 115 int x_ix86_dump_tunes | |
| 116 | |
| 117 ;; -mstackrealign= | |
| 118 TargetSave | |
| 119 int x_ix86_force_align_arg_pointer | |
| 120 | |
| 121 ;; -mforce-drap= | |
| 122 TargetSave | |
| 123 int x_ix86_force_drap | |
| 124 | |
| 125 ;; -mincoming-stack-boundary= | |
| 126 TargetSave | |
| 127 int x_ix86_incoming_stack_boundary_arg | |
| 128 | |
| 129 ;; -maddress-mode= | |
| 130 TargetSave | |
| 131 enum pmode x_ix86_pmode | |
| 132 | |
| 133 ;; -mpreferred-stack-boundary= | |
| 134 TargetSave | |
| 135 int x_ix86_preferred_stack_boundary_arg | |
| 136 | |
| 137 ;; -mrecip= | |
| 138 TargetSave | |
| 139 const char *x_ix86_recip_name | |
| 140 | |
| 141 ;; -mregparm= | |
| 142 TargetSave | |
| 143 int x_ix86_regparm | |
| 144 | |
| 145 ;; -mlarge-data-threshold= | |
| 146 TargetSave | |
| 147 int x_ix86_section_threshold | |
| 148 | |
| 149 ;; -msse2avx= | |
| 150 TargetSave | |
| 151 int x_ix86_sse2avx | |
| 152 | |
| 153 ;; -mstack-protector-guard= | |
| 154 TargetSave | |
| 155 enum stack_protector_guard x_ix86_stack_protector_guard | |
| 156 | |
| 157 ;; -mstringop-strategy= | |
| 158 TargetSave | |
| 159 enum stringop_alg x_ix86_stringop_alg | |
| 160 | |
| 161 ;; -mtls-dialect= | |
| 162 TargetSave | |
| 163 enum tls_dialect x_ix86_tls_dialect | |
| 164 | |
| 165 ;; -mtune-ctrl= | |
| 166 TargetSave | |
| 167 const char *x_ix86_tune_ctrl_string | |
| 168 | |
| 169 ;; -mmemcpy-strategy= | |
| 170 TargetSave | |
| 171 const char *x_ix86_tune_memcpy_strategy | |
| 172 | |
| 173 ;; -mmemset-strategy= | |
| 174 TargetSave | |
| 175 const char *x_ix86_tune_memset_strategy | |
| 176 | |
| 177 ;; -mno-default= | |
| 178 TargetSave | |
| 179 int x_ix86_tune_no_default | |
| 180 | |
| 181 ;; -mveclibabi= | |
| 182 TargetSave | |
| 183 enum ix86_veclibabi x_ix86_veclibabi_type | |
| 184 | |
| 131 | 185 ;; -mprefer-vector-width= |
| 186 TargetSave | |
| 187 enum prefer_vector_width x_prefer_vector_width_type | |
| 188 | |
| 0 | 189 ;; x86 options |
| 190 m128bit-long-double | |
| 191 Target RejectNegative Report Mask(128BIT_LONG_DOUBLE) Save | |
| 111 | 192 sizeof(long double) is 16. |
| 0 | 193 |
| 194 m80387 | |
| 195 Target Report Mask(80387) Save | |
| 111 | 196 Use hardware fp. |
| 0 | 197 |
| 198 m96bit-long-double | |
| 199 Target RejectNegative Report InverseMask(128BIT_LONG_DOUBLE) Save | |
| 111 | 200 sizeof(long double) is 12. |
| 201 | |
| 202 mlong-double-80 | |
| 203 Target Report RejectNegative Negative(mlong-double-64) InverseMask(LONG_DOUBLE_64) Save | |
| 204 Use 80-bit long double. | |
| 205 | |
| 206 mlong-double-64 | |
| 207 Target Report RejectNegative Negative(mlong-double-128) Mask(LONG_DOUBLE_64) InverseMask(LONG_DOUBLE_128) Save | |
| 208 Use 64-bit long double. | |
| 209 | |
| 210 mlong-double-128 | |
| 211 Target Report RejectNegative Negative(mlong-double-80) Mask(LONG_DOUBLE_128) InverseMask(LONG_DOUBLE_64) Save | |
| 212 Use 128-bit long double. | |
| 0 | 213 |
| 214 maccumulate-outgoing-args | |
| 215 Target Report Mask(ACCUMULATE_OUTGOING_ARGS) Save | |
| 111 | 216 Reserve space for outgoing arguments in the function prologue. |
| 0 | 217 |
| 218 malign-double | |
| 219 Target Report Mask(ALIGN_DOUBLE) Save | |
| 111 | 220 Align some doubles on dword boundary. |
| 0 | 221 |
| 222 malign-functions= | |
| 111 | 223 Target RejectNegative Joined UInteger |
| 224 Function starts are aligned to this power of 2. | |
| 0 | 225 |
| 226 malign-jumps= | |
| 111 | 227 Target RejectNegative Joined UInteger |
| 228 Jump targets are aligned to this power of 2. | |
| 0 | 229 |
| 230 malign-loops= | |
| 111 | 231 Target RejectNegative Joined UInteger |
| 232 Loop code aligned to this power of 2. | |
| 0 | 233 |
| 234 malign-stringops | |
| 235 Target RejectNegative Report InverseMask(NO_ALIGN_STRINGOPS, ALIGN_STRINGOPS) Save | |
| 111 | 236 Align destination of the string operations. |
| 237 | |
| 238 malign-data= | |
| 239 Target RejectNegative Joined Var(ix86_align_data_type) Enum(ix86_align_data) Init(ix86_align_data_type_compat) | |
| 240 Use the given data alignment. | |
| 241 | |
| 242 Enum | |
| 243 Name(ix86_align_data) Type(enum ix86_align_data) | |
| 244 Known data alignment choices (for use with the -malign-data= option): | |
| 245 | |
| 246 EnumValue | |
| 247 Enum(ix86_align_data) String(compat) Value(ix86_align_data_type_compat) | |
| 248 | |
| 249 EnumValue | |
| 250 Enum(ix86_align_data) String(abi) Value(ix86_align_data_type_abi) | |
| 251 | |
| 252 EnumValue | |
| 253 Enum(ix86_align_data) String(cacheline) Value(ix86_align_data_type_cacheline) | |
| 0 | 254 |
| 255 march= | |
| 256 Target RejectNegative Joined Var(ix86_arch_string) | |
| 111 | 257 Generate code for given CPU. |
| 0 | 258 |
| 259 masm= | |
| 111 | 260 Target RejectNegative Joined Enum(asm_dialect) Var(ix86_asm_dialect) Init(ASM_ATT) |
| 261 Use given assembler dialect. | |
| 262 | |
| 263 Enum | |
| 264 Name(asm_dialect) Type(enum asm_dialect) | |
| 265 Known assembler dialects (for use with the -masm= option): | |
| 266 | |
| 267 EnumValue | |
| 268 Enum(asm_dialect) String(intel) Value(ASM_INTEL) | |
| 269 | |
| 270 EnumValue | |
| 271 Enum(asm_dialect) String(att) Value(ASM_ATT) | |
| 0 | 272 |
| 273 mbranch-cost= | |
| 111 | 274 Target RejectNegative Joined UInteger Var(ix86_branch_cost) IntegerRange(0, 5) |
| 275 Branches are this expensive (arbitrary units). | |
| 0 | 276 |
| 277 mlarge-data-threshold= | |
| 111 | 278 Target RejectNegative Joined UInteger Var(ix86_section_threshold) Init(DEFAULT_LARGE_SECTION_THRESHOLD) |
| 279 -mlarge-data-threshold=<number> Data greater than given threshold will go into .ldata section in x86-64 medium model. | |
| 0 | 280 |
| 281 mcmodel= | |
| 111 | 282 Target RejectNegative Joined Enum(cmodel) Var(ix86_cmodel) Init(CM_32) |
| 283 Use given x86-64 code model. | |
| 284 | |
| 285 Enum | |
| 286 Name(cmodel) Type(enum cmodel) | |
| 287 Known code models (for use with the -mcmodel= option): | |
| 288 | |
| 289 EnumValue | |
| 290 Enum(cmodel) String(small) Value(CM_SMALL) | |
| 291 | |
| 292 EnumValue | |
| 293 Enum(cmodel) String(medium) Value(CM_MEDIUM) | |
| 294 | |
| 295 EnumValue | |
| 296 Enum(cmodel) String(large) Value(CM_LARGE) | |
| 297 | |
| 298 EnumValue | |
| 299 Enum(cmodel) String(32) Value(CM_32) | |
| 300 | |
| 301 EnumValue | |
| 302 Enum(cmodel) String(kernel) Value(CM_KERNEL) | |
| 303 | |
| 304 maddress-mode= | |
| 305 Target RejectNegative Joined Enum(pmode) Var(ix86_pmode) Init(PMODE_SI) | |
| 306 Use given address mode. | |
| 307 | |
| 308 Enum | |
| 309 Name(pmode) Type(enum pmode) | |
| 310 Known address mode (for use with the -maddress-mode= option): | |
| 311 | |
| 312 EnumValue | |
| 313 Enum(pmode) String(short) Value(PMODE_SI) | |
| 314 | |
| 315 EnumValue | |
| 316 Enum(pmode) String(long) Value(PMODE_DI) | |
| 0 | 317 |
|
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f6334be47118
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nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
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318 mcpu= |
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f6334be47118
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nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
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319 Target RejectNegative Joined Undocumented Alias(mtune=) Warn(%<-mcpu=%> is deprecated; use %<-mtune=%> or %<-march=%> instead) |
|
f6334be47118
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nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
320 |
| 0 | 321 mfancy-math-387 |
| 322 Target RejectNegative Report InverseMask(NO_FANCY_MATH_387, USE_FANCY_MATH_387) Save | |
| 111 | 323 Generate sin, cos, sqrt for FPU. |
| 0 | 324 |
| 325 mforce-drap | |
| 326 Target Report Var(ix86_force_drap) | |
| 111 | 327 Always use Dynamic Realigned Argument Pointer (DRAP) to realign stack. |
| 0 | 328 |
| 329 mfp-ret-in-387 | |
| 330 Target Report Mask(FLOAT_RETURNS) Save | |
| 111 | 331 Return values of functions in FPU registers. |
| 0 | 332 |
| 333 mfpmath= | |
| 111 | 334 Target RejectNegative Joined Var(ix86_fpmath) Enum(fpmath_unit) Init(FPMATH_387) Save |
| 335 Generate floating point mathematics using given instruction set. | |
| 336 | |
| 337 Enum | |
| 338 Name(fpmath_unit) Type(enum fpmath_unit) | |
| 339 Valid arguments to -mfpmath=: | |
| 340 | |
| 341 EnumValue | |
| 342 Enum(fpmath_unit) String(387) Value(FPMATH_387) | |
| 343 | |
| 344 EnumValue | |
| 345 Enum(fpmath_unit) String(sse) Value(FPMATH_SSE) | |
| 346 | |
| 347 EnumValue | |
| 348 Enum(fpmath_unit) String(387,sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) | |
| 349 | |
| 350 EnumValue | |
| 351 Enum(fpmath_unit) String(387+sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) | |
| 352 | |
| 353 EnumValue | |
| 354 Enum(fpmath_unit) String(sse,387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) | |
| 355 | |
| 356 EnumValue | |
| 357 Enum(fpmath_unit) String(sse+387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) | |
| 358 | |
| 359 EnumValue | |
| 360 Enum(fpmath_unit) String(both) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) | |
| 0 | 361 |
| 362 mhard-float | |
| 111 | 363 Target RejectNegative Mask(80387) Save |
| 364 Use hardware fp. | |
| 0 | 365 |
| 366 mieee-fp | |
| 367 Target Report Mask(IEEE_FP) Save | |
| 111 | 368 Use IEEE math for fp comparisons. |
| 0 | 369 |
| 370 minline-all-stringops | |
| 371 Target Report Mask(INLINE_ALL_STRINGOPS) Save | |
| 111 | 372 Inline all known string operations. |
| 0 | 373 |
| 374 minline-stringops-dynamically | |
| 375 Target Report Mask(INLINE_STRINGOPS_DYNAMICALLY) Save | |
| 111 | 376 Inline memset/memcpy string operations, but perform inline version only for small blocks. |
| 0 | 377 |
| 378 mintel-syntax | |
|
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f6334be47118
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nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
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379 Target Undocumented Alias(masm=, intel, att) Warn(%<-mintel-syntax%> and %<-mno-intel-syntax%> are deprecated; use %<-masm=intel%> and %<-masm=att%> instead) |
| 0 | 380 ;; Deprecated |
| 381 | |
| 382 mms-bitfields | |
| 383 Target Report Mask(MS_BITFIELD_LAYOUT) Save | |
| 111 | 384 Use native (MS) bitfield layout. |
| 0 | 385 |
| 386 mno-align-stringops | |
| 387 Target RejectNegative Report Mask(NO_ALIGN_STRINGOPS) Undocumented Save | |
| 388 | |
| 389 mno-fancy-math-387 | |
| 390 Target RejectNegative Report Mask(NO_FANCY_MATH_387) Undocumented Save | |
| 391 | |
| 392 mno-push-args | |
| 393 Target RejectNegative Report Mask(NO_PUSH_ARGS) Undocumented Save | |
| 394 | |
| 395 mno-red-zone | |
| 396 Target RejectNegative Report Mask(NO_RED_ZONE) Undocumented Save | |
| 397 | |
| 398 momit-leaf-frame-pointer | |
| 399 Target Report Mask(OMIT_LEAF_FRAME_POINTER) Save | |
| 111 | 400 Omit the frame pointer in leaf functions. |
| 401 | |
| 402 mpc32 | |
| 403 Target RejectNegative Report | |
| 404 Set 80387 floating-point precision to 32-bit. | |
| 0 | 405 |
| 111 | 406 mpc64 |
| 407 Target RejectNegative Report | |
| 408 Set 80387 floating-point precision to 64-bit. | |
| 409 | |
| 410 mpc80 | |
| 411 Target RejectNegative Report | |
| 412 Set 80387 floating-point precision to 80-bit. | |
| 0 | 413 |
| 414 mpreferred-stack-boundary= | |
| 111 | 415 Target RejectNegative Joined UInteger Var(ix86_preferred_stack_boundary_arg) |
| 416 Attempt to keep stack aligned to this power of 2. | |
| 0 | 417 |
| 418 mincoming-stack-boundary= | |
| 111 | 419 Target RejectNegative Joined UInteger Var(ix86_incoming_stack_boundary_arg) |
| 420 Assume incoming stack aligned to this power of 2. | |
| 0 | 421 |
| 422 mpush-args | |
| 423 Target Report InverseMask(NO_PUSH_ARGS, PUSH_ARGS) Save | |
| 111 | 424 Use push instructions to save outgoing arguments. |
| 0 | 425 |
| 426 mred-zone | |
| 427 Target RejectNegative Report InverseMask(NO_RED_ZONE, RED_ZONE) Save | |
| 111 | 428 Use red-zone in the x86-64 code. |
| 0 | 429 |
| 430 mregparm= | |
| 111 | 431 Target RejectNegative Joined UInteger Var(ix86_regparm) |
| 432 Number of registers used to pass integer arguments. | |
| 0 | 433 |
| 434 mrtd | |
| 435 Target Report Mask(RTD) Save | |
| 111 | 436 Alternate calling convention. |
| 0 | 437 |
| 438 msoft-float | |
| 439 Target InverseMask(80387) Save | |
| 111 | 440 Do not use hardware fp. |
| 0 | 441 |
| 442 msseregparm | |
| 443 Target RejectNegative Mask(SSEREGPARM) Save | |
| 111 | 444 Use SSE register passing conventions for SF and DF mode. |
| 0 | 445 |
| 446 mstackrealign | |
| 111 | 447 Target Report Var(ix86_force_align_arg_pointer) |
| 448 Realign stack in prologue. | |
| 0 | 449 |
| 450 mstack-arg-probe | |
| 451 Target Report Mask(STACK_PROBE) Save | |
| 111 | 452 Enable stack probing. |
| 453 | |
| 454 mmemcpy-strategy= | |
| 455 Target RejectNegative Joined Var(ix86_tune_memcpy_strategy) | |
| 456 Specify memcpy expansion strategy when expected size is known. | |
| 457 | |
| 458 mmemset-strategy= | |
| 459 Target RejectNegative Joined Var(ix86_tune_memset_strategy) | |
| 460 Specify memset expansion strategy when expected size is known. | |
| 0 | 461 |
| 462 mstringop-strategy= | |
| 111 | 463 Target RejectNegative Joined Enum(stringop_alg) Var(ix86_stringop_alg) Init(no_stringop) |
| 464 Chose strategy to generate stringop using. | |
| 465 | |
| 466 Enum | |
| 467 Name(stringop_alg) Type(enum stringop_alg) | |
| 468 Valid arguments to -mstringop-strategy=: | |
| 469 | |
| 470 EnumValue | |
| 471 Enum(stringop_alg) String(rep_byte) Value(rep_prefix_1_byte) | |
| 472 | |
| 473 EnumValue | |
| 474 Enum(stringop_alg) String(libcall) Value(libcall) | |
| 475 | |
| 476 EnumValue | |
| 477 Enum(stringop_alg) String(rep_4byte) Value(rep_prefix_4_byte) | |
| 478 | |
| 479 EnumValue | |
| 480 Enum(stringop_alg) String(rep_8byte) Value(rep_prefix_8_byte) | |
| 481 | |
| 482 EnumValue | |
| 483 Enum(stringop_alg) String(byte_loop) Value(loop_1_byte) | |
| 484 | |
| 485 EnumValue | |
| 486 Enum(stringop_alg) String(loop) Value(loop) | |
| 487 | |
| 488 EnumValue | |
| 489 Enum(stringop_alg) String(unrolled_loop) Value(unrolled_loop) | |
| 490 | |
| 491 EnumValue | |
| 492 Enum(stringop_alg) String(vector_loop) Value(vector_loop) | |
| 0 | 493 |
| 494 mtls-dialect= | |
| 111 | 495 Target RejectNegative Joined Var(ix86_tls_dialect) Enum(tls_dialect) Init(TLS_DIALECT_GNU) |
| 496 Use given thread-local storage dialect. | |
| 497 | |
| 498 Enum | |
| 499 Name(tls_dialect) Type(enum tls_dialect) | |
| 500 Known TLS dialects (for use with the -mtls-dialect= option): | |
| 501 | |
| 502 EnumValue | |
| 503 Enum(tls_dialect) String(gnu) Value(TLS_DIALECT_GNU) | |
| 504 | |
| 505 EnumValue | |
| 506 Enum(tls_dialect) String(gnu2) Value(TLS_DIALECT_GNU2) | |
| 0 | 507 |
| 508 mtls-direct-seg-refs | |
| 509 Target Report Mask(TLS_DIRECT_SEG_REFS) | |
| 111 | 510 Use direct references against %gs when accessing tls data. |
| 0 | 511 |
| 512 mtune= | |
| 513 Target RejectNegative Joined Var(ix86_tune_string) | |
| 111 | 514 Schedule code for given CPU. |
| 515 | |
| 516 mtune-ctrl= | |
| 517 Target RejectNegative Joined Var(ix86_tune_ctrl_string) | |
| 518 Fine grain control of tune features. | |
| 519 | |
| 520 mno-default | |
| 521 Target RejectNegative Var(ix86_tune_no_default) | |
| 522 Clear all tune features. | |
| 523 | |
| 524 mdump-tune-features | |
| 525 Target RejectNegative Var(ix86_dump_tunes) | |
| 526 | |
| 527 miamcu | |
| 528 Target Report Mask(IAMCU) | |
| 529 Generate code that conforms to Intel MCU psABI. | |
| 0 | 530 |
|
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531 mabi= |
| 111 | 532 Target RejectNegative Joined Var(ix86_abi) Enum(calling_abi) Init(SYSV_ABI) |
| 533 Generate code that conforms to the given ABI. | |
| 534 | |
| 535 Enum | |
| 536 Name(calling_abi) Type(enum calling_abi) | |
| 537 Known ABIs (for use with the -mabi= option): | |
| 538 | |
| 539 EnumValue | |
| 540 Enum(calling_abi) String(sysv) Value(SYSV_ABI) | |
| 541 | |
| 542 EnumValue | |
| 543 Enum(calling_abi) String(ms) Value(MS_ABI) | |
| 544 | |
| 545 mcall-ms2sysv-xlogues | |
| 546 Target Report Mask(CALL_MS2SYSV_XLOGUES) Save | |
| 547 Use libgcc stubs to save and restore registers clobbered by 64-bit Microsoft to System V ABI calls. | |
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548 |
| 0 | 549 mveclibabi= |
| 111 | 550 Target RejectNegative Joined Var(ix86_veclibabi_type) Enum(ix86_veclibabi) Init(ix86_veclibabi_type_none) |
| 551 Vector library ABI to use. | |
| 552 | |
| 553 Enum | |
| 554 Name(ix86_veclibabi) Type(enum ix86_veclibabi) | |
| 555 Known vectorization library ABIs (for use with the -mveclibabi= option): | |
| 556 | |
| 557 EnumValue | |
| 558 Enum(ix86_veclibabi) String(svml) Value(ix86_veclibabi_type_svml) | |
| 559 | |
| 560 EnumValue | |
| 561 Enum(ix86_veclibabi) String(acml) Value(ix86_veclibabi_type_acml) | |
| 0 | 562 |
|
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563 mvect8-ret-in-mem |
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564 Target Report Mask(VECT8_RETURNS) Save |
| 111 | 565 Return 8-byte vectors in memory. |
|
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566 |
| 0 | 567 mrecip |
| 568 Target Report Mask(RECIP) Save | |
| 569 Generate reciprocals instead of divss and sqrtss. | |
| 570 | |
| 111 | 571 mrecip= |
| 572 Target Report RejectNegative Joined Var(ix86_recip_name) | |
| 573 Control generation of reciprocal estimates. | |
| 574 | |
| 0 | 575 mcld |
| 576 Target Report Mask(CLD) Save | |
| 577 Generate cld instruction in the function prologue. | |
| 578 | |
|
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579 mvzeroupper |
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580 Target Report Mask(VZEROUPPER) Save |
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581 Generate vzeroupper instruction before a transfer of control flow out of |
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582 the function. |
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583 |
| 111 | 584 mstv |
| 585 Target Report Mask(STV) Save | |
| 586 Disable Scalar to Vector optimization pass transforming 64-bit integer | |
| 587 computations into a vector ones. | |
| 588 | |
|
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589 mdispatch-scheduler |
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590 Target RejectNegative Var(flag_dispatch_scheduler) |
| 111 | 591 Do dispatch scheduling if processor is bdver1, bdver2, bdver3, bdver4 |
| 592 or znver1 and Haifa scheduling is selected. | |
|
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593 |
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594 mprefer-avx128 |
| 131 | 595 Target Alias(mprefer-vector-width=, 128, 256) |
|
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596 Use 128-bit AVX instructions instead of 256-bit AVX instructions in the auto-vectorizer. |
| 0 | 597 |
| 131 | 598 mprefer-vector-width= |
| 599 Target Report RejectNegative Joined Var(prefer_vector_width_type) Enum(prefer_vector_width) Init(PVW_NONE) | |
| 600 Use given register vector width instructions instead of maximum register width in the auto-vectorizer. | |
| 601 | |
| 602 Enum | |
| 603 Name(prefer_vector_width) Type(enum prefer_vector_width) | |
| 604 Known preferred register vector length (to use with the -mprefer-vector-width= option) | |
| 605 | |
| 606 EnumValue | |
| 607 Enum(prefer_vector_width) String(none) Value(PVW_NONE) | |
| 608 | |
| 609 EnumValue | |
| 610 Enum(prefer_vector_width) String(128) Value(PVW_AVX128) | |
| 611 | |
| 612 EnumValue | |
| 613 Enum(prefer_vector_width) String(256) Value(PVW_AVX256) | |
| 614 | |
| 615 EnumValue | |
| 616 Enum(prefer_vector_width) String(512) Value(PVW_AVX512) | |
| 111 | 617 |
| 0 | 618 ;; ISA support |
| 619 | |
| 620 m32 | |
|
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621 Target RejectNegative Negative(m64) Report InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save |
| 111 | 622 Generate 32bit i386 code. |
| 0 | 623 |
| 624 m64 | |
| 111 | 625 Target RejectNegative Negative(mx32) Report Mask(ABI_64) Var(ix86_isa_flags) Save |
| 626 Generate 64bit x86-64 code. | |
| 627 | |
| 628 mx32 | |
| 629 Target RejectNegative Negative(m16) Report Mask(ABI_X32) Var(ix86_isa_flags) Save | |
| 630 Generate 32bit x86-64 code. | |
| 631 | |
| 632 m16 | |
| 633 Target RejectNegative Negative(m32) Report Mask(CODE16) InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save | |
| 634 Generate 16bit i386 code. | |
| 0 | 635 |
| 636 mmmx | |
|
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637 Target Report Mask(ISA_MMX) Var(ix86_isa_flags) Save |
| 111 | 638 Support MMX built-in functions. |
| 0 | 639 |
| 640 m3dnow | |
|
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641 Target Report Mask(ISA_3DNOW) Var(ix86_isa_flags) Save |
| 111 | 642 Support 3DNow! built-in functions. |
| 0 | 643 |
| 644 m3dnowa | |
| 111 | 645 Target Report Mask(ISA_3DNOW_A) Var(ix86_isa_flags) Save |
| 646 Support Athlon 3Dnow! built-in functions. | |
| 0 | 647 |
| 648 msse | |
|
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649 Target Report Mask(ISA_SSE) Var(ix86_isa_flags) Save |
| 111 | 650 Support MMX and SSE built-in functions and code generation. |
| 0 | 651 |
| 652 msse2 | |
|
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653 Target Report Mask(ISA_SSE2) Var(ix86_isa_flags) Save |
| 111 | 654 Support MMX, SSE and SSE2 built-in functions and code generation. |
| 0 | 655 |
| 656 msse3 | |
|
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657 Target Report Mask(ISA_SSE3) Var(ix86_isa_flags) Save |
| 111 | 658 Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation. |
| 0 | 659 |
| 660 mssse3 | |
|
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661 Target Report Mask(ISA_SSSE3) Var(ix86_isa_flags) Save |
| 111 | 662 Support MMX, SSE, SSE2, SSE3 and SSSE3 built-in functions and code generation. |
| 0 | 663 |
| 664 msse4.1 | |
|
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665 Target Report Mask(ISA_SSE4_1) Var(ix86_isa_flags) Save |
| 111 | 666 Support MMX, SSE, SSE2, SSE3, SSSE3 and SSE4.1 built-in functions and code generation. |
| 0 | 667 |
| 668 msse4.2 | |
|
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669 Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save |
| 111 | 670 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation. |
| 0 | 671 |
| 672 msse4 | |
| 111 | 673 Target RejectNegative Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save |
| 674 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation. | |
| 0 | 675 |
| 676 mno-sse4 | |
| 111 | 677 Target RejectNegative Report InverseMask(ISA_SSE4_1) Var(ix86_isa_flags) Save |
| 678 Do not support SSE4.1 and SSE4.2 built-in functions and code generation. | |
| 0 | 679 |
|
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680 msse5 |
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681 Target Undocumented Alias(mavx) Warn(%<-msse5%> was removed) |
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682 ;; Deprecated |
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683 |
| 0 | 684 mavx |
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685 Target Report Mask(ISA_AVX) Var(ix86_isa_flags) Save |
| 111 | 686 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2 and AVX built-in functions and code generation. |
| 687 | |
| 688 mavx2 | |
| 689 Target Report Mask(ISA_AVX2) Var(ix86_isa_flags) Save | |
| 690 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and AVX2 built-in functions and code generation. | |
| 691 | |
| 692 mavx512f | |
| 693 Target Report Mask(ISA_AVX512F) Var(ix86_isa_flags) Save | |
| 694 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F built-in functions and code generation. | |
| 695 | |
| 696 mavx512pf | |
| 697 Target Report Mask(ISA_AVX512PF) Var(ix86_isa_flags) Save | |
| 698 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512PF built-in functions and code generation. | |
| 699 | |
| 700 mavx512er | |
| 701 Target Report Mask(ISA_AVX512ER) Var(ix86_isa_flags) Save | |
| 702 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512ER built-in functions and code generation. | |
| 703 | |
| 704 mavx512cd | |
| 705 Target Report Mask(ISA_AVX512CD) Var(ix86_isa_flags) Save | |
| 706 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512CD built-in functions and code generation. | |
| 707 | |
| 708 mavx512dq | |
| 709 Target Report Mask(ISA_AVX512DQ) Var(ix86_isa_flags) Save | |
| 710 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512DQ built-in functions and code generation. | |
| 711 | |
| 712 mavx512bw | |
| 713 Target Report Mask(ISA_AVX512BW) Var(ix86_isa_flags) Save | |
| 714 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512BW built-in functions and code generation. | |
| 715 | |
| 716 mavx512vl | |
| 717 Target Report Mask(ISA_AVX512VL) Var(ix86_isa_flags) Save | |
| 718 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512VL built-in functions and code generation. | |
| 719 | |
| 720 mavx512ifma | |
| 721 Target Report Mask(ISA_AVX512IFMA) Var(ix86_isa_flags) Save | |
| 722 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512IFMA built-in functions and code generation. | |
| 723 | |
| 724 mavx512vbmi | |
| 725 Target Report Mask(ISA_AVX512VBMI) Var(ix86_isa_flags) Save | |
| 726 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512VBMI built-in functions and code generation. | |
| 727 | |
| 728 mavx5124fmaps | |
| 729 Target Report Mask(ISA_AVX5124FMAPS) Var(ix86_isa_flags2) Save | |
| 730 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX5124FMAPS built-in functions and code generation. | |
| 731 | |
| 732 mavx5124vnniw | |
| 733 Target Report Mask(ISA_AVX5124VNNIW) Var(ix86_isa_flags2) Save | |
| 734 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX5124VNNIW built-in functions and code generation. | |
| 735 | |
| 736 mavx512vpopcntdq | |
| 131 | 737 Target Report Mask(ISA_AVX512VPOPCNTDQ) Var(ix86_isa_flags) Save |
| 111 | 738 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512VPOPCNTDQ built-in functions and code generation. |
| 0 | 739 |
| 131 | 740 mavx512vbmi2 |
| 741 Target Report Mask(ISA_AVX512VBMI2) Var(ix86_isa_flags) Save | |
| 742 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512VBMI2 built-in functions and code generation. | |
| 743 | |
| 744 mavx512vnni | |
| 745 Target Report Mask(ISA_AVX512VNNI) Var(ix86_isa_flags) Save | |
| 746 Support AVX512VNNI built-in functions and code generation. | |
| 747 | |
| 748 mavx512bitalg | |
| 749 Target Report Mask(ISA_AVX512BITALG) Var(ix86_isa_flags) Save | |
| 750 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512BITALG built-in functions and code generation. | |
| 751 | |
| 0 | 752 mfma |
|
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753 Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Save |
| 111 | 754 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation. |
| 0 | 755 |
| 756 msse4a | |
|
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757 Target Report Mask(ISA_SSE4A) Var(ix86_isa_flags) Save |
| 111 | 758 Support MMX, SSE, SSE2, SSE3 and SSE4A built-in functions and code generation. |
| 0 | 759 |
|
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760 mfma4 |
|
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761 Target Report Mask(ISA_FMA4) Var(ix86_isa_flags) Save |
| 111 | 762 Support FMA4 built-in functions and code generation. |
|
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763 |
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764 mxop |
|
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765 Target Report Mask(ISA_XOP) Var(ix86_isa_flags) Save |
| 111 | 766 Support XOP built-in functions and code generation. |
|
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767 |
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768 mlwp |
|
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769 Target Report Mask(ISA_LWP) Var(ix86_isa_flags) Save |
| 111 | 770 Support LWP built-in functions and code generation. |
| 0 | 771 |
| 772 mabm | |
|
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773 Target Report Mask(ISA_ABM) Var(ix86_isa_flags) Save |
| 0 | 774 Support code generation of Advanced Bit Manipulation (ABM) instructions. |
| 775 | |
| 776 mpopcnt | |
|
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777 Target Report Mask(ISA_POPCNT) Var(ix86_isa_flags) Save |
| 0 | 778 Support code generation of popcnt instruction. |
| 779 | |
| 131 | 780 mpconfig |
| 781 Target Report Mask(ISA_PCONFIG) Var(ix86_isa_flags2) Save | |
| 782 Support PCONFIG built-in functions and code generation. | |
| 783 | |
| 784 mwbnoinvd | |
| 785 Target Report Mask(ISA_WBNOINVD) Var(ix86_isa_flags2) Save | |
| 786 Support WBNOINVD built-in functions and code generation. | |
| 787 | |
| 111 | 788 msgx |
| 789 Target Report Mask(ISA_SGX) Var(ix86_isa_flags2) Save | |
| 790 Support SGX built-in functions and code generation. | |
| 791 | |
| 792 mrdpid | |
| 793 Target Report Mask(ISA_RDPID) Var(ix86_isa_flags2) Save | |
| 794 Support RDPID built-in functions and code generation. | |
| 795 | |
| 796 mgfni | |
| 131 | 797 Target Report Mask(ISA_GFNI) Var(ix86_isa_flags) Save |
| 111 | 798 Support GFNI built-in functions and code generation. |
| 799 | |
| 131 | 800 mvaes |
| 801 Target Report Mask(ISA_VAES) Var(ix86_isa_flags2) Save | |
| 802 Support VAES built-in functions and code generation. | |
| 803 | |
| 804 mvpclmulqdq | |
| 805 Target Report Mask(ISA_VPCLMULQDQ) Var(ix86_isa_flags) Save | |
| 806 Support VPCLMULQDQ built-in functions and code generation. | |
| 807 | |
|
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808 mbmi |
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|
809 Target Report Mask(ISA_BMI) Var(ix86_isa_flags) Save |
| 111 | 810 Support BMI built-in functions and code generation. |
| 811 | |
| 812 mbmi2 | |
| 813 Target Report Mask(ISA_BMI2) Var(ix86_isa_flags) Save | |
| 814 Support BMI2 built-in functions and code generation. | |
| 815 | |
| 816 mlzcnt | |
| 817 Target Report Mask(ISA_LZCNT) Var(ix86_isa_flags) Save | |
| 818 Support LZCNT built-in function and code generation. | |
| 819 | |
| 820 mhle | |
| 131 | 821 Target Report Mask(ISA_HLE) Var(ix86_isa_flags2) Save |
| 111 | 822 Support Hardware Lock Elision prefixes. |
| 823 | |
| 824 mrdseed | |
| 825 Target Report Mask(ISA_RDSEED) Var(ix86_isa_flags) Save | |
| 826 Support RDSEED instruction. | |
| 827 | |
| 828 mprfchw | |
| 829 Target Report Mask(ISA_PRFCHW) Var(ix86_isa_flags) Save | |
| 830 Support PREFETCHW instruction. | |
| 831 | |
| 832 madx | |
| 833 Target Report Mask(ISA_ADX) Var(ix86_isa_flags) Save | |
| 834 Support flag-preserving add-carry instructions. | |
| 835 | |
| 836 mclflushopt | |
| 837 Target Report Mask(ISA_CLFLUSHOPT) Var(ix86_isa_flags) Save | |
| 838 Support CLFLUSHOPT instructions. | |
| 839 | |
| 840 mclwb | |
| 841 Target Report Mask(ISA_CLWB) Var(ix86_isa_flags) Save | |
| 842 Support CLWB instruction. | |
| 843 | |
| 844 mpcommit | |
| 131 | 845 Target Deprecated |
| 111 | 846 ;; Deprecated |
| 847 | |
| 848 mfxsr | |
| 849 Target Report Mask(ISA_FXSR) Var(ix86_isa_flags) Save | |
| 850 Support FXSAVE and FXRSTOR instructions. | |
| 851 | |
| 852 mxsave | |
| 853 Target Report Mask(ISA_XSAVE) Var(ix86_isa_flags) Save | |
| 854 Support XSAVE and XRSTOR instructions. | |
| 855 | |
| 856 mxsaveopt | |
| 857 Target Report Mask(ISA_XSAVEOPT) Var(ix86_isa_flags) Save | |
| 858 Support XSAVEOPT instruction. | |
| 859 | |
| 860 mxsavec | |
| 861 Target Report Mask(ISA_XSAVEC) Var(ix86_isa_flags) Save | |
| 862 Support XSAVEC instructions. | |
| 863 | |
| 864 mxsaves | |
| 865 Target Report Mask(ISA_XSAVES) Var(ix86_isa_flags) Save | |
| 866 Support XSAVES and XRSTORS instructions. | |
|
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867 |
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868 mtbm |
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869 Target Report Mask(ISA_TBM) Var(ix86_isa_flags) Save |
| 111 | 870 Support TBM built-in functions and code generation. |
|
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871 |
| 0 | 872 mcx16 |
| 131 | 873 Target Report Mask(ISA_CX16) Var(ix86_isa_flags2) Save |
| 0 | 874 Support code generation of cmpxchg16b instruction. |
| 875 | |
| 876 msahf | |
|
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877 Target Report Mask(ISA_SAHF) Var(ix86_isa_flags) Save |
| 0 | 878 Support code generation of sahf instruction in 64bit x86-64 code. |
| 879 | |
|
55
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880 mmovbe |
| 131 | 881 Target Report Mask(ISA_MOVBE) Var(ix86_isa_flags2) Save |
|
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882 Support code generation of movbe instruction. |
|
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883 |
|
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884 mcrc32 |
|
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885 Target Report Mask(ISA_CRC32) Var(ix86_isa_flags) Save |
|
55
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886 Support code generation of crc32 instruction. |
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887 |
| 0 | 888 maes |
|
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889 Target Report Mask(ISA_AES) Var(ix86_isa_flags) Save |
| 111 | 890 Support AES built-in functions and code generation. |
| 891 | |
| 892 msha | |
| 893 Target Report Mask(ISA_SHA) Var(ix86_isa_flags) Save | |
| 894 Support SHA1 and SHA256 built-in functions and code generation. | |
| 0 | 895 |
| 896 mpclmul | |
|
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897 Target Report Mask(ISA_PCLMUL) Var(ix86_isa_flags) Save |
| 111 | 898 Support PCLMUL built-in functions and code generation. |
| 0 | 899 |
| 900 msse2avx | |
| 901 Target Report Var(ix86_sse2avx) | |
| 111 | 902 Encode SSE instructions with VEX prefix. |
|
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903 |
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904 mfsgsbase |
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905 Target Report Mask(ISA_FSGSBASE) Var(ix86_isa_flags) Save |
| 111 | 906 Support FSGSBASE built-in functions and code generation. |
|
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907 |
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908 mrdrnd |
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909 Target Report Mask(ISA_RDRND) Var(ix86_isa_flags) Save |
| 111 | 910 Support RDRND built-in functions and code generation. |
|
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911 |
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912 mf16c |
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|
913 Target Report Mask(ISA_F16C) Var(ix86_isa_flags) Save |
| 111 | 914 Support F16C built-in functions and code generation. |
| 915 | |
| 916 mprefetchwt1 | |
| 917 Target Report Mask(ISA_PREFETCHWT1) Var(ix86_isa_flags) Save | |
| 918 Support PREFETCHWT1 built-in functions and code generation. | |
|
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919 |
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920 mfentry |
| 111 | 921 Target Report Var(flag_fentry) |
|
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922 Emit profiling counter call at function entry before prologue. |
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923 |
| 111 | 924 mrecord-mcount |
| 925 Target Report Var(flag_record_mcount) | |
| 926 Generate __mcount_loc section with all mcount or __fentry__ calls. | |
| 927 | |
| 928 mnop-mcount | |
| 929 Target Report Var(flag_nop_mcount) | |
| 930 Generate mcount/__fentry__ calls as nops. To activate they need to be | |
| 931 patched in. | |
| 932 | |
| 933 mskip-rax-setup | |
| 934 Target Report Var(flag_skip_rax_setup) | |
| 935 Skip setting up RAX register when passing variable arguments. | |
| 936 | |
|
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937 m8bit-idiv |
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938 Target Report Mask(USE_8BIT_IDIV) Save |
| 111 | 939 Expand 32bit/64bit integer divide into 8bit unsigned integer divide with run-time check. |
| 940 | |
| 941 mavx256-split-unaligned-load | |
| 942 Target Report Mask(AVX256_SPLIT_UNALIGNED_LOAD) Save | |
| 943 Split 32-byte AVX unaligned load. | |
| 944 | |
| 945 mavx256-split-unaligned-store | |
| 946 Target Report Mask(AVX256_SPLIT_UNALIGNED_STORE) Save | |
| 947 Split 32-byte AVX unaligned store. | |
| 948 | |
| 949 mrtm | |
| 950 Target Report Mask(ISA_RTM) Var(ix86_isa_flags) Save | |
| 951 Support RTM built-in functions and code generation. | |
| 952 | |
| 953 mmpx | |
| 131 | 954 Target Deprecated |
| 955 Deprecated in GCC 9. This switch has no effect. | |
| 111 | 956 |
| 957 mmwaitx | |
| 131 | 958 Target Report Mask(ISA_MWAITX) Var(ix86_isa_flags2) Save |
| 111 | 959 Support MWAITX and MONITORX built-in functions and code generation. |
| 960 | |
| 961 mclzero | |
| 131 | 962 Target Report Mask(ISA_CLZERO) Var(ix86_isa_flags2) Save |
| 111 | 963 Support CLZERO built-in functions and code generation. |
| 964 | |
| 965 mpku | |
| 966 Target Report Mask(ISA_PKU) Var(ix86_isa_flags) Save | |
| 967 Support PKU built-in functions and code generation. | |
| 968 | |
| 969 mstack-protector-guard= | |
| 970 Target RejectNegative Joined Enum(stack_protector_guard) Var(ix86_stack_protector_guard) Init(SSP_TLS) | |
| 971 Use given stack-protector guard. | |
| 972 | |
| 973 Enum | |
| 974 Name(stack_protector_guard) Type(enum stack_protector_guard) | |
| 975 Known stack protector guard (for use with the -mstack-protector-guard= option): | |
| 976 | |
| 977 EnumValue | |
| 978 Enum(stack_protector_guard) String(tls) Value(SSP_TLS) | |
| 979 | |
| 980 EnumValue | |
| 981 Enum(stack_protector_guard) String(global) Value(SSP_GLOBAL) | |
| 982 | |
| 983 mstack-protector-guard-reg= | |
| 984 Target RejectNegative Joined Var(ix86_stack_protector_guard_reg_str) | |
| 985 Use the given base register for addressing the stack-protector guard. | |
| 986 | |
| 987 TargetVariable | |
| 988 addr_space_t ix86_stack_protector_guard_reg = ADDR_SPACE_GENERIC | |
| 989 | |
| 990 mstack-protector-guard-offset= | |
| 991 Target RejectNegative Joined Integer Var(ix86_stack_protector_guard_offset_str) | |
| 992 Use the given offset for addressing the stack-protector guard. | |
| 993 | |
| 994 TargetVariable | |
| 995 HOST_WIDE_INT ix86_stack_protector_guard_offset = 0 | |
| 996 | |
| 997 mstack-protector-guard-symbol= | |
| 998 Target RejectNegative Joined Integer Var(ix86_stack_protector_guard_symbol_str) | |
| 999 Use the given symbol for addressing the stack-protector guard. | |
| 1000 | |
| 1001 mmitigate-rop | |
| 131 | 1002 Target Deprecated |
| 1003 ;; Deprecated | |
| 111 | 1004 |
| 1005 mgeneral-regs-only | |
| 1006 Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Var(ix86_target_flags) Save | |
| 1007 Generate code which uses only the general registers. | |
| 1008 | |
| 1009 mshstk | |
| 131 | 1010 Target Report Mask(ISA_SHSTK) Var(ix86_isa_flags) Save |
| 1011 Enable shadow stack built-in functions from Control-flow Enforcement | |
| 1012 Technology (CET). | |
| 111 | 1013 |
| 1014 mcet-switch | |
| 1015 Target Report Undocumented Var(flag_cet_switch) Init(0) | |
| 131 | 1016 Turn on CET instrumentation for switch statements that use a jump table and |
| 1017 an indirect jump. | |
| 1018 | |
| 1019 mforce-indirect-call | |
| 1020 Target Report Var(flag_force_indirect_call) Init(0) | |
| 1021 Make all function calls indirect. | |
| 1022 | |
| 1023 mindirect-branch= | |
| 1024 Target Report RejectNegative Joined Enum(indirect_branch) Var(ix86_indirect_branch) Init(indirect_branch_keep) | |
| 1025 Convert indirect call and jump to call and return thunks. | |
| 1026 | |
| 1027 mfunction-return= | |
| 1028 Target Report RejectNegative Joined Enum(indirect_branch) Var(ix86_function_return) Init(indirect_branch_keep) | |
| 1029 Convert function return to call and return thunk. | |
| 1030 | |
| 1031 Enum | |
| 1032 Name(indirect_branch) Type(enum indirect_branch) | |
| 1033 Known indirect branch choices (for use with the -mindirect-branch=/-mfunction-return= options): | |
| 1034 | |
| 1035 EnumValue | |
| 1036 Enum(indirect_branch) String(keep) Value(indirect_branch_keep) | |
| 1037 | |
| 1038 EnumValue | |
| 1039 Enum(indirect_branch) String(thunk) Value(indirect_branch_thunk) | |
| 1040 | |
| 1041 EnumValue | |
| 1042 Enum(indirect_branch) String(thunk-inline) Value(indirect_branch_thunk_inline) | |
| 1043 | |
| 1044 EnumValue | |
| 1045 Enum(indirect_branch) String(thunk-extern) Value(indirect_branch_thunk_extern) | |
| 1046 | |
| 1047 mindirect-branch-register | |
| 1048 Target Report Var(ix86_indirect_branch_register) Init(0) | |
| 1049 Force indirect call and jump via register. | |
| 1050 | |
| 1051 mmovdiri | |
| 1052 Target Report Mask(ISA_MOVDIRI) Var(ix86_isa_flags) Save | |
| 1053 Support MOVDIRI built-in functions and code generation. | |
| 1054 | |
| 1055 mmovdir64b | |
| 1056 Target Report Mask(ISA_MOVDIR64B) Var(ix86_isa_flags2) Save | |
| 1057 Support MOVDIR64B built-in functions and code generation. | |
| 1058 | |
| 1059 mwaitpkg | |
| 1060 Target Report Mask(ISA_WAITPKG) Var(ix86_isa_flags2) Save | |
| 1061 Support WAITPKG built-in functions and code generation. | |
| 1062 | |
| 1063 mcldemote | |
| 1064 Target Report Mask(ISA_CLDEMOTE) Var(ix86_isa_flags2) Save | |
| 1065 Support CLDEMOTE built-in functions and code generation. |