|
0
|
1 /* Definitions of target machine for GNU compiler, for the HP Spectrum.
|
|
|
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
|
|
|
3 2002, 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
|
|
|
4 Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support
|
|
|
5 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
|
|
|
6 Software Science at the University of Utah.
|
|
|
7
|
|
|
8 This file is part of GCC.
|
|
|
9
|
|
|
10 GCC is free software; you can redistribute it and/or modify
|
|
|
11 it under the terms of the GNU General Public License as published by
|
|
|
12 the Free Software Foundation; either version 3, or (at your option)
|
|
|
13 any later version.
|
|
|
14
|
|
|
15 GCC is distributed in the hope that it will be useful,
|
|
|
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
|
18 GNU General Public License for more details.
|
|
|
19
|
|
|
20 You should have received a copy of the GNU General Public License
|
|
|
21 along with GCC; see the file COPYING3. If not see
|
|
|
22 <http://www.gnu.org/licenses/>. */
|
|
|
23
|
|
|
24 enum cmp_type /* comparison type */
|
|
|
25 {
|
|
|
26 CMP_SI, /* compare integers */
|
|
|
27 CMP_SF, /* compare single precision floats */
|
|
|
28 CMP_DF, /* compare double precision floats */
|
|
|
29 CMP_MAX /* max comparison type */
|
|
|
30 };
|
|
|
31
|
|
|
32 /* For long call handling. */
|
|
|
33 extern unsigned long total_code_bytes;
|
|
|
34
|
|
|
35 /* Which processor to schedule for. */
|
|
|
36
|
|
|
37 enum processor_type
|
|
|
38 {
|
|
|
39 PROCESSOR_700,
|
|
|
40 PROCESSOR_7100,
|
|
|
41 PROCESSOR_7100LC,
|
|
|
42 PROCESSOR_7200,
|
|
|
43 PROCESSOR_7300,
|
|
|
44 PROCESSOR_8000
|
|
|
45 };
|
|
|
46
|
|
|
47 /* For -mschedule= option. */
|
|
|
48 extern enum processor_type pa_cpu;
|
|
|
49
|
|
|
50 /* For -munix= option. */
|
|
|
51 extern int flag_pa_unix;
|
|
|
52
|
|
|
53 #define pa_cpu_attr ((enum attr_cpu)pa_cpu)
|
|
|
54
|
|
|
55 /* Print subsidiary information on the compiler version in use. */
|
|
|
56
|
|
|
57 #define TARGET_VERSION fputs (" (hppa)", stderr);
|
|
|
58
|
|
|
59 #define TARGET_PA_10 (!TARGET_PA_11 && !TARGET_PA_20)
|
|
|
60
|
|
|
61 /* Generate code for the HPPA 2.0 architecture in 64bit mode. */
|
|
|
62 #ifndef TARGET_64BIT
|
|
|
63 #define TARGET_64BIT 0
|
|
|
64 #endif
|
|
|
65
|
|
|
66 /* Generate code for ELF32 ABI. */
|
|
|
67 #ifndef TARGET_ELF32
|
|
|
68 #define TARGET_ELF32 0
|
|
|
69 #endif
|
|
|
70
|
|
|
71 /* Generate code for SOM 32bit ABI. */
|
|
|
72 #ifndef TARGET_SOM
|
|
|
73 #define TARGET_SOM 0
|
|
|
74 #endif
|
|
|
75
|
|
|
76 /* HP-UX UNIX features. */
|
|
|
77 #ifndef TARGET_HPUX
|
|
|
78 #define TARGET_HPUX 0
|
|
|
79 #endif
|
|
|
80
|
|
|
81 /* HP-UX 10.10 UNIX 95 features. */
|
|
|
82 #ifndef TARGET_HPUX_10_10
|
|
|
83 #define TARGET_HPUX_10_10 0
|
|
|
84 #endif
|
|
|
85
|
|
|
86 /* HP-UX 11.* features (11.00, 11.11, 11.23, etc.) */
|
|
|
87 #ifndef TARGET_HPUX_11
|
|
|
88 #define TARGET_HPUX_11 0
|
|
|
89 #endif
|
|
|
90
|
|
|
91 /* HP-UX 11i multibyte and UNIX 98 extensions. */
|
|
|
92 #ifndef TARGET_HPUX_11_11
|
|
|
93 #define TARGET_HPUX_11_11 0
|
|
|
94 #endif
|
|
|
95
|
|
|
96 /* The following three defines are potential target switches. The current
|
|
|
97 defines are optimal given the current capabilities of GAS and GNU ld. */
|
|
|
98
|
|
|
99 /* Define to a C expression evaluating to true to use long absolute calls.
|
|
|
100 Currently, only the HP assembler and SOM linker support long absolute
|
|
|
101 calls. They are used only in non-pic code. */
|
|
|
102 #define TARGET_LONG_ABS_CALL (TARGET_SOM && !TARGET_GAS)
|
|
|
103
|
|
|
104 /* Define to a C expression evaluating to true to use long PIC symbol
|
|
|
105 difference calls. Long PIC symbol difference calls are only used with
|
|
|
106 the HP assembler and linker. The HP assembler detects this instruction
|
|
|
107 sequence and treats it as long pc-relative call. Currently, GAS only
|
|
|
108 allows a difference of two symbols in the same subspace, and it doesn't
|
|
|
109 detect the sequence as a pc-relative call. */
|
|
|
110 #define TARGET_LONG_PIC_SDIFF_CALL (!TARGET_GAS && TARGET_HPUX)
|
|
|
111
|
|
|
112 /* Define to a C expression evaluating to true to use long PIC
|
|
|
113 pc-relative calls. Long PIC pc-relative calls are only used with
|
|
|
114 GAS. Currently, they are usable for calls which bind local to a
|
|
|
115 module but not for external calls. */
|
|
|
116 #define TARGET_LONG_PIC_PCREL_CALL 0
|
|
|
117
|
|
|
118 /* Define to a C expression evaluating to true to use SOM secondary
|
|
|
119 definition symbols for weak support. Linker support for secondary
|
|
|
120 definition symbols is buggy prior to HP-UX 11.X. */
|
|
|
121 #define TARGET_SOM_SDEF 0
|
|
|
122
|
|
|
123 /* Define to a C expression evaluating to true to save the entry value
|
|
|
124 of SP in the current frame marker. This is normally unnecessary.
|
|
|
125 However, the HP-UX unwind library looks at the SAVE_SP callinfo flag.
|
|
|
126 HP compilers don't use this flag but it is supported by the assembler.
|
|
|
127 We set this flag to indicate that register %r3 has been saved at the
|
|
|
128 start of the frame. Thus, when the HP unwind library is used, we
|
|
|
129 need to generate additional code to save SP into the frame marker. */
|
|
|
130 #define TARGET_HPUX_UNWIND_LIBRARY 0
|
|
|
131
|
|
|
132 #ifndef TARGET_DEFAULT
|
|
|
133 #define TARGET_DEFAULT (MASK_GAS | MASK_JUMP_IN_DELAY | MASK_BIG_SWITCH)
|
|
|
134 #endif
|
|
|
135
|
|
|
136 #ifndef TARGET_CPU_DEFAULT
|
|
|
137 #define TARGET_CPU_DEFAULT 0
|
|
|
138 #endif
|
|
|
139
|
|
|
140 #ifndef TARGET_SCHED_DEFAULT
|
|
|
141 #define TARGET_SCHED_DEFAULT PROCESSOR_8000
|
|
|
142 #endif
|
|
|
143
|
|
|
144 /* Support for a compile-time default CPU, et cetera. The rules are:
|
|
|
145 --with-schedule is ignored if -mschedule is specified.
|
|
|
146 --with-arch is ignored if -march is specified. */
|
|
|
147 #define OPTION_DEFAULT_SPECS \
|
|
|
148 {"arch", "%{!march=*:-march=%(VALUE)}" }, \
|
|
|
149 {"schedule", "%{!mschedule=*:-mschedule=%(VALUE)}" }
|
|
|
150
|
|
|
151 /* Specify the dialect of assembler to use. New mnemonics is dialect one
|
|
|
152 and the old mnemonics are dialect zero. */
|
|
|
153 #define ASSEMBLER_DIALECT (TARGET_PA_20 ? 1 : 0)
|
|
|
154
|
|
|
155 #define OVERRIDE_OPTIONS override_options ()
|
|
|
156
|
|
|
157 /* Override some settings from dbxelf.h. */
|
|
|
158
|
|
|
159 /* We do not have to be compatible with dbx, so we enable gdb extensions
|
|
|
160 by default. */
|
|
|
161 #define DEFAULT_GDB_EXTENSIONS 1
|
|
|
162
|
|
|
163 /* This used to be zero (no max length), but big enums and such can
|
|
|
164 cause huge strings which killed gas.
|
|
|
165
|
|
|
166 We also have to avoid lossage in dbxout.c -- it does not compute the
|
|
|
167 string size accurately, so we are real conservative here. */
|
|
|
168 #undef DBX_CONTIN_LENGTH
|
|
|
169 #define DBX_CONTIN_LENGTH 3000
|
|
|
170
|
|
|
171 /* GDB always assumes the current function's frame begins at the value
|
|
|
172 of the stack pointer upon entry to the current function. Accessing
|
|
|
173 local variables and parameters passed on the stack is done using the
|
|
|
174 base of the frame + an offset provided by GCC.
|
|
|
175
|
|
|
176 For functions which have frame pointers this method works fine;
|
|
|
177 the (frame pointer) == (stack pointer at function entry) and GCC provides
|
|
|
178 an offset relative to the frame pointer.
|
|
|
179
|
|
|
180 This loses for functions without a frame pointer; GCC provides an offset
|
|
|
181 which is relative to the stack pointer after adjusting for the function's
|
|
|
182 frame size. GDB would prefer the offset to be relative to the value of
|
|
|
183 the stack pointer at the function's entry. Yuk! */
|
|
|
184 #define DEBUGGER_AUTO_OFFSET(X) \
|
|
|
185 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
|
|
|
186 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
|
|
|
187
|
|
|
188 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
|
|
|
189 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
|
|
|
190 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
|
|
|
191
|
|
|
192 #define TARGET_CPU_CPP_BUILTINS() \
|
|
|
193 do { \
|
|
|
194 builtin_assert("cpu=hppa"); \
|
|
|
195 builtin_assert("machine=hppa"); \
|
|
|
196 builtin_define("__hppa"); \
|
|
|
197 builtin_define("__hppa__"); \
|
|
|
198 if (TARGET_PA_20) \
|
|
|
199 builtin_define("_PA_RISC2_0"); \
|
|
|
200 else if (TARGET_PA_11) \
|
|
|
201 builtin_define("_PA_RISC1_1"); \
|
|
|
202 else \
|
|
|
203 builtin_define("_PA_RISC1_0"); \
|
|
|
204 } while (0)
|
|
|
205
|
|
|
206 /* An old set of OS defines for various BSD-like systems. */
|
|
|
207 #define TARGET_OS_CPP_BUILTINS() \
|
|
|
208 do \
|
|
|
209 { \
|
|
|
210 builtin_define_std ("REVARGV"); \
|
|
|
211 builtin_define_std ("hp800"); \
|
|
|
212 builtin_define_std ("hp9000"); \
|
|
|
213 builtin_define_std ("hp9k8"); \
|
|
|
214 if (!c_dialect_cxx () && !flag_iso) \
|
|
|
215 builtin_define ("hppa"); \
|
|
|
216 builtin_define_std ("spectrum"); \
|
|
|
217 builtin_define_std ("unix"); \
|
|
|
218 builtin_assert ("system=bsd"); \
|
|
|
219 builtin_assert ("system=unix"); \
|
|
|
220 } \
|
|
|
221 while (0)
|
|
|
222
|
|
|
223 #define CC1_SPEC "%{pg:} %{p:}"
|
|
|
224
|
|
|
225 #define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}"
|
|
|
226
|
|
|
227 /* We don't want -lg. */
|
|
|
228 #ifndef LIB_SPEC
|
|
|
229 #define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
|
|
|
230 #endif
|
|
|
231
|
|
|
232 /* This macro defines command-line switches that modify the default
|
|
|
233 target name.
|
|
|
234
|
|
|
235 The definition is be an initializer for an array of structures. Each
|
|
|
236 array element has have three elements: the switch name, one of the
|
|
|
237 enumeration codes ADD or DELETE to indicate whether the string should be
|
|
|
238 inserted or deleted, and the string to be inserted or deleted. */
|
|
|
239 #define MODIFY_TARGET_NAME {{"-32", DELETE, "64"}, {"-64", ADD, "64"}}
|
|
|
240
|
|
|
241 /* Make gcc agree with <machine/ansi.h> */
|
|
|
242
|
|
|
243 #define SIZE_TYPE "unsigned int"
|
|
|
244 #define PTRDIFF_TYPE "int"
|
|
|
245 #define WCHAR_TYPE "unsigned int"
|
|
|
246 #define WCHAR_TYPE_SIZE 32
|
|
|
247
|
|
|
248 /* Show we can debug even without a frame pointer. */
|
|
|
249 #define CAN_DEBUG_WITHOUT_FP
|
|
|
250
|
|
|
251 /* target machine storage layout */
|
|
|
252 typedef struct machine_function GTY(())
|
|
|
253 {
|
|
|
254 /* Flag indicating that a .NSUBSPA directive has been output for
|
|
|
255 this function. */
|
|
|
256 int in_nsubspa;
|
|
|
257 } machine_function;
|
|
|
258
|
|
|
259 /* Define this macro if it is advisable to hold scalars in registers
|
|
|
260 in a wider mode than that declared by the program. In such cases,
|
|
|
261 the value is constrained to be within the bounds of the declared
|
|
|
262 type, but kept valid in the wider mode. The signedness of the
|
|
|
263 extension may differ from that of the type. */
|
|
|
264
|
|
|
265 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
|
|
|
266 if (GET_MODE_CLASS (MODE) == MODE_INT \
|
|
|
267 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
|
|
|
268 (MODE) = word_mode;
|
|
|
269
|
|
|
270 /* Define this if most significant bit is lowest numbered
|
|
|
271 in instructions that operate on numbered bit-fields. */
|
|
|
272 #define BITS_BIG_ENDIAN 1
|
|
|
273
|
|
|
274 /* Define this if most significant byte of a word is the lowest numbered. */
|
|
|
275 /* That is true on the HP-PA. */
|
|
|
276 #define BYTES_BIG_ENDIAN 1
|
|
|
277
|
|
|
278 /* Define this if most significant word of a multiword number is lowest
|
|
|
279 numbered. */
|
|
|
280 #define WORDS_BIG_ENDIAN 1
|
|
|
281
|
|
|
282 #define MAX_BITS_PER_WORD 64
|
|
|
283
|
|
|
284 /* Width of a word, in units (bytes). */
|
|
|
285 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
|
|
|
286
|
|
|
287 /* Minimum number of units in a word. If this is undefined, the default
|
|
|
288 is UNITS_PER_WORD. Otherwise, it is the constant value that is the
|
|
|
289 smallest value that UNITS_PER_WORD can have at run-time.
|
|
|
290
|
|
|
291 FIXME: This needs to be 4 when TARGET_64BIT is true to suppress the
|
|
|
292 building of various TImode routines in libgcc. The HP runtime
|
|
|
293 specification doesn't provide the alignment requirements and calling
|
|
|
294 conventions for TImode variables. */
|
|
|
295 #define MIN_UNITS_PER_WORD 4
|
|
|
296
|
|
|
297 /* The widest floating point format supported by the hardware. Note that
|
|
|
298 setting this influences some Ada floating point type sizes, currently
|
|
|
299 required for GNAT to operate properly. */
|
|
|
300 #define WIDEST_HARDWARE_FP_SIZE 64
|
|
|
301
|
|
|
302 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
|
|
|
303 #define PARM_BOUNDARY BITS_PER_WORD
|
|
|
304
|
|
|
305 /* Largest alignment required for any stack parameter, in bits.
|
|
|
306 Don't define this if it is equal to PARM_BOUNDARY */
|
|
|
307 #define MAX_PARM_BOUNDARY BIGGEST_ALIGNMENT
|
|
|
308
|
|
|
309 /* Boundary (in *bits*) on which stack pointer is always aligned;
|
|
|
310 certain optimizations in combine depend on this.
|
|
|
311
|
|
|
312 The HP-UX runtime documents mandate 64-byte and 16-byte alignment for
|
|
|
313 the stack on the 32 and 64-bit ports, respectively. However, we
|
|
|
314 are only guaranteed that the stack is aligned to BIGGEST_ALIGNMENT
|
|
|
315 in main. Thus, we treat the former as the preferred alignment. */
|
|
|
316 #define STACK_BOUNDARY BIGGEST_ALIGNMENT
|
|
|
317 #define PREFERRED_STACK_BOUNDARY (TARGET_64BIT ? 128 : 512)
|
|
|
318
|
|
|
319 /* Allocation boundary (in *bits*) for the code of a function. */
|
|
|
320 #define FUNCTION_BOUNDARY BITS_PER_WORD
|
|
|
321
|
|
|
322 /* Alignment of field after `int : 0' in a structure. */
|
|
|
323 #define EMPTY_FIELD_BOUNDARY 32
|
|
|
324
|
|
|
325 /* Every structure's size must be a multiple of this. */
|
|
|
326 #define STRUCTURE_SIZE_BOUNDARY 8
|
|
|
327
|
|
|
328 /* A bit-field declared as `int' forces `int' alignment for the struct. */
|
|
|
329 #define PCC_BITFIELD_TYPE_MATTERS 1
|
|
|
330
|
|
|
331 /* No data type wants to be aligned rounder than this. */
|
|
|
332 #define BIGGEST_ALIGNMENT (2 * BITS_PER_WORD)
|
|
|
333
|
|
|
334 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
|
|
|
335 #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
|
|
|
336 ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
|
|
|
337
|
|
|
338 /* Make arrays of chars word-aligned for the same reasons. */
|
|
|
339 #define DATA_ALIGNMENT(TYPE, ALIGN) \
|
|
|
340 (TREE_CODE (TYPE) == ARRAY_TYPE \
|
|
|
341 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
|
|
|
342 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
|
|
|
343
|
|
|
344 /* Set this nonzero if move instructions will actually fail to work
|
|
|
345 when given unaligned data. */
|
|
|
346 #define STRICT_ALIGNMENT 1
|
|
|
347
|
|
|
348 /* Value is 1 if it is a good idea to tie two pseudo registers
|
|
|
349 when one has mode MODE1 and one has mode MODE2.
|
|
|
350 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
|
|
|
351 for any hard reg, then this must be 0 for correct output. */
|
|
|
352 #define MODES_TIEABLE_P(MODE1, MODE2) \
|
|
|
353 pa_modes_tieable_p (MODE1, MODE2)
|
|
|
354
|
|
|
355 /* Specify the registers used for certain standard purposes.
|
|
|
356 The values of these macros are register numbers. */
|
|
|
357
|
|
|
358 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
|
|
|
359 /* #define PC_REGNUM */
|
|
|
360
|
|
|
361 /* Register to use for pushing function arguments. */
|
|
|
362 #define STACK_POINTER_REGNUM 30
|
|
|
363
|
|
|
364 /* Base register for access to local variables of the function. */
|
|
|
365 #define FRAME_POINTER_REGNUM 3
|
|
|
366
|
|
|
367 /* Value should be nonzero if functions must have frame pointers. */
|
|
|
368 #define FRAME_POINTER_REQUIRED \
|
|
|
369 (cfun->calls_alloca)
|
|
|
370
|
|
|
371 /* Don't allow hard registers to be renamed into r2 unless r2
|
|
|
372 is already live or already being saved (due to eh). */
|
|
|
373
|
|
|
374 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
|
|
|
375 ((NEW_REG) != 2 || df_regs_ever_live_p (2) || crtl->calls_eh_return)
|
|
|
376
|
|
|
377 /* C statement to store the difference between the frame pointer
|
|
|
378 and the stack pointer values immediately after the function prologue.
|
|
|
379
|
|
|
380 Note, we always pretend that this is a leaf function because if
|
|
|
381 it's not, there's no point in trying to eliminate the
|
|
|
382 frame pointer. If it is a leaf function, we guessed right! */
|
|
|
383 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
|
|
|
384 do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
|
|
|
385
|
|
|
386 /* Base register for access to arguments of the function. */
|
|
|
387 #define ARG_POINTER_REGNUM (TARGET_64BIT ? 29 : 3)
|
|
|
388
|
|
|
389 /* Register in which static-chain is passed to a function. */
|
|
|
390 #define STATIC_CHAIN_REGNUM (TARGET_64BIT ? 31 : 29)
|
|
|
391
|
|
|
392 /* Register used to address the offset table for position-independent
|
|
|
393 data references. */
|
|
|
394 #define PIC_OFFSET_TABLE_REGNUM \
|
|
|
395 (flag_pic ? (TARGET_64BIT ? 27 : 19) : INVALID_REGNUM)
|
|
|
396
|
|
|
397 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
|
|
|
398
|
|
|
399 /* Function to return the rtx used to save the pic offset table register
|
|
|
400 across function calls. */
|
|
|
401 extern struct rtx_def *hppa_pic_save_rtx (void);
|
|
|
402
|
|
|
403 #define DEFAULT_PCC_STRUCT_RETURN 0
|
|
|
404
|
|
|
405 /* Register in which address to store a structure value
|
|
|
406 is passed to a function. */
|
|
|
407 #define PA_STRUCT_VALUE_REGNUM 28
|
|
|
408
|
|
|
409 /* Describe how we implement __builtin_eh_return. */
|
|
|
410 #define EH_RETURN_DATA_REGNO(N) \
|
|
|
411 ((N) < 3 ? (N) + 20 : (N) == 3 ? 31 : INVALID_REGNUM)
|
|
|
412 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 29)
|
|
|
413 #define EH_RETURN_HANDLER_RTX pa_eh_return_handler_rtx ()
|
|
|
414
|
|
|
415 /* Offset from the frame pointer register value to the top of stack. */
|
|
|
416 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
|
|
|
417
|
|
|
418 /* A C expression whose value is RTL representing the location of the
|
|
|
419 incoming return address at the beginning of any function, before the
|
|
|
420 prologue. You only need to define this macro if you want to support
|
|
|
421 call frame debugging information like that provided by DWARF 2. */
|
|
|
422 #define INCOMING_RETURN_ADDR_RTX (gen_rtx_REG (word_mode, 2))
|
|
|
423 #define DWARF_FRAME_RETURN_COLUMN (DWARF_FRAME_REGNUM (2))
|
|
|
424
|
|
|
425 /* A C expression whose value is an integer giving a DWARF 2 column
|
|
|
426 number that may be used as an alternate return column. This should
|
|
|
427 be defined only if DWARF_FRAME_RETURN_COLUMN is set to a general
|
|
|
428 register, but an alternate column needs to be used for signal frames.
|
|
|
429
|
|
|
430 Column 0 is not used but unfortunately its register size is set to
|
|
|
431 4 bytes (sizeof CCmode) so it can't be used on 64-bit targets. */
|
|
|
432 #define DWARF_ALT_FRAME_RETURN_COLUMN FIRST_PSEUDO_REGISTER
|
|
|
433
|
|
|
434 /* This macro chooses the encoding of pointers embedded in the exception
|
|
|
435 handling sections. If at all possible, this should be defined such
|
|
|
436 that the exception handling section will not require dynamic relocations,
|
|
|
437 and so may be read-only.
|
|
|
438
|
|
|
439 Because the HP assembler auto aligns, it is necessary to use
|
|
|
440 DW_EH_PE_aligned. It's not possible to make the data read-only
|
|
|
441 on the HP-UX SOM port since the linker requires fixups for label
|
|
|
442 differences in different sections to be word aligned. However,
|
|
|
443 the SOM linker can do unaligned fixups for absolute pointers.
|
|
|
444 We also need aligned pointers for global and function pointers.
|
|
|
445
|
|
|
446 Although the HP-UX 64-bit ELF linker can handle unaligned pc-relative
|
|
|
447 fixups, the runtime doesn't have a consistent relationship between
|
|
|
448 text and data for dynamically loaded objects. Thus, it's not possible
|
|
|
449 to use pc-relative encoding for pointers on this target. It may be
|
|
|
450 possible to use segment relative encodings but GAS doesn't currently
|
|
|
451 have a mechanism to generate these encodings. For other targets, we
|
|
|
452 use pc-relative encoding for pointers. If the pointer might require
|
|
|
453 dynamic relocation, we make it indirect. */
|
|
|
454 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
|
|
|
455 (TARGET_GAS && !TARGET_HPUX \
|
|
|
456 ? (DW_EH_PE_pcrel \
|
|
|
457 | ((GLOBAL) || (CODE) == 2 ? DW_EH_PE_indirect : 0) \
|
|
|
458 | (TARGET_64BIT ? DW_EH_PE_sdata8 : DW_EH_PE_sdata4)) \
|
|
|
459 : (!TARGET_GAS || (GLOBAL) || (CODE) == 2 \
|
|
|
460 ? DW_EH_PE_aligned : DW_EH_PE_absptr))
|
|
|
461
|
|
|
462 /* Handle special EH pointer encodings. Absolute, pc-relative, and
|
|
|
463 indirect are handled automatically. We output pc-relative, and
|
|
|
464 indirect pc-relative ourself since we need some special magic to
|
|
|
465 generate pc-relative relocations, and to handle indirect function
|
|
|
466 pointers. */
|
|
|
467 #define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX(FILE, ENCODING, SIZE, ADDR, DONE) \
|
|
|
468 do { \
|
|
|
469 if (((ENCODING) & 0x70) == DW_EH_PE_pcrel) \
|
|
|
470 { \
|
|
|
471 fputs (integer_asm_op (SIZE, FALSE), FILE); \
|
|
|
472 if ((ENCODING) & DW_EH_PE_indirect) \
|
|
|
473 output_addr_const (FILE, get_deferred_plabel (ADDR)); \
|
|
|
474 else \
|
|
|
475 assemble_name (FILE, XSTR ((ADDR), 0)); \
|
|
|
476 fputs ("+8-$PIC_pcrel$0", FILE); \
|
|
|
477 goto DONE; \
|
|
|
478 } \
|
|
|
479 } while (0)
|
|
|
480
|
|
|
481
|
|
|
482 /* The class value for index registers, and the one for base regs. */
|
|
|
483 #define INDEX_REG_CLASS GENERAL_REGS
|
|
|
484 #define BASE_REG_CLASS GENERAL_REGS
|
|
|
485
|
|
|
486 #define FP_REG_CLASS_P(CLASS) \
|
|
|
487 ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS)
|
|
|
488
|
|
|
489 /* True if register is floating-point. */
|
|
|
490 #define FP_REGNO_P(N) ((N) >= FP_REG_FIRST && (N) <= FP_REG_LAST)
|
|
|
491
|
|
|
492 /* Given an rtx X being reloaded into a reg required to be
|
|
|
493 in class CLASS, return the class of reg to actually use.
|
|
|
494 In general this is just CLASS; but on some machines
|
|
|
495 in some cases it is preferable to use a more restrictive class. */
|
|
|
496 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
|
|
|
497
|
|
|
498 #define MAYBE_FP_REG_CLASS_P(CLASS) \
|
|
|
499 reg_classes_intersect_p ((CLASS), FP_REGS)
|
|
|
500
|
|
|
501
|
|
|
502 /* Stack layout; function entry, exit and calling. */
|
|
|
503
|
|
|
504 /* Define this if pushing a word on the stack
|
|
|
505 makes the stack pointer a smaller address. */
|
|
|
506 /* #define STACK_GROWS_DOWNWARD */
|
|
|
507
|
|
|
508 /* Believe it or not. */
|
|
|
509 #define ARGS_GROW_DOWNWARD
|
|
|
510
|
|
|
511 /* Define this to nonzero if the nominal address of the stack frame
|
|
|
512 is at the high-address end of the local variables;
|
|
|
513 that is, each additional local variable allocated
|
|
|
514 goes at a more negative offset in the frame. */
|
|
|
515 #define FRAME_GROWS_DOWNWARD 0
|
|
|
516
|
|
|
517 /* Offset within stack frame to start allocating local variables at.
|
|
|
518 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
|
|
|
519 first local allocated. Otherwise, it is the offset to the BEGINNING
|
|
|
520 of the first local allocated.
|
|
|
521
|
|
|
522 On the 32-bit ports, we reserve one slot for the previous frame
|
|
|
523 pointer and one fill slot. The fill slot is for compatibility
|
|
|
524 with HP compiled programs. On the 64-bit ports, we reserve one
|
|
|
525 slot for the previous frame pointer. */
|
|
|
526 #define STARTING_FRAME_OFFSET 8
|
|
|
527
|
|
|
528 /* Define STACK_ALIGNMENT_NEEDED to zero to disable final alignment
|
|
|
529 of the stack. The default is to align it to STACK_BOUNDARY. */
|
|
|
530 #define STACK_ALIGNMENT_NEEDED 0
|
|
|
531
|
|
|
532 /* If we generate an insn to push BYTES bytes,
|
|
|
533 this says how many the stack pointer really advances by.
|
|
|
534 On the HP-PA, don't define this because there are no push insns. */
|
|
|
535 /* #define PUSH_ROUNDING(BYTES) */
|
|
|
536
|
|
|
537 /* Offset of first parameter from the argument pointer register value.
|
|
|
538 This value will be negated because the arguments grow down.
|
|
|
539 Also note that on STACK_GROWS_UPWARD machines (such as this one)
|
|
|
540 this is the distance from the frame pointer to the end of the first
|
|
|
541 argument, not it's beginning. To get the real offset of the first
|
|
|
542 argument, the size of the argument must be added. */
|
|
|
543
|
|
|
544 #define FIRST_PARM_OFFSET(FNDECL) (TARGET_64BIT ? -64 : -32)
|
|
|
545
|
|
|
546 /* When a parameter is passed in a register, stack space is still
|
|
|
547 allocated for it. */
|
|
|
548 #define REG_PARM_STACK_SPACE(DECL) (TARGET_64BIT ? 64 : 16)
|
|
|
549
|
|
|
550 /* Define this if the above stack space is to be considered part of the
|
|
|
551 space allocated by the caller. */
|
|
|
552 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
|
|
|
553
|
|
|
554 /* Keep the stack pointer constant throughout the function.
|
|
|
555 This is both an optimization and a necessity: longjmp
|
|
|
556 doesn't behave itself when the stack pointer moves within
|
|
|
557 the function! */
|
|
|
558 #define ACCUMULATE_OUTGOING_ARGS 1
|
|
|
559
|
|
|
560 /* The weird HPPA calling conventions require a minimum of 48 bytes on
|
|
|
561 the stack: 16 bytes for register saves, and 32 bytes for magic.
|
|
|
562 This is the difference between the logical top of stack and the
|
|
|
563 actual sp.
|
|
|
564
|
|
|
565 On the 64-bit port, the HP C compiler allocates a 48-byte frame
|
|
|
566 marker, although the runtime documentation only describes a 16
|
|
|
567 byte marker. For compatibility, we allocate 48 bytes. */
|
|
|
568 #define STACK_POINTER_OFFSET \
|
|
|
569 (TARGET_64BIT ? -(crtl->outgoing_args_size + 48): -32)
|
|
|
570
|
|
|
571 #define STACK_DYNAMIC_OFFSET(FNDECL) \
|
|
|
572 (TARGET_64BIT \
|
|
|
573 ? (STACK_POINTER_OFFSET) \
|
|
|
574 : ((STACK_POINTER_OFFSET) - crtl->outgoing_args_size))
|
|
|
575
|
|
|
576 /* Value is 1 if returning from a function call automatically
|
|
|
577 pops the arguments described by the number-of-args field in the call.
|
|
|
578 FUNDECL is the declaration node of the function (as a tree),
|
|
|
579 FUNTYPE is the data type of the function (as a tree),
|
|
|
580 or for a library call it is an identifier node for the subroutine name. */
|
|
|
581
|
|
|
582 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
|
|
|
583
|
|
|
584 /* Define how to find the value returned by a function.
|
|
|
585 VALTYPE is the data type of the value (as a tree).
|
|
|
586 If the precise function being called is known, FUNC is its FUNCTION_DECL;
|
|
|
587 otherwise, FUNC is 0. */
|
|
|
588
|
|
|
589 #define FUNCTION_VALUE(VALTYPE, FUNC) function_value (VALTYPE, FUNC)
|
|
|
590
|
|
|
591 /* Define how to find the value returned by a library function
|
|
|
592 assuming the value has mode MODE. */
|
|
|
593
|
|
|
594 #define LIBCALL_VALUE(MODE) \
|
|
|
595 gen_rtx_REG (MODE, \
|
|
|
596 (! TARGET_SOFT_FLOAT \
|
|
|
597 && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28))
|
|
|
598
|
|
|
599 /* 1 if N is a possible register number for a function value
|
|
|
600 as seen by the caller. */
|
|
|
601
|
|
|
602 #define FUNCTION_VALUE_REGNO_P(N) \
|
|
|
603 ((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32))
|
|
|
604
|
|
|
605
|
|
|
606 /* Define a data type for recording info about an argument list
|
|
|
607 during the scan of that argument list. This data type should
|
|
|
608 hold all necessary information about the function itself
|
|
|
609 and about the args processed so far, enough to enable macros
|
|
|
610 such as FUNCTION_ARG to determine where the next arg should go.
|
|
|
611
|
|
|
612 On the HP-PA, the WORDS field holds the number of words
|
|
|
613 of arguments scanned so far (including the invisible argument,
|
|
|
614 if any, which holds the structure-value-address). Thus, 4 or
|
|
|
615 more means all following args should go on the stack.
|
|
|
616
|
|
|
617 The INCOMING field tracks whether this is an "incoming" or
|
|
|
618 "outgoing" argument.
|
|
|
619
|
|
|
620 The INDIRECT field indicates whether this is is an indirect
|
|
|
621 call or not.
|
|
|
622
|
|
|
623 The NARGS_PROTOTYPE field indicates that an argument does not
|
|
|
624 have a prototype when it less than or equal to 0. */
|
|
|
625
|
|
|
626 struct hppa_args {int words, nargs_prototype, incoming, indirect; };
|
|
|
627
|
|
|
628 #define CUMULATIVE_ARGS struct hppa_args
|
|
|
629
|
|
|
630 /* Initialize a variable CUM of type CUMULATIVE_ARGS
|
|
|
631 for a call to a function whose data type is FNTYPE.
|
|
|
632 For a library call, FNTYPE is 0. */
|
|
|
633
|
|
|
634 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
|
|
|
635 (CUM).words = 0, \
|
|
|
636 (CUM).incoming = 0, \
|
|
|
637 (CUM).indirect = (FNTYPE) && !(FNDECL), \
|
|
|
638 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
|
|
|
639 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
|
|
|
640 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
|
|
|
641 || pa_return_in_memory (TREE_TYPE (FNTYPE), 0))) \
|
|
|
642 : 0)
|
|
|
643
|
|
|
644
|
|
|
645
|
|
|
646 /* Similar, but when scanning the definition of a procedure. We always
|
|
|
647 set NARGS_PROTOTYPE large so we never return a PARALLEL. */
|
|
|
648
|
|
|
649 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
|
|
|
650 (CUM).words = 0, \
|
|
|
651 (CUM).incoming = 1, \
|
|
|
652 (CUM).indirect = 0, \
|
|
|
653 (CUM).nargs_prototype = 1000
|
|
|
654
|
|
|
655 /* Figure out the size in words of the function argument. The size
|
|
|
656 returned by this macro should always be greater than zero because
|
|
|
657 we pass variable and zero sized objects by reference. */
|
|
|
658
|
|
|
659 #define FUNCTION_ARG_SIZE(MODE, TYPE) \
|
|
|
660 ((((MODE) != BLKmode \
|
|
|
661 ? (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \
|
|
|
662 : int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
|
|
|
663
|
|
|
664 /* Update the data in CUM to advance over an argument
|
|
|
665 of mode MODE and data type TYPE.
|
|
|
666 (TYPE is null for libcalls where that information may not be available.) */
|
|
|
667
|
|
|
668 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
|
|
|
669 { (CUM).nargs_prototype--; \
|
|
|
670 (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE) \
|
|
|
671 + (((CUM).words & 01) && (TYPE) != 0 \
|
|
|
672 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1); \
|
|
|
673 }
|
|
|
674
|
|
|
675 /* Determine where to put an argument to a function.
|
|
|
676 Value is zero to push the argument on the stack,
|
|
|
677 or a hard register in which to store the argument.
|
|
|
678
|
|
|
679 MODE is the argument's machine mode.
|
|
|
680 TYPE is the data type of the argument (as a tree).
|
|
|
681 This is null for libcalls where that information may
|
|
|
682 not be available.
|
|
|
683 CUM is a variable of type CUMULATIVE_ARGS which gives info about
|
|
|
684 the preceding args and about the function being called.
|
|
|
685 NAMED is nonzero if this argument is a named parameter
|
|
|
686 (otherwise it is an extra parameter matching an ellipsis).
|
|
|
687
|
|
|
688 On the HP-PA the first four words of args are normally in registers
|
|
|
689 and the rest are pushed. But any arg that won't entirely fit in regs
|
|
|
690 is pushed.
|
|
|
691
|
|
|
692 Arguments passed in registers are either 1 or 2 words long.
|
|
|
693
|
|
|
694 The caller must make a distinction between calls to explicitly named
|
|
|
695 functions and calls through pointers to functions -- the conventions
|
|
|
696 are different! Calls through pointers to functions only use general
|
|
|
697 registers for the first four argument words.
|
|
|
698
|
|
|
699 Of course all this is different for the portable runtime model
|
|
|
700 HP wants everyone to use for ELF. Ugh. Here's a quick description
|
|
|
701 of how it's supposed to work.
|
|
|
702
|
|
|
703 1) callee side remains unchanged. It expects integer args to be
|
|
|
704 in the integer registers, float args in the float registers and
|
|
|
705 unnamed args in integer registers.
|
|
|
706
|
|
|
707 2) caller side now depends on if the function being called has
|
|
|
708 a prototype in scope (rather than if it's being called indirectly).
|
|
|
709
|
|
|
710 2a) If there is a prototype in scope, then arguments are passed
|
|
|
711 according to their type (ints in integer registers, floats in float
|
|
|
712 registers, unnamed args in integer registers.
|
|
|
713
|
|
|
714 2b) If there is no prototype in scope, then floating point arguments
|
|
|
715 are passed in both integer and float registers. egad.
|
|
|
716
|
|
|
717 FYI: The portable parameter passing conventions are almost exactly like
|
|
|
718 the standard parameter passing conventions on the RS6000. That's why
|
|
|
719 you'll see lots of similar code in rs6000.h. */
|
|
|
720
|
|
|
721 /* If defined, a C expression which determines whether, and in which
|
|
|
722 direction, to pad out an argument with extra space. */
|
|
|
723 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
|
|
|
724
|
|
|
725 /* Specify padding for the last element of a block move between registers
|
|
|
726 and memory.
|
|
|
727
|
|
|
728 The 64-bit runtime specifies that objects need to be left justified
|
|
|
729 (i.e., the normal justification for a big endian target). The 32-bit
|
|
|
730 runtime specifies right justification for objects smaller than 64 bits.
|
|
|
731 We use a DImode register in the parallel for 5 to 7 byte structures
|
|
|
732 so that there is only one element. This allows the object to be
|
|
|
733 correctly padded. */
|
|
|
734 #define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \
|
|
|
735 function_arg_padding ((MODE), (TYPE))
|
|
|
736
|
|
|
737 /* Do not expect to understand this without reading it several times. I'm
|
|
|
738 tempted to try and simply it, but I worry about breaking something. */
|
|
|
739
|
|
|
740 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
|
|
|
741 function_arg (&CUM, MODE, TYPE, NAMED)
|
|
|
742
|
|
|
743 /* If defined, a C expression that gives the alignment boundary, in
|
|
|
744 bits, of an argument with the specified mode and type. If it is
|
|
|
745 not defined, `PARM_BOUNDARY' is used for all arguments. */
|
|
|
746
|
|
|
747 /* Arguments larger than one word are double word aligned. */
|
|
|
748
|
|
|
749 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
|
|
|
750 (((TYPE) \
|
|
|
751 ? (integer_zerop (TYPE_SIZE (TYPE)) \
|
|
|
752 || !TREE_CONSTANT (TYPE_SIZE (TYPE)) \
|
|
|
753 || int_size_in_bytes (TYPE) <= UNITS_PER_WORD) \
|
|
|
754 : GET_MODE_SIZE(MODE) <= UNITS_PER_WORD) \
|
|
|
755 ? PARM_BOUNDARY : MAX_PARM_BOUNDARY)
|
|
|
756
|
|
|
757
|
|
|
758 extern GTY(()) rtx hppa_compare_op0;
|
|
|
759 extern GTY(()) rtx hppa_compare_op1;
|
|
|
760 extern enum cmp_type hppa_branch_type;
|
|
|
761
|
|
|
762 /* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than
|
|
|
763 as assembly via FUNCTION_PROFILER. Just output a local label.
|
|
|
764 We can't use the function label because the GAS SOM target can't
|
|
|
765 handle the difference of a global symbol and a local symbol. */
|
|
|
766
|
|
|
767 #ifndef FUNC_BEGIN_PROLOG_LABEL
|
|
|
768 #define FUNC_BEGIN_PROLOG_LABEL "LFBP"
|
|
|
769 #endif
|
|
|
770
|
|
|
771 #define FUNCTION_PROFILER(FILE, LABEL) \
|
|
|
772 (*targetm.asm_out.internal_label) (FILE, FUNC_BEGIN_PROLOG_LABEL, LABEL)
|
|
|
773
|
|
|
774 #define PROFILE_HOOK(label_no) hppa_profile_hook (label_no)
|
|
|
775 void hppa_profile_hook (int label_no);
|
|
|
776
|
|
|
777 /* The profile counter if emitted must come before the prologue. */
|
|
|
778 #define PROFILE_BEFORE_PROLOGUE 1
|
|
|
779
|
|
|
780 /* We never want final.c to emit profile counters. When profile
|
|
|
781 counters are required, we have to defer emitting them to the end
|
|
|
782 of the current file. */
|
|
|
783 #define NO_PROFILE_COUNTERS 1
|
|
|
784
|
|
|
785 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
|
|
|
786 the stack pointer does not matter. The value is tested only in
|
|
|
787 functions that have frame pointers.
|
|
|
788 No definition is equivalent to always zero. */
|
|
|
789
|
|
|
790 extern int may_call_alloca;
|
|
|
791
|
|
|
792 #define EXIT_IGNORE_STACK \
|
|
|
793 (get_frame_size () != 0 \
|
|
|
794 || cfun->calls_alloca || crtl->outgoing_args_size)
|
|
|
795
|
|
|
796 /* Output assembler code for a block containing the constant parts
|
|
|
797 of a trampoline, leaving space for the variable parts.\
|
|
|
798
|
|
|
799 The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
|
|
|
800 and then branches to the specified routine.
|
|
|
801
|
|
|
802 This code template is copied from text segment to stack location
|
|
|
803 and then patched with INITIALIZE_TRAMPOLINE to contain
|
|
|
804 valid values, and then entered as a subroutine.
|
|
|
805
|
|
|
806 It is best to keep this as small as possible to avoid having to
|
|
|
807 flush multiple lines in the cache. */
|
|
|
808
|
|
|
809 #define TRAMPOLINE_TEMPLATE(FILE) \
|
|
|
810 { \
|
|
|
811 if (!TARGET_64BIT) \
|
|
|
812 { \
|
|
|
813 fputs ("\tldw 36(%r22),%r21\n", FILE); \
|
|
|
814 fputs ("\tbb,>=,n %r21,30,.+16\n", FILE); \
|
|
|
815 if (ASSEMBLER_DIALECT == 0) \
|
|
|
816 fputs ("\tdepi 0,31,2,%r21\n", FILE); \
|
|
|
817 else \
|
|
|
818 fputs ("\tdepwi 0,31,2,%r21\n", FILE); \
|
|
|
819 fputs ("\tldw 4(%r21),%r19\n", FILE); \
|
|
|
820 fputs ("\tldw 0(%r21),%r21\n", FILE); \
|
|
|
821 if (TARGET_PA_20) \
|
|
|
822 { \
|
|
|
823 fputs ("\tbve (%r21)\n", FILE); \
|
|
|
824 fputs ("\tldw 40(%r22),%r29\n", FILE); \
|
|
|
825 fputs ("\t.word 0\n", FILE); \
|
|
|
826 fputs ("\t.word 0\n", FILE); \
|
|
|
827 } \
|
|
|
828 else \
|
|
|
829 { \
|
|
|
830 fputs ("\tldsid (%r21),%r1\n", FILE); \
|
|
|
831 fputs ("\tmtsp %r1,%sr0\n", FILE); \
|
|
|
832 fputs ("\tbe 0(%sr0,%r21)\n", FILE); \
|
|
|
833 fputs ("\tldw 40(%r22),%r29\n", FILE); \
|
|
|
834 } \
|
|
|
835 fputs ("\t.word 0\n", FILE); \
|
|
|
836 fputs ("\t.word 0\n", FILE); \
|
|
|
837 fputs ("\t.word 0\n", FILE); \
|
|
|
838 fputs ("\t.word 0\n", FILE); \
|
|
|
839 } \
|
|
|
840 else \
|
|
|
841 { \
|
|
|
842 fputs ("\t.dword 0\n", FILE); \
|
|
|
843 fputs ("\t.dword 0\n", FILE); \
|
|
|
844 fputs ("\t.dword 0\n", FILE); \
|
|
|
845 fputs ("\t.dword 0\n", FILE); \
|
|
|
846 fputs ("\tmfia %r31\n", FILE); \
|
|
|
847 fputs ("\tldd 24(%r31),%r1\n", FILE); \
|
|
|
848 fputs ("\tldd 24(%r1),%r27\n", FILE); \
|
|
|
849 fputs ("\tldd 16(%r1),%r1\n", FILE); \
|
|
|
850 fputs ("\tbve (%r1)\n", FILE); \
|
|
|
851 fputs ("\tldd 32(%r31),%r31\n", FILE); \
|
|
|
852 fputs ("\t.dword 0 ; fptr\n", FILE); \
|
|
|
853 fputs ("\t.dword 0 ; static link\n", FILE); \
|
|
|
854 } \
|
|
|
855 }
|
|
|
856
|
|
|
857 /* Length in units of the trampoline for entering a nested function. */
|
|
|
858
|
|
|
859 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 52)
|
|
|
860
|
|
|
861 /* Length in units of the trampoline instruction code. */
|
|
|
862
|
|
|
863 #define TRAMPOLINE_CODE_SIZE (TARGET_64BIT ? 24 : (TARGET_PA_20 ? 32 : 40))
|
|
|
864
|
|
|
865 /* Minimum length of a cache line. A length of 16 will work on all
|
|
|
866 PA-RISC processors. All PA 1.1 processors have a cache line of
|
|
|
867 32 bytes. Most but not all PA 2.0 processors have a cache line
|
|
|
868 of 64 bytes. As cache flushes are expensive and we don't support
|
|
|
869 PA 1.0, we use a minimum length of 32. */
|
|
|
870
|
|
|
871 #define MIN_CACHELINE_SIZE 32
|
|
|
872
|
|
|
873 /* Emit RTL insns to initialize the variable parts of a trampoline.
|
|
|
874 FNADDR is an RTX for the address of the function's pure code.
|
|
|
875 CXT is an RTX for the static chain value for the function.
|
|
|
876
|
|
|
877 Move the function address to the trampoline template at offset 36.
|
|
|
878 Move the static chain value to trampoline template at offset 40.
|
|
|
879 Move the trampoline address to trampoline template at offset 44.
|
|
|
880 Move r19 to trampoline template at offset 48. The latter two
|
|
|
881 words create a plabel for the indirect call to the trampoline.
|
|
|
882
|
|
|
883 A similar sequence is used for the 64-bit port but the plabel is
|
|
|
884 at the beginning of the trampoline.
|
|
|
885
|
|
|
886 Finally, the cache entries for the trampoline code are flushed.
|
|
|
887 This is necessary to ensure that the trampoline instruction sequence
|
|
|
888 is written to memory prior to any attempts at prefetching the code
|
|
|
889 sequence. */
|
|
|
890
|
|
|
891 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
|
|
|
892 { \
|
|
|
893 rtx start_addr = gen_reg_rtx (Pmode); \
|
|
|
894 rtx end_addr = gen_reg_rtx (Pmode); \
|
|
|
895 rtx line_length = gen_reg_rtx (Pmode); \
|
|
|
896 rtx tmp; \
|
|
|
897 \
|
|
|
898 if (!TARGET_64BIT) \
|
|
|
899 { \
|
|
|
900 tmp = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
|
|
|
901 emit_move_insn (gen_rtx_MEM (Pmode, tmp), (FNADDR)); \
|
|
|
902 tmp = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
|
|
|
903 emit_move_insn (gen_rtx_MEM (Pmode, tmp), (CXT)); \
|
|
|
904 \
|
|
|
905 /* Create a fat pointer for the trampoline. */ \
|
|
|
906 tmp = memory_address (Pmode, plus_constant ((TRAMP), 44)); \
|
|
|
907 emit_move_insn (gen_rtx_MEM (Pmode, tmp), (TRAMP)); \
|
|
|
908 tmp = memory_address (Pmode, plus_constant ((TRAMP), 48)); \
|
|
|
909 emit_move_insn (gen_rtx_MEM (Pmode, tmp), \
|
|
|
910 gen_rtx_REG (Pmode, 19)); \
|
|
|
911 \
|
|
|
912 /* fdc and fic only use registers for the address to flush, \
|
|
|
913 they do not accept integer displacements. We align the \
|
|
|
914 start and end addresses to the beginning of their respective \
|
|
|
915 cache lines to minimize the number of lines flushed. */ \
|
|
|
916 tmp = force_reg (Pmode, (TRAMP)); \
|
|
|
917 emit_insn (gen_andsi3 (start_addr, tmp, \
|
|
|
918 GEN_INT (-MIN_CACHELINE_SIZE))); \
|
|
|
919 tmp = force_reg (Pmode, \
|
|
|
920 plus_constant (tmp, TRAMPOLINE_CODE_SIZE - 1)); \
|
|
|
921 emit_insn (gen_andsi3 (end_addr, tmp, \
|
|
|
922 GEN_INT (-MIN_CACHELINE_SIZE))); \
|
|
|
923 emit_move_insn (line_length, GEN_INT (MIN_CACHELINE_SIZE)); \
|
|
|
924 emit_insn (gen_dcacheflushsi (start_addr, end_addr, line_length));\
|
|
|
925 emit_insn (gen_icacheflushsi (start_addr, end_addr, line_length, \
|
|
|
926 gen_reg_rtx (Pmode), \
|
|
|
927 gen_reg_rtx (Pmode))); \
|
|
|
928 } \
|
|
|
929 else \
|
|
|
930 { \
|
|
|
931 tmp = memory_address (Pmode, plus_constant ((TRAMP), 56)); \
|
|
|
932 emit_move_insn (gen_rtx_MEM (Pmode, tmp), (FNADDR)); \
|
|
|
933 tmp = memory_address (Pmode, plus_constant ((TRAMP), 64)); \
|
|
|
934 emit_move_insn (gen_rtx_MEM (Pmode, tmp), (CXT)); \
|
|
|
935 \
|
|
|
936 /* Create a fat pointer for the trampoline. */ \
|
|
|
937 tmp = memory_address (Pmode, plus_constant ((TRAMP), 16)); \
|
|
|
938 emit_move_insn (gen_rtx_MEM (Pmode, tmp), \
|
|
|
939 force_reg (Pmode, plus_constant ((TRAMP), 32))); \
|
|
|
940 tmp = memory_address (Pmode, plus_constant ((TRAMP), 24)); \
|
|
|
941 emit_move_insn (gen_rtx_MEM (Pmode, tmp), \
|
|
|
942 gen_rtx_REG (Pmode, 27)); \
|
|
|
943 \
|
|
|
944 /* fdc and fic only use registers for the address to flush, \
|
|
|
945 they do not accept integer displacements. We align the \
|
|
|
946 start and end addresses to the beginning of their respective \
|
|
|
947 cache lines to minimize the number of lines flushed. */ \
|
|
|
948 tmp = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
|
|
|
949 emit_insn (gen_anddi3 (start_addr, tmp, \
|
|
|
950 GEN_INT (-MIN_CACHELINE_SIZE))); \
|
|
|
951 tmp = force_reg (Pmode, \
|
|
|
952 plus_constant (tmp, TRAMPOLINE_CODE_SIZE - 1)); \
|
|
|
953 emit_insn (gen_anddi3 (end_addr, tmp, \
|
|
|
954 GEN_INT (-MIN_CACHELINE_SIZE))); \
|
|
|
955 emit_move_insn (line_length, GEN_INT (MIN_CACHELINE_SIZE)); \
|
|
|
956 emit_insn (gen_dcacheflushdi (start_addr, end_addr, line_length));\
|
|
|
957 emit_insn (gen_icacheflushdi (start_addr, end_addr, line_length, \
|
|
|
958 gen_reg_rtx (Pmode), \
|
|
|
959 gen_reg_rtx (Pmode))); \
|
|
|
960 } \
|
|
|
961 }
|
|
|
962
|
|
|
963 /* Perform any machine-specific adjustment in the address of the trampoline.
|
|
|
964 ADDR contains the address that was passed to INITIALIZE_TRAMPOLINE.
|
|
|
965 Adjust the trampoline address to point to the plabel at offset 44. */
|
|
|
966
|
|
|
967 #define TRAMPOLINE_ADJUST_ADDRESS(ADDR) \
|
|
|
968 if (!TARGET_64BIT) (ADDR) = memory_address (Pmode, plus_constant ((ADDR), 46))
|
|
|
969
|
|
|
970 /* Addressing modes, and classification of registers for them.
|
|
|
971
|
|
|
972 Using autoincrement addressing modes on PA8000 class machines is
|
|
|
973 not profitable. */
|
|
|
974
|
|
|
975 #define HAVE_POST_INCREMENT (pa_cpu < PROCESSOR_8000)
|
|
|
976 #define HAVE_POST_DECREMENT (pa_cpu < PROCESSOR_8000)
|
|
|
977
|
|
|
978 #define HAVE_PRE_DECREMENT (pa_cpu < PROCESSOR_8000)
|
|
|
979 #define HAVE_PRE_INCREMENT (pa_cpu < PROCESSOR_8000)
|
|
|
980
|
|
|
981 /* Macros to check register numbers against specific register classes. */
|
|
|
982
|
|
|
983 /* The following macros assume that X is a hard or pseudo reg number.
|
|
|
984 They give nonzero only if X is a hard reg of the suitable class
|
|
|
985 or a pseudo reg currently allocated to a suitable hard reg.
|
|
|
986 Since they use reg_renumber, they are safe only once reg_renumber
|
|
|
987 has been allocated, which happens in local-alloc.c. */
|
|
|
988
|
|
|
989 #define REGNO_OK_FOR_INDEX_P(X) \
|
|
|
990 ((X) && ((X) < 32 \
|
|
|
991 || (X >= FIRST_PSEUDO_REGISTER \
|
|
|
992 && reg_renumber \
|
|
|
993 && (unsigned) reg_renumber[X] < 32)))
|
|
|
994 #define REGNO_OK_FOR_BASE_P(X) \
|
|
|
995 ((X) && ((X) < 32 \
|
|
|
996 || (X >= FIRST_PSEUDO_REGISTER \
|
|
|
997 && reg_renumber \
|
|
|
998 && (unsigned) reg_renumber[X] < 32)))
|
|
|
999 #define REGNO_OK_FOR_FP_P(X) \
|
|
|
1000 (FP_REGNO_P (X) \
|
|
|
1001 || (X >= FIRST_PSEUDO_REGISTER \
|
|
|
1002 && reg_renumber \
|
|
|
1003 && FP_REGNO_P (reg_renumber[X])))
|
|
|
1004
|
|
|
1005 /* Now macros that check whether X is a register and also,
|
|
|
1006 strictly, whether it is in a specified class.
|
|
|
1007
|
|
|
1008 These macros are specific to the HP-PA, and may be used only
|
|
|
1009 in code for printing assembler insns and in conditions for
|
|
|
1010 define_optimization. */
|
|
|
1011
|
|
|
1012 /* 1 if X is an fp register. */
|
|
|
1013
|
|
|
1014 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
|
|
|
1015
|
|
|
1016 /* Maximum number of registers that can appear in a valid memory address. */
|
|
|
1017
|
|
|
1018 #define MAX_REGS_PER_ADDRESS 2
|
|
|
1019
|
|
|
1020 /* Non-TLS symbolic references. */
|
|
|
1021 #define PA_SYMBOL_REF_TLS_P(RTX) \
|
|
|
1022 (GET_CODE (RTX) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (RTX) != 0)
|
|
|
1023
|
|
|
1024 /* Recognize any constant value that is a valid address except
|
|
|
1025 for symbolic addresses. We get better CSE by rejecting them
|
|
|
1026 here and allowing hppa_legitimize_address to break them up. We
|
|
|
1027 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
|
|
|
1028
|
|
|
1029 #define CONSTANT_ADDRESS_P(X) \
|
|
|
1030 ((GET_CODE (X) == LABEL_REF \
|
|
|
1031 || (GET_CODE (X) == SYMBOL_REF && !SYMBOL_REF_TLS_MODEL (X)) \
|
|
|
1032 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
|
|
|
1033 || GET_CODE (X) == HIGH) \
|
|
|
1034 && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
|
|
|
1035
|
|
|
1036 /* A C expression that is nonzero if we are using the new HP assembler. */
|
|
|
1037
|
|
|
1038 #ifndef NEW_HP_ASSEMBLER
|
|
|
1039 #define NEW_HP_ASSEMBLER 0
|
|
|
1040 #endif
|
|
|
1041
|
|
|
1042 /* The macros below define the immediate range for CONST_INTS on
|
|
|
1043 the 64-bit port. Constants in this range can be loaded in three
|
|
|
1044 instructions using a ldil/ldo/depdi sequence. Constants outside
|
|
|
1045 this range are forced to the constant pool prior to reload. */
|
|
|
1046
|
|
|
1047 #define MAX_LEGIT_64BIT_CONST_INT ((HOST_WIDE_INT) 32 << 31)
|
|
|
1048 #define MIN_LEGIT_64BIT_CONST_INT ((HOST_WIDE_INT) -32 << 31)
|
|
|
1049 #define LEGITIMATE_64BIT_CONST_INT_P(X) \
|
|
|
1050 ((X) >= MIN_LEGIT_64BIT_CONST_INT && (X) < MAX_LEGIT_64BIT_CONST_INT)
|
|
|
1051
|
|
|
1052 /* A C expression that is nonzero if X is a legitimate constant for an
|
|
|
1053 immediate operand.
|
|
|
1054
|
|
|
1055 We include all constant integers and constant doubles, but not
|
|
|
1056 floating-point, except for floating-point zero. We reject LABEL_REFs
|
|
|
1057 if we're not using gas or the new HP assembler.
|
|
|
1058
|
|
|
1059 In 64-bit mode, we reject CONST_DOUBLES. We also reject CONST_INTS
|
|
|
1060 that need more than three instructions to load prior to reload. This
|
|
|
1061 limit is somewhat arbitrary. It takes three instructions to load a
|
|
|
1062 CONST_INT from memory but two are memory accesses. It may be better
|
|
|
1063 to increase the allowed range for CONST_INTS. We may also be able
|
|
|
1064 to handle CONST_DOUBLES. */
|
|
|
1065
|
|
|
1066 #define LEGITIMATE_CONSTANT_P(X) \
|
|
|
1067 ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
|
|
|
1068 || (X) == CONST0_RTX (GET_MODE (X))) \
|
|
|
1069 && (NEW_HP_ASSEMBLER \
|
|
|
1070 || TARGET_GAS \
|
|
|
1071 || GET_CODE (X) != LABEL_REF) \
|
|
|
1072 && (!TARGET_64BIT \
|
|
|
1073 || GET_CODE (X) != CONST_DOUBLE) \
|
|
|
1074 && (!TARGET_64BIT \
|
|
|
1075 || HOST_BITS_PER_WIDE_INT <= 32 \
|
|
|
1076 || GET_CODE (X) != CONST_INT \
|
|
|
1077 || reload_in_progress \
|
|
|
1078 || reload_completed \
|
|
|
1079 || LEGITIMATE_64BIT_CONST_INT_P (INTVAL (X)) \
|
|
|
1080 || cint_ok_for_move (INTVAL (X))) \
|
|
|
1081 && !function_label_operand (X, VOIDmode))
|
|
|
1082
|
|
|
1083 /* Target flags set on a symbol_ref. */
|
|
|
1084
|
|
|
1085 /* Set by ASM_OUTPUT_SYMBOL_REF when a symbol_ref is output. */
|
|
|
1086 #define SYMBOL_FLAG_REFERENCED (1 << SYMBOL_FLAG_MACH_DEP_SHIFT)
|
|
|
1087 #define SYMBOL_REF_REFERENCED_P(RTX) \
|
|
|
1088 ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_REFERENCED) != 0)
|
|
|
1089
|
|
|
1090 /* Defines for constraints.md. */
|
|
|
1091
|
|
|
1092 /* Return 1 iff OP is a scaled or unscaled index address. */
|
|
|
1093 #define IS_INDEX_ADDR_P(OP) \
|
|
|
1094 (GET_CODE (OP) == PLUS \
|
|
|
1095 && GET_MODE (OP) == Pmode \
|
|
|
1096 && (GET_CODE (XEXP (OP, 0)) == MULT \
|
|
|
1097 || GET_CODE (XEXP (OP, 1)) == MULT \
|
|
|
1098 || (REG_P (XEXP (OP, 0)) \
|
|
|
1099 && REG_P (XEXP (OP, 1)))))
|
|
|
1100
|
|
|
1101 /* Return 1 iff OP is a LO_SUM DLT address. */
|
|
|
1102 #define IS_LO_SUM_DLT_ADDR_P(OP) \
|
|
|
1103 (GET_CODE (OP) == LO_SUM \
|
|
|
1104 && GET_MODE (OP) == Pmode \
|
|
|
1105 && REG_P (XEXP (OP, 0)) \
|
|
|
1106 && REG_OK_FOR_BASE_P (XEXP (OP, 0)) \
|
|
|
1107 && GET_CODE (XEXP (OP, 1)) == UNSPEC)
|
|
|
1108
|
|
|
1109 /* Nonzero if 14-bit offsets can be used for all loads and stores.
|
|
|
1110 This is not possible when generating PA 1.x code as floating point
|
|
|
1111 loads and stores only support 5-bit offsets. Note that we do not
|
|
|
1112 forbid the use of 14-bit offsets in GO_IF_LEGITIMATE_ADDRESS.
|
|
|
1113 Instead, we use pa_secondary_reload() to reload integer mode
|
|
|
1114 REG+D memory addresses used in floating point loads and stores.
|
|
|
1115
|
|
|
1116 FIXME: the ELF32 linker clobbers the LSB of the FP register number
|
|
|
1117 in PA 2.0 floating-point insns with long displacements. This is
|
|
|
1118 because R_PARISC_DPREL14WR and other relocations like it are not
|
|
|
1119 yet supported by GNU ld. For now, we reject long displacements
|
|
|
1120 on this target. */
|
|
|
1121
|
|
|
1122 #define INT14_OK_STRICT \
|
|
|
1123 (TARGET_SOFT_FLOAT \
|
|
|
1124 || TARGET_DISABLE_FPREGS \
|
|
|
1125 || (TARGET_PA_20 && !TARGET_ELF32))
|
|
|
1126
|
|
|
1127 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
|
|
|
1128 and check its validity for a certain class.
|
|
|
1129 We have two alternate definitions for each of them.
|
|
|
1130 The usual definition accepts all pseudo regs; the other rejects
|
|
|
1131 them unless they have been allocated suitable hard regs.
|
|
|
1132 The symbol REG_OK_STRICT causes the latter definition to be used.
|
|
|
1133
|
|
|
1134 Most source files want to accept pseudo regs in the hope that
|
|
|
1135 they will get allocated to the class that the insn wants them to be in.
|
|
|
1136 Source files for reload pass need to be strict.
|
|
|
1137 After reload, it makes no difference, since pseudo regs have
|
|
|
1138 been eliminated by then. */
|
|
|
1139
|
|
|
1140 #ifndef REG_OK_STRICT
|
|
|
1141
|
|
|
1142 /* Nonzero if X is a hard reg that can be used as an index
|
|
|
1143 or if it is a pseudo reg. */
|
|
|
1144 #define REG_OK_FOR_INDEX_P(X) \
|
|
|
1145 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
|
|
|
1146
|
|
|
1147 /* Nonzero if X is a hard reg that can be used as a base reg
|
|
|
1148 or if it is a pseudo reg. */
|
|
|
1149 #define REG_OK_FOR_BASE_P(X) \
|
|
|
1150 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
|
|
|
1151
|
|
|
1152 #else
|
|
|
1153
|
|
|
1154 /* Nonzero if X is a hard reg that can be used as an index. */
|
|
|
1155 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
|
|
|
1156
|
|
|
1157 /* Nonzero if X is a hard reg that can be used as a base reg. */
|
|
|
1158 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
|
|
|
1159
|
|
|
1160 #endif
|
|
|
1161
|
|
|
1162 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
|
|
|
1163 valid memory address for an instruction. The MODE argument is the
|
|
|
1164 machine mode for the MEM expression that wants to use this address.
|
|
|
1165
|
|
|
1166 On HP PA-RISC, the legitimate address forms are REG+SMALLINT,
|
|
|
1167 REG+REG, and REG+(REG*SCALE). The indexed address forms are only
|
|
|
1168 available with floating point loads and stores, and integer loads.
|
|
|
1169 We get better code by allowing indexed addresses in the initial
|
|
|
1170 RTL generation.
|
|
|
1171
|
|
|
1172 The acceptance of indexed addresses as legitimate implies that we
|
|
|
1173 must provide patterns for doing indexed integer stores, or the move
|
|
|
1174 expanders must force the address of an indexed store to a register.
|
|
|
1175 We have adopted the latter approach.
|
|
|
1176
|
|
|
1177 Another function of GO_IF_LEGITIMATE_ADDRESS is to ensure that
|
|
|
1178 the base register is a valid pointer for indexed instructions.
|
|
|
1179 On targets that have non-equivalent space registers, we have to
|
|
|
1180 know at the time of assembler output which register in a REG+REG
|
|
|
1181 pair is the base register. The REG_POINTER flag is sometimes lost
|
|
|
1182 in reload and the following passes, so it can't be relied on during
|
|
|
1183 code generation. Thus, we either have to canonicalize the order
|
|
|
1184 of the registers in REG+REG indexed addresses, or treat REG+REG
|
|
|
1185 addresses separately and provide patterns for both permutations.
|
|
|
1186
|
|
|
1187 The latter approach requires several hundred additional lines of
|
|
|
1188 code in pa.md. The downside to canonicalizing is that a PLUS
|
|
|
1189 in the wrong order can't combine to form to make a scaled indexed
|
|
|
1190 memory operand. As we won't need to canonicalize the operands if
|
|
|
1191 the REG_POINTER lossage can be fixed, it seems better canonicalize.
|
|
|
1192
|
|
|
1193 We initially break out scaled indexed addresses in canonical order
|
|
|
1194 in emit_move_sequence. LEGITIMIZE_ADDRESS also canonicalizes
|
|
|
1195 scaled indexed addresses during RTL generation. However, fold_rtx
|
|
|
1196 has its own opinion on how the operands of a PLUS should be ordered.
|
|
|
1197 If one of the operands is equivalent to a constant, it will make
|
|
|
1198 that operand the second operand. As the base register is likely to
|
|
|
1199 be equivalent to a SYMBOL_REF, we have made it the second operand.
|
|
|
1200
|
|
|
1201 GO_IF_LEGITIMATE_ADDRESS accepts REG+REG as legitimate when the
|
|
|
1202 operands are in the order INDEX+BASE on targets with non-equivalent
|
|
|
1203 space registers, and in any order on targets with equivalent space
|
|
|
1204 registers. It accepts both MULT+BASE and BASE+MULT for scaled indexing.
|
|
|
1205
|
|
|
1206 We treat a SYMBOL_REF as legitimate if it is part of the current
|
|
|
1207 function's constant-pool, because such addresses can actually be
|
|
|
1208 output as REG+SMALLINT. */
|
|
|
1209
|
|
|
1210 #define VAL_5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x10 < 0x20)
|
|
|
1211 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
|
|
|
1212
|
|
|
1213 #define VAL_U5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x20)
|
|
|
1214 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
|
|
|
1215
|
|
|
1216 #define VAL_11_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x400 < 0x800)
|
|
|
1217 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
|
|
|
1218
|
|
|
1219 #define VAL_14_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x2000 < 0x4000)
|
|
|
1220 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
|
|
|
1221
|
|
|
1222 #if HOST_BITS_PER_WIDE_INT > 32
|
|
|
1223 #define VAL_32_BITS_P(X) \
|
|
|
1224 ((unsigned HOST_WIDE_INT)(X) + ((unsigned HOST_WIDE_INT) 1 << 31) \
|
|
|
1225 < (unsigned HOST_WIDE_INT) 2 << 31)
|
|
|
1226 #else
|
|
|
1227 #define VAL_32_BITS_P(X) 1
|
|
|
1228 #endif
|
|
|
1229 #define INT_32_BITS(X) VAL_32_BITS_P (INTVAL (X))
|
|
|
1230
|
|
|
1231 /* These are the modes that we allow for scaled indexing. */
|
|
|
1232 #define MODE_OK_FOR_SCALED_INDEXING_P(MODE) \
|
|
|
1233 ((TARGET_64BIT && (MODE) == DImode) \
|
|
|
1234 || (MODE) == SImode \
|
|
|
1235 || (MODE) == HImode \
|
|
|
1236 || (MODE) == SFmode \
|
|
|
1237 || (MODE) == DFmode)
|
|
|
1238
|
|
|
1239 /* These are the modes that we allow for unscaled indexing. */
|
|
|
1240 #define MODE_OK_FOR_UNSCALED_INDEXING_P(MODE) \
|
|
|
1241 ((TARGET_64BIT && (MODE) == DImode) \
|
|
|
1242 || (MODE) == SImode \
|
|
|
1243 || (MODE) == HImode \
|
|
|
1244 || (MODE) == QImode \
|
|
|
1245 || (MODE) == SFmode \
|
|
|
1246 || (MODE) == DFmode)
|
|
|
1247
|
|
|
1248 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
|
|
|
1249 { \
|
|
|
1250 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
|
|
|
1251 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
|
|
|
1252 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
|
|
|
1253 && REG_P (XEXP (X, 0)) \
|
|
|
1254 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
|
|
|
1255 goto ADDR; \
|
|
|
1256 else if (GET_CODE (X) == PLUS) \
|
|
|
1257 { \
|
|
|
1258 rtx base = 0, index = 0; \
|
|
|
1259 if (REG_P (XEXP (X, 1)) \
|
|
|
1260 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
|
|
|
1261 base = XEXP (X, 1), index = XEXP (X, 0); \
|
|
|
1262 else if (REG_P (XEXP (X, 0)) \
|
|
|
1263 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
|
|
|
1264 base = XEXP (X, 0), index = XEXP (X, 1); \
|
|
|
1265 if (base \
|
|
|
1266 && GET_CODE (index) == CONST_INT \
|
|
|
1267 && ((INT_14_BITS (index) \
|
|
|
1268 && (((MODE) != DImode \
|
|
|
1269 && (MODE) != SFmode \
|
|
|
1270 && (MODE) != DFmode) \
|
|
|
1271 /* The base register for DImode loads and stores \
|
|
|
1272 with long displacements must be aligned because \
|
|
|
1273 the lower three bits in the displacement are \
|
|
|
1274 assumed to be zero. */ \
|
|
|
1275 || ((MODE) == DImode \
|
|
|
1276 && (!TARGET_64BIT \
|
|
|
1277 || (INTVAL (index) % 8) == 0)) \
|
|
|
1278 /* Similarly, the base register for SFmode/DFmode \
|
|
|
1279 loads and stores with long displacements must \
|
|
|
1280 be aligned. */ \
|
|
|
1281 || (((MODE) == SFmode || (MODE) == DFmode) \
|
|
|
1282 && INT14_OK_STRICT \
|
|
|
1283 && (INTVAL (index) % GET_MODE_SIZE (MODE)) == 0))) \
|
|
|
1284 || INT_5_BITS (index))) \
|
|
|
1285 goto ADDR; \
|
|
|
1286 if (!TARGET_DISABLE_INDEXING \
|
|
|
1287 /* Only accept the "canonical" INDEX+BASE operand order \
|
|
|
1288 on targets with non-equivalent space registers. */ \
|
|
|
1289 && (TARGET_NO_SPACE_REGS \
|
|
|
1290 ? (base && REG_P (index)) \
|
|
|
1291 : (base == XEXP (X, 1) && REG_P (index) \
|
|
|
1292 && (reload_completed \
|
|
|
1293 || (reload_in_progress && HARD_REGISTER_P (base)) \
|
|
|
1294 || REG_POINTER (base)) \
|
|
|
1295 && (reload_completed \
|
|
|
1296 || (reload_in_progress && HARD_REGISTER_P (index)) \
|
|
|
1297 || !REG_POINTER (index)))) \
|
|
|
1298 && MODE_OK_FOR_UNSCALED_INDEXING_P (MODE) \
|
|
|
1299 && REG_OK_FOR_INDEX_P (index) \
|
|
|
1300 && borx_reg_operand (base, Pmode) \
|
|
|
1301 && borx_reg_operand (index, Pmode)) \
|
|
|
1302 goto ADDR; \
|
|
|
1303 if (!TARGET_DISABLE_INDEXING \
|
|
|
1304 && base \
|
|
|
1305 && GET_CODE (index) == MULT \
|
|
|
1306 && MODE_OK_FOR_SCALED_INDEXING_P (MODE) \
|
|
|
1307 && REG_P (XEXP (index, 0)) \
|
|
|
1308 && GET_MODE (XEXP (index, 0)) == Pmode \
|
|
|
1309 && REG_OK_FOR_INDEX_P (XEXP (index, 0)) \
|
|
|
1310 && GET_CODE (XEXP (index, 1)) == CONST_INT \
|
|
|
1311 && INTVAL (XEXP (index, 1)) \
|
|
|
1312 == (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \
|
|
|
1313 && borx_reg_operand (base, Pmode)) \
|
|
|
1314 goto ADDR; \
|
|
|
1315 } \
|
|
|
1316 else if (GET_CODE (X) == LO_SUM \
|
|
|
1317 && GET_CODE (XEXP (X, 0)) == REG \
|
|
|
1318 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
|
|
|
1319 && CONSTANT_P (XEXP (X, 1)) \
|
|
|
1320 && (TARGET_SOFT_FLOAT \
|
|
|
1321 /* We can allow symbolic LO_SUM addresses for PA2.0. */ \
|
|
|
1322 || (TARGET_PA_20 \
|
|
|
1323 && !TARGET_ELF32 \
|
|
|
1324 && GET_CODE (XEXP (X, 1)) != CONST_INT) \
|
|
|
1325 || ((MODE) != SFmode \
|
|
|
1326 && (MODE) != DFmode))) \
|
|
|
1327 goto ADDR; \
|
|
|
1328 else if (GET_CODE (X) == LO_SUM \
|
|
|
1329 && GET_CODE (XEXP (X, 0)) == SUBREG \
|
|
|
1330 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG \
|
|
|
1331 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0))) \
|
|
|
1332 && CONSTANT_P (XEXP (X, 1)) \
|
|
|
1333 && (TARGET_SOFT_FLOAT \
|
|
|
1334 /* We can allow symbolic LO_SUM addresses for PA2.0. */ \
|
|
|
1335 || (TARGET_PA_20 \
|
|
|
1336 && !TARGET_ELF32 \
|
|
|
1337 && GET_CODE (XEXP (X, 1)) != CONST_INT) \
|
|
|
1338 || ((MODE) != SFmode \
|
|
|
1339 && (MODE) != DFmode))) \
|
|
|
1340 goto ADDR; \
|
|
|
1341 else if (GET_CODE (X) == LABEL_REF \
|
|
|
1342 || (GET_CODE (X) == CONST_INT \
|
|
|
1343 && INT_5_BITS (X))) \
|
|
|
1344 goto ADDR; \
|
|
|
1345 /* Needed for -fPIC */ \
|
|
|
1346 else if (GET_CODE (X) == LO_SUM \
|
|
|
1347 && GET_CODE (XEXP (X, 0)) == REG \
|
|
|
1348 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
|
|
|
1349 && GET_CODE (XEXP (X, 1)) == UNSPEC \
|
|
|
1350 && (TARGET_SOFT_FLOAT \
|
|
|
1351 || (TARGET_PA_20 && !TARGET_ELF32) \
|
|
|
1352 || ((MODE) != SFmode \
|
|
|
1353 && (MODE) != DFmode))) \
|
|
|
1354 goto ADDR; \
|
|
|
1355 }
|
|
|
1356
|
|
|
1357 /* Look for machine dependent ways to make the invalid address AD a
|
|
|
1358 valid address.
|
|
|
1359
|
|
|
1360 For the PA, transform:
|
|
|
1361
|
|
|
1362 memory(X + <large int>)
|
|
|
1363
|
|
|
1364 into:
|
|
|
1365
|
|
|
1366 if (<large int> & mask) >= 16
|
|
|
1367 Y = (<large int> & ~mask) + mask + 1 Round up.
|
|
|
1368 else
|
|
|
1369 Y = (<large int> & ~mask) Round down.
|
|
|
1370 Z = X + Y
|
|
|
1371 memory (Z + (<large int> - Y));
|
|
|
1372
|
|
|
1373 This makes reload inheritance and reload_cse work better since Z
|
|
|
1374 can be reused.
|
|
|
1375
|
|
|
1376 There may be more opportunities to improve code with this hook. */
|
|
|
1377 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \
|
|
|
1378 do { \
|
|
|
1379 long offset, newoffset, mask; \
|
|
|
1380 rtx new_rtx, temp = NULL_RTX; \
|
|
|
1381 \
|
|
|
1382 mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT \
|
|
|
1383 ? (INT14_OK_STRICT ? 0x3fff : 0x1f) : 0x3fff); \
|
|
|
1384 \
|
|
|
1385 if (optimize && GET_CODE (AD) == PLUS) \
|
|
|
1386 temp = simplify_binary_operation (PLUS, Pmode, \
|
|
|
1387 XEXP (AD, 0), XEXP (AD, 1)); \
|
|
|
1388 \
|
|
|
1389 new_rtx = temp ? temp : AD; \
|
|
|
1390 \
|
|
|
1391 if (optimize \
|
|
|
1392 && GET_CODE (new_rtx) == PLUS \
|
|
|
1393 && GET_CODE (XEXP (new_rtx, 0)) == REG \
|
|
|
1394 && GET_CODE (XEXP (new_rtx, 1)) == CONST_INT) \
|
|
|
1395 { \
|
|
|
1396 offset = INTVAL (XEXP ((new_rtx), 1)); \
|
|
|
1397 \
|
|
|
1398 /* Choose rounding direction. Round up if we are >= halfway. */ \
|
|
|
1399 if ((offset & mask) >= ((mask + 1) / 2)) \
|
|
|
1400 newoffset = (offset & ~mask) + mask + 1; \
|
|
|
1401 else \
|
|
|
1402 newoffset = offset & ~mask; \
|
|
|
1403 \
|
|
|
1404 /* Ensure that long displacements are aligned. */ \
|
|
|
1405 if (mask == 0x3fff \
|
|
|
1406 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
|
|
|
1407 || (TARGET_64BIT && (MODE) == DImode))) \
|
|
|
1408 newoffset &= ~(GET_MODE_SIZE (MODE) - 1); \
|
|
|
1409 \
|
|
|
1410 if (newoffset != 0 && VAL_14_BITS_P (newoffset)) \
|
|
|
1411 { \
|
|
|
1412 temp = gen_rtx_PLUS (Pmode, XEXP (new_rtx, 0), \
|
|
|
1413 GEN_INT (newoffset)); \
|
|
|
1414 AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\
|
|
|
1415 push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0, \
|
|
|
1416 BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, \
|
|
|
1417 (OPNUM), (TYPE)); \
|
|
|
1418 goto WIN; \
|
|
|
1419 } \
|
|
|
1420 } \
|
|
|
1421 } while (0)
|
|
|
1422
|
|
|
1423
|
|
|
1424
|
|
|
1425
|
|
|
1426 /* Try machine-dependent ways of modifying an illegitimate address
|
|
|
1427 to be legitimate. If we find one, return the new, valid address.
|
|
|
1428 This macro is used in only one place: `memory_address' in explow.c.
|
|
|
1429
|
|
|
1430 OLDX is the address as it was before break_out_memory_refs was called.
|
|
|
1431 In some cases it is useful to look at this to decide what needs to be done.
|
|
|
1432
|
|
|
1433 MODE and WIN are passed so that this macro can use
|
|
|
1434 GO_IF_LEGITIMATE_ADDRESS.
|
|
|
1435
|
|
|
1436 It is always safe for this macro to do nothing. It exists to recognize
|
|
|
1437 opportunities to optimize the output. */
|
|
|
1438
|
|
|
1439 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
|
|
|
1440 { rtx orig_x = (X); \
|
|
|
1441 (X) = hppa_legitimize_address (X, OLDX, MODE); \
|
|
|
1442 if ((X) != orig_x && memory_address_p (MODE, X)) \
|
|
|
1443 goto WIN; }
|
|
|
1444
|
|
|
1445 /* Go to LABEL if ADDR (a legitimate address expression)
|
|
|
1446 has an effect that depends on the machine mode it is used for. */
|
|
|
1447
|
|
|
1448 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
|
|
|
1449
|
|
|
1450 #define TARGET_ASM_SELECT_SECTION pa_select_section
|
|
|
1451
|
|
|
1452 /* Return a nonzero value if DECL has a section attribute. */
|
|
|
1453 #define IN_NAMED_SECTION_P(DECL) \
|
|
|
1454 ((TREE_CODE (DECL) == FUNCTION_DECL || TREE_CODE (DECL) == VAR_DECL) \
|
|
|
1455 && DECL_SECTION_NAME (DECL) != NULL_TREE)
|
|
|
1456
|
|
|
1457 /* Define this macro if references to a symbol must be treated
|
|
|
1458 differently depending on something about the variable or
|
|
|
1459 function named by the symbol (such as what section it is in).
|
|
|
1460
|
|
|
1461 The macro definition, if any, is executed immediately after the
|
|
|
1462 rtl for DECL or other node is created.
|
|
|
1463 The value of the rtl will be a `mem' whose address is a
|
|
|
1464 `symbol_ref'.
|
|
|
1465
|
|
|
1466 The usual thing for this macro to do is to a flag in the
|
|
|
1467 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
|
|
|
1468 name string in the `symbol_ref' (if one bit is not enough
|
|
|
1469 information).
|
|
|
1470
|
|
|
1471 On the HP-PA we use this to indicate if a symbol is in text or
|
|
|
1472 data space. Also, function labels need special treatment. */
|
|
|
1473
|
|
|
1474 #define TEXT_SPACE_P(DECL)\
|
|
|
1475 (TREE_CODE (DECL) == FUNCTION_DECL \
|
|
|
1476 || (TREE_CODE (DECL) == VAR_DECL \
|
|
|
1477 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
|
|
|
1478 && (! DECL_INITIAL (DECL) || ! reloc_needed (DECL_INITIAL (DECL))) \
|
|
|
1479 && !flag_pic) \
|
|
|
1480 || CONSTANT_CLASS_P (DECL))
|
|
|
1481
|
|
|
1482 #define FUNCTION_NAME_P(NAME) (*(NAME) == '@')
|
|
|
1483
|
|
|
1484 /* Specify the machine mode that this machine uses for the index in the
|
|
|
1485 tablejump instruction. For small tables, an element consists of a
|
|
|
1486 ia-relative branch and its delay slot. When -mbig-switch is specified,
|
|
|
1487 we use a 32-bit absolute address for non-pic code, and a 32-bit offset
|
|
|
1488 for both 32 and 64-bit pic code. */
|
|
|
1489 #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? SImode : DImode)
|
|
|
1490
|
|
|
1491 /* Jump tables must be 32-bit aligned, no matter the size of the element. */
|
|
|
1492 #define ADDR_VEC_ALIGN(ADDR_VEC) 2
|
|
|
1493
|
|
|
1494 /* Define this as 1 if `char' should by default be signed; else as 0. */
|
|
|
1495 #define DEFAULT_SIGNED_CHAR 1
|
|
|
1496
|
|
|
1497 /* Max number of bytes we can move from memory to memory
|
|
|
1498 in one reasonably fast instruction. */
|
|
|
1499 #define MOVE_MAX 8
|
|
|
1500
|
|
|
1501 /* Higher than the default as we prefer to use simple move insns
|
|
|
1502 (better scheduling and delay slot filling) and because our
|
|
|
1503 built-in block move is really a 2X unrolled loop.
|
|
|
1504
|
|
|
1505 Believe it or not, this has to be big enough to allow for copying all
|
|
|
1506 arguments passed in registers to avoid infinite recursion during argument
|
|
|
1507 setup for a function call. Why? Consider how we copy the stack slots
|
|
|
1508 reserved for parameters when they may be trashed by a call. */
|
|
|
1509 #define MOVE_RATIO(speed) (TARGET_64BIT ? 8 : 4)
|
|
|
1510
|
|
|
1511 /* Define if operations between registers always perform the operation
|
|
|
1512 on the full register even if a narrower mode is specified. */
|
|
|
1513 #define WORD_REGISTER_OPERATIONS
|
|
|
1514
|
|
|
1515 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
|
|
|
1516 will either zero-extend or sign-extend. The value of this macro should
|
|
|
1517 be the code that says which one of the two operations is implicitly
|
|
|
1518 done, UNKNOWN if none. */
|
|
|
1519 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
|
|
|
1520
|
|
|
1521 /* Nonzero if access to memory by bytes is slow and undesirable. */
|
|
|
1522 #define SLOW_BYTE_ACCESS 1
|
|
|
1523
|
|
|
1524 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
|
|
|
1525 is done just by pretending it is already truncated. */
|
|
|
1526 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
|
|
|
1527
|
|
|
1528 /* Specify the machine mode that pointers have.
|
|
|
1529 After generation of rtl, the compiler makes no further distinction
|
|
|
1530 between pointers and any other objects of this machine mode. */
|
|
|
1531 #define Pmode word_mode
|
|
|
1532
|
|
|
1533 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
|
|
|
1534 return the mode to be used for the comparison. For floating-point, CCFPmode
|
|
|
1535 should be used. CC_NOOVmode should be used when the first operand is a
|
|
|
1536 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
|
|
|
1537 needed. */
|
|
|
1538 #define SELECT_CC_MODE(OP,X,Y) \
|
|
|
1539 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
|
|
|
1540
|
|
|
1541 /* A function address in a call instruction
|
|
|
1542 is a byte address (for indexing purposes)
|
|
|
1543 so give the MEM rtx a byte's mode. */
|
|
|
1544 #define FUNCTION_MODE SImode
|
|
|
1545
|
|
|
1546 /* Define this if addresses of constant functions
|
|
|
1547 shouldn't be put through pseudo regs where they can be cse'd.
|
|
|
1548 Desirable on machines where ordinary constants are expensive
|
|
|
1549 but a CALL with constant address is cheap. */
|
|
|
1550 #define NO_FUNCTION_CSE
|
|
|
1551
|
|
|
1552 /* Define this to be nonzero if shift instructions ignore all but the low-order
|
|
|
1553 few bits. */
|
|
|
1554 #define SHIFT_COUNT_TRUNCATED 1
|
|
|
1555
|
|
|
1556 /* Compute extra cost of moving data between one register class
|
|
|
1557 and another.
|
|
|
1558
|
|
|
1559 Make moves from SAR so expensive they should never happen. We used to
|
|
|
1560 have 0xffff here, but that generates overflow in rare cases.
|
|
|
1561
|
|
|
1562 Copies involving a FP register and a non-FP register are relatively
|
|
|
1563 expensive because they must go through memory.
|
|
|
1564
|
|
|
1565 Other copies are reasonably cheap. */
|
|
|
1566 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
|
|
|
1567 (CLASS1 == SHIFT_REGS ? 0x100 \
|
|
|
1568 : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
|
|
|
1569 : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
|
|
|
1570 : 2)
|
|
|
1571
|
|
|
1572 /* Adjust the cost of branches. */
|
|
|
1573 #define BRANCH_COST(speed_p, predictable_p) (pa_cpu == PROCESSOR_8000 ? 2 : 1)
|
|
|
1574
|
|
|
1575 /* Handling the special cases is going to get too complicated for a macro,
|
|
|
1576 just call `pa_adjust_insn_length' to do the real work. */
|
|
|
1577 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
|
|
|
1578 LENGTH += pa_adjust_insn_length (INSN, LENGTH);
|
|
|
1579
|
|
|
1580 /* Millicode insns are actually function calls with some special
|
|
|
1581 constraints on arguments and register usage.
|
|
|
1582
|
|
|
1583 Millicode calls always expect their arguments in the integer argument
|
|
|
1584 registers, and always return their result in %r29 (ret1). They
|
|
|
1585 are expected to clobber their arguments, %r1, %r29, and the return
|
|
|
1586 pointer which is %r31 on 32-bit and %r2 on 64-bit, and nothing else.
|
|
|
1587
|
|
|
1588 This macro tells reorg that the references to arguments and
|
|
|
1589 millicode calls do not appear to happen until after the millicode call.
|
|
|
1590 This allows reorg to put insns which set the argument registers into the
|
|
|
1591 delay slot of the millicode call -- thus they act more like traditional
|
|
|
1592 CALL_INSNs.
|
|
|
1593
|
|
|
1594 Note we cannot consider side effects of the insn to be delayed because
|
|
|
1595 the branch and link insn will clobber the return pointer. If we happened
|
|
|
1596 to use the return pointer in the delay slot of the call, then we lose.
|
|
|
1597
|
|
|
1598 get_attr_type will try to recognize the given insn, so make sure to
|
|
|
1599 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
|
|
|
1600 in particular. */
|
|
|
1601 #define INSN_REFERENCES_ARE_DELAYED(X) (insn_refs_are_delayed (X))
|
|
|
1602
|
|
|
1603
|
|
|
1604 /* Control the assembler format that we output. */
|
|
|
1605
|
|
|
1606 /* A C string constant describing how to begin a comment in the target
|
|
|
1607 assembler language. The compiler assumes that the comment will end at
|
|
|
1608 the end of the line. */
|
|
|
1609
|
|
|
1610 #define ASM_COMMENT_START ";"
|
|
|
1611
|
|
|
1612 /* Output to assembler file text saying following lines
|
|
|
1613 may contain character constants, extra white space, comments, etc. */
|
|
|
1614
|
|
|
1615 #define ASM_APP_ON ""
|
|
|
1616
|
|
|
1617 /* Output to assembler file text saying following lines
|
|
|
1618 no longer contain unusual constructs. */
|
|
|
1619
|
|
|
1620 #define ASM_APP_OFF ""
|
|
|
1621
|
|
|
1622 /* This is how to output the definition of a user-level label named NAME,
|
|
|
1623 such as the label on a static function or variable NAME. */
|
|
|
1624
|
|
|
1625 #define ASM_OUTPUT_LABEL(FILE,NAME) \
|
|
|
1626 do { \
|
|
|
1627 assemble_name ((FILE), (NAME)); \
|
|
|
1628 if (TARGET_GAS) \
|
|
|
1629 fputs (":\n", (FILE)); \
|
|
|
1630 else \
|
|
|
1631 fputc ('\n', (FILE)); \
|
|
|
1632 } while (0)
|
|
|
1633
|
|
|
1634 /* This is how to output a reference to a user-level label named NAME.
|
|
|
1635 `assemble_name' uses this. */
|
|
|
1636
|
|
|
1637 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
|
|
|
1638 do { \
|
|
|
1639 const char *xname = (NAME); \
|
|
|
1640 if (FUNCTION_NAME_P (NAME)) \
|
|
|
1641 xname += 1; \
|
|
|
1642 if (xname[0] == '*') \
|
|
|
1643 xname += 1; \
|
|
|
1644 else \
|
|
|
1645 fputs (user_label_prefix, FILE); \
|
|
|
1646 fputs (xname, FILE); \
|
|
|
1647 } while (0)
|
|
|
1648
|
|
|
1649 /* This how we output the symbol_ref X. */
|
|
|
1650
|
|
|
1651 #define ASM_OUTPUT_SYMBOL_REF(FILE,X) \
|
|
|
1652 do { \
|
|
|
1653 SYMBOL_REF_FLAGS (X) |= SYMBOL_FLAG_REFERENCED; \
|
|
|
1654 assemble_name (FILE, XSTR (X, 0)); \
|
|
|
1655 } while (0)
|
|
|
1656
|
|
|
1657 /* This is how to store into the string LABEL
|
|
|
1658 the symbol_ref name of an internal numbered label where
|
|
|
1659 PREFIX is the class of label and NUM is the number within the class.
|
|
|
1660 This is suitable for output with `assemble_name'. */
|
|
|
1661
|
|
|
1662 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
|
|
|
1663 sprintf (LABEL, "*%c$%s%04ld", (PREFIX)[0], (PREFIX) + 1, (long)(NUM))
|
|
|
1664
|
|
|
1665 /* Output the definition of a compiler-generated label named NAME. */
|
|
|
1666
|
|
|
1667 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,NAME) \
|
|
|
1668 do { \
|
|
|
1669 assemble_name_raw ((FILE), (NAME)); \
|
|
|
1670 if (TARGET_GAS) \
|
|
|
1671 fputs (":\n", (FILE)); \
|
|
|
1672 else \
|
|
|
1673 fputc ('\n', (FILE)); \
|
|
|
1674 } while (0)
|
|
|
1675
|
|
|
1676 #define TARGET_ASM_GLOBALIZE_LABEL pa_globalize_label
|
|
|
1677
|
|
|
1678 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
|
|
|
1679 output_ascii ((FILE), (P), (SIZE))
|
|
|
1680
|
|
|
1681 /* Jump tables are always placed in the text section. Technically, it
|
|
|
1682 is possible to put them in the readonly data section when -mbig-switch
|
|
|
1683 is specified. This has the benefit of getting the table out of .text
|
|
|
1684 and reducing branch lengths as a result. The downside is that an
|
|
|
1685 additional insn (addil) is needed to access the table when generating
|
|
|
1686 PIC code. The address difference table also has to use 32-bit
|
|
|
1687 pc-relative relocations. Currently, GAS does not support these
|
|
|
1688 relocations, although it is easily modified to do this operation.
|
|
|
1689 The table entries need to look like "$L1+(.+8-$L0)-$PIC_pcrel$0"
|
|
|
1690 when using ELF GAS. A simple difference can be used when using
|
|
|
1691 SOM GAS or the HP assembler. The final downside is GDB complains
|
|
|
1692 about the nesting of the label for the table when debugging. */
|
|
|
1693
|
|
|
1694 #define JUMP_TABLES_IN_TEXT_SECTION 1
|
|
|
1695
|
|
|
1696 /* This is how to output an element of a case-vector that is absolute. */
|
|
|
1697
|
|
|
1698 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
|
|
|
1699 if (TARGET_BIG_SWITCH) \
|
|
|
1700 fprintf (FILE, "\t.word L$%04d\n", VALUE); \
|
|
|
1701 else \
|
|
|
1702 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
|
|
|
1703
|
|
|
1704 /* This is how to output an element of a case-vector that is relative.
|
|
|
1705 Since we always place jump tables in the text section, the difference
|
|
|
1706 is absolute and requires no relocation. */
|
|
|
1707
|
|
|
1708 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
|
|
|
1709 if (TARGET_BIG_SWITCH) \
|
|
|
1710 fprintf (FILE, "\t.word L$%04d-L$%04d\n", VALUE, REL); \
|
|
|
1711 else \
|
|
|
1712 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
|
|
|
1713
|
|
|
1714 /* This is how to output an assembler line that says to advance the
|
|
|
1715 location counter to a multiple of 2**LOG bytes. */
|
|
|
1716
|
|
|
1717 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
|
|
|
1718 fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
|
|
|
1719
|
|
|
1720 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
|
|
|
1721 fprintf (FILE, "\t.blockz "HOST_WIDE_INT_PRINT_UNSIGNED"\n", \
|
|
|
1722 (unsigned HOST_WIDE_INT)(SIZE))
|
|
|
1723
|
|
|
1724 /* This says how to output an assembler line to define an uninitialized
|
|
|
1725 global variable with size SIZE (in bytes) and alignment ALIGN (in bits).
|
|
|
1726 This macro exists to properly support languages like C++ which do not
|
|
|
1727 have common data. */
|
|
|
1728
|
|
|
1729 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
|
|
|
1730 pa_asm_output_aligned_bss (FILE, NAME, SIZE, ALIGN)
|
|
|
1731
|
|
|
1732 /* This says how to output an assembler line to define a global common symbol
|
|
|
1733 with size SIZE (in bytes) and alignment ALIGN (in bits). */
|
|
|
1734
|
|
|
1735 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
|
|
|
1736 pa_asm_output_aligned_common (FILE, NAME, SIZE, ALIGN)
|
|
|
1737
|
|
|
1738 /* This says how to output an assembler line to define a local common symbol
|
|
|
1739 with size SIZE (in bytes) and alignment ALIGN (in bits). This macro
|
|
|
1740 controls how the assembler definitions of uninitialized static variables
|
|
|
1741 are output. */
|
|
|
1742
|
|
|
1743 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
|
|
|
1744 pa_asm_output_aligned_local (FILE, NAME, SIZE, ALIGN)
|
|
|
1745
|
|
|
1746 /* All HP assemblers use "!" to separate logical lines. */
|
|
|
1747 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '!')
|
|
|
1748
|
|
|
1749 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
|
|
|
1750 ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
|
|
|
1751
|
|
|
1752 /* Print operand X (an rtx) in assembler syntax to file FILE.
|
|
|
1753 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
|
|
|
1754 For `%' followed by punctuation, CODE is the punctuation and X is null.
|
|
|
1755
|
|
|
1756 On the HP-PA, the CODE can be `r', meaning this is a register-only operand
|
|
|
1757 and an immediate zero should be represented as `r0'.
|
|
|
1758
|
|
|
1759 Several % codes are defined:
|
|
|
1760 O an operation
|
|
|
1761 C compare conditions
|
|
|
1762 N extract conditions
|
|
|
1763 M modifier to handle preincrement addressing for memory refs.
|
|
|
1764 F modifier to handle preincrement addressing for fp memory refs */
|
|
|
1765
|
|
|
1766 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
|
|
|
1767
|
|
|
1768
|
|
|
1769 /* Print a memory address as an operand to reference that memory location. */
|
|
|
1770
|
|
|
1771 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
|
|
|
1772 { rtx addr = ADDR; \
|
|
|
1773 switch (GET_CODE (addr)) \
|
|
|
1774 { \
|
|
|
1775 case REG: \
|
|
|
1776 fprintf (FILE, "0(%s)", reg_names [REGNO (addr)]); \
|
|
|
1777 break; \
|
|
|
1778 case PLUS: \
|
|
|
1779 gcc_assert (GET_CODE (XEXP (addr, 1)) == CONST_INT); \
|
|
|
1780 fprintf (FILE, "%d(%s)", (int)INTVAL (XEXP (addr, 1)), \
|
|
|
1781 reg_names [REGNO (XEXP (addr, 0))]); \
|
|
|
1782 break; \
|
|
|
1783 case LO_SUM: \
|
|
|
1784 if (!symbolic_operand (XEXP (addr, 1), VOIDmode)) \
|
|
|
1785 fputs ("R'", FILE); \
|
|
|
1786 else if (flag_pic == 0) \
|
|
|
1787 fputs ("RR'", FILE); \
|
|
|
1788 else \
|
|
|
1789 fputs ("RT'", FILE); \
|
|
|
1790 output_global_address (FILE, XEXP (addr, 1), 0); \
|
|
|
1791 fputs ("(", FILE); \
|
|
|
1792 output_operand (XEXP (addr, 0), 0); \
|
|
|
1793 fputs (")", FILE); \
|
|
|
1794 break; \
|
|
|
1795 case CONST_INT: \
|
|
|
1796 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC "(%%r0)", INTVAL (addr)); \
|
|
|
1797 break; \
|
|
|
1798 default: \
|
|
|
1799 output_addr_const (FILE, addr); \
|
|
|
1800 }}
|
|
|
1801
|
|
|
1802
|
|
|
1803 /* Find the return address associated with the frame given by
|
|
|
1804 FRAMEADDR. */
|
|
|
1805 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
|
|
|
1806 (return_addr_rtx (COUNT, FRAMEADDR))
|
|
|
1807
|
|
|
1808 /* Used to mask out junk bits from the return address, such as
|
|
|
1809 processor state, interrupt status, condition codes and the like. */
|
|
|
1810 #define MASK_RETURN_ADDR \
|
|
|
1811 /* The privilege level is in the two low order bits, mask em out \
|
|
|
1812 of the return address. */ \
|
|
|
1813 (GEN_INT (-4))
|
|
|
1814
|
|
|
1815 /* The number of Pmode words for the setjmp buffer. */
|
|
|
1816 #define JMP_BUF_SIZE 50
|
|
|
1817
|
|
|
1818 /* We need a libcall to canonicalize function pointers on TARGET_ELF32. */
|
|
|
1819 #define CANONICALIZE_FUNCPTR_FOR_COMPARE_LIBCALL \
|
|
|
1820 "__canonicalize_funcptr_for_compare"
|
|
|
1821
|
|
|
1822 #ifdef HAVE_AS_TLS
|
|
|
1823 #undef TARGET_HAVE_TLS
|
|
|
1824 #define TARGET_HAVE_TLS true
|
|
|
1825 #endif
|
