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1 /* Definitions of target machine for GNU compiler, for the pdp-11
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2 Copyright (C) 1994, 1995, 1996, 1998, 1999, 2000, 2001, 2002, 2004, 2005,
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3 2006, 2007, 2008 Free Software Foundation, Inc.
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4 Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at).
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5
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6 This file is part of GCC.
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7
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8 GCC is free software; you can redistribute it and/or modify
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9 it under the terms of the GNU General Public License as published by
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10 the Free Software Foundation; either version 3, or (at your option)
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11 any later version.
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12
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13 GCC is distributed in the hope that it will be useful,
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14 but WITHOUT ANY WARRANTY; without even the implied warranty of
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15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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16 GNU General Public License for more details.
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17
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18 You should have received a copy of the GNU General Public License
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19 along with GCC; see the file COPYING3. If not see
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20 <http://www.gnu.org/licenses/>. */
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21
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22 #define CONSTANT_POOL_BEFORE_FUNCTION 0
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23
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24 /* check whether load_fpu_reg or not */
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25 #define LOAD_FPU_REG_P(x) ((x)>=8 && (x)<=11)
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26 #define NO_LOAD_FPU_REG_P(x) ((x)==12 || (x)==13)
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27 #define FPU_REG_P(x) (LOAD_FPU_REG_P(x) || NO_LOAD_FPU_REG_P(x))
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28 #define CPU_REG_P(x) ((x)<8)
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29
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30 /* Names to predefine in the preprocessor for this target machine. */
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31
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32 #define TARGET_CPU_CPP_BUILTINS() \
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33 do \
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34 { \
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35 builtin_define_std ("pdp11"); \
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36 } \
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37 while (0)
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38
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39 /* Print subsidiary information on the compiler version in use. */
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40 #define TARGET_VERSION fprintf (stderr, " (pdp11)");
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41
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42
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43 /* Generate DBX debugging information. */
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44
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45 /* #define DBX_DEBUGGING_INFO */
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46
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47 #define TARGET_40_PLUS (TARGET_40 || TARGET_45)
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48 #define TARGET_10 (! TARGET_40_PLUS)
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49
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50 #define TARGET_UNIX_ASM_DEFAULT 0
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51
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52 #define ASSEMBLER_DIALECT (TARGET_UNIX_ASM ? 1 : 0)
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53
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54
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55
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56 /* TYPE SIZES */
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57 #define SHORT_TYPE_SIZE 16
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58 #define INT_TYPE_SIZE (TARGET_INT16 ? 16 : 32)
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59 #define LONG_TYPE_SIZE 32
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60 #define LONG_LONG_TYPE_SIZE 64
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61
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62 /* if we set FLOAT_TYPE_SIZE to 32, we could have the benefit
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63 of saving core for huge arrays - the definitions are
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64 already in md - but floats can never reside in
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65 an FPU register - we keep the FPU in double float mode
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66 all the time !! */
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67 #define FLOAT_TYPE_SIZE (TARGET_FLOAT32 ? 32 : 64)
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68 #define DOUBLE_TYPE_SIZE 64
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69 #define LONG_DOUBLE_TYPE_SIZE 64
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70
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71 /* machine types from ansi */
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72 #define SIZE_TYPE "unsigned int" /* definition of size_t */
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73 #define WCHAR_TYPE "int" /* or long int???? */
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74 #define WCHAR_TYPE_SIZE 16
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75
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76 #define PTRDIFF_TYPE "int"
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77
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78 /* target machine storage layout */
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79
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80 /* Define this if most significant bit is lowest numbered
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81 in instructions that operate on numbered bit-fields. */
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82 #define BITS_BIG_ENDIAN 0
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83
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84 /* Define this if most significant byte of a word is the lowest numbered. */
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85 #define BYTES_BIG_ENDIAN 0
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86
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87 /* Define this if most significant word of a multiword number is first. */
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88 #define WORDS_BIG_ENDIAN 1
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89
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90 /* Define that floats are in VAX order, not high word first as for ints. */
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91 #define FLOAT_WORDS_BIG_ENDIAN 0
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92
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93 /* Width of a word, in units (bytes).
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94
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95 UNITS OR BYTES - seems like units */
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96 #define UNITS_PER_WORD 2
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97
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98 /* This machine doesn't use IEEE floats. */
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99 /* Because the pdp11 (at least Unix) convention for 32-bit ints is
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100 big endian, opposite for what you need for float, the vax float
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101 conversion routines aren't actually used directly. But the underlying
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102 format is indeed the vax/pdp11 float format. */
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103 extern const struct real_format pdp11_f_format;
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104 extern const struct real_format pdp11_d_format;
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105
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106 /* Maximum sized of reasonable data type
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107 DImode or Dfmode ...*/
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108 #define MAX_FIXED_MODE_SIZE 64
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109
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110 /* Allocation boundary (in *bits*) for storing pointers in memory. */
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111 #define POINTER_BOUNDARY 16
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112
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113 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
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114 #define PARM_BOUNDARY 16
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115
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116 /* Boundary (in *bits*) on which stack pointer should be aligned. */
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117 #define STACK_BOUNDARY 16
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118
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119 /* Allocation boundary (in *bits*) for the code of a function. */
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120 #define FUNCTION_BOUNDARY 16
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121
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122 /* Alignment of field after `int : 0' in a structure. */
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123 #define EMPTY_FIELD_BOUNDARY 16
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124
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125 /* No data type wants to be aligned rounder than this. */
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126 #define BIGGEST_ALIGNMENT 16
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127
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128 /* Define this if move instructions will actually fail to work
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129 when given unaligned data. */
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130 #define STRICT_ALIGNMENT 1
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131
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132 /* Standard register usage. */
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133
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134 /* Number of actual hardware registers.
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135 The hardware registers are assigned numbers for the compiler
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136 from 0 to just below FIRST_PSEUDO_REGISTER.
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137 All registers that the compiler knows about must be given numbers,
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138 even those that are not normally considered general registers.
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139
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140 we have 8 integer registers, plus 6 float
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141 (don't use scratch float !) */
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142
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143 #define FIRST_PSEUDO_REGISTER 14
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144
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145 /* 1 for registers that have pervasive standard uses
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146 and are not available for the register allocator.
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147
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148 On the pdp, these are:
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149 Reg 7 = pc;
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150 reg 6 = sp;
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151 reg 5 = fp; not necessarily!
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152 */
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153
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154 /* don't let them touch fp regs for the time being !*/
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155
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156 #define FIXED_REGISTERS \
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157 {0, 0, 0, 0, 0, 0, 1, 1, \
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158 0, 0, 0, 0, 0, 0 }
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159
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160
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161
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162 /* 1 for registers not available across function calls.
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163 These must include the FIXED_REGISTERS and also any
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164 registers that can be used without being saved.
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165 The latter must include the registers where values are returned
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166 and the register where structure-value addresses are passed.
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167 Aside from that, you can include as many other registers as you like. */
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168
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169 /* don't know about fp */
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170 #define CALL_USED_REGISTERS \
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171 {1, 1, 0, 0, 0, 0, 1, 1, \
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172 0, 0, 0, 0, 0, 0 }
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173
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174
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175 /* Make sure everything's fine if we *don't* have an FPU.
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176 This assumes that putting a register in fixed_regs will keep the
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177 compiler's mitts completely off it. We don't bother to zero it out
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178 of register classes. Also fix incompatible register naming with
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179 the UNIX assembler.
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180 */
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181 #define CONDITIONAL_REGISTER_USAGE \
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182 { \
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183 int i; \
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184 HARD_REG_SET x; \
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185 if (!TARGET_FPU) \
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186 { \
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187 COPY_HARD_REG_SET (x, reg_class_contents[(int)FPU_REGS]); \
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188 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
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189 if (TEST_HARD_REG_BIT (x, i)) \
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190 fixed_regs[i] = call_used_regs[i] = 1; \
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191 } \
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192 \
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193 if (TARGET_AC0) \
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194 call_used_regs[8] = 1; \
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195 if (TARGET_UNIX_ASM) \
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196 { \
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197 /* Change names of FPU registers for the UNIX assembler. */ \
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198 reg_names[8] = "fr0"; \
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199 reg_names[9] = "fr1"; \
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200 reg_names[10] = "fr2"; \
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201 reg_names[11] = "fr3"; \
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202 reg_names[12] = "fr4"; \
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203 reg_names[13] = "fr5"; \
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204 } \
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205 }
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206
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207 /* Return number of consecutive hard regs needed starting at reg REGNO
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208 to hold something of mode MODE.
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209 This is ordinarily the length in words of a value of mode MODE
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210 but can be less for certain modes in special long registers.
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211 */
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212
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213 #define HARD_REGNO_NREGS(REGNO, MODE) \
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214 ((REGNO < 8)? \
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215 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) \
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216 :1)
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217
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218
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219 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
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220 On the pdp, the cpu registers can hold any mode - check alignment
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221
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222 FPU can only hold DF - simplifies life!
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223 */
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224 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
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225 (((REGNO) < 8)? \
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226 ((GET_MODE_BITSIZE(MODE) <= 16) \
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227 || (GET_MODE_BITSIZE(MODE) == 32 && !((REGNO) & 1))) \
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228 :(MODE) == DFmode)
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229
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230
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231 /* Value is 1 if it is a good idea to tie two pseudo registers
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232 when one has mode MODE1 and one has mode MODE2.
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233 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
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234 for any hard reg, then this must be 0 for correct output. */
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235 #define MODES_TIEABLE_P(MODE1, MODE2) 0
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236
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237 /* Specify the registers used for certain standard purposes.
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238 The values of these macros are register numbers. */
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239
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240 /* the pdp11 pc overloaded on a register that the compiler knows about. */
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241 #define PC_REGNUM 7
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242
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243 /* Register to use for pushing function arguments. */
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244 #define STACK_POINTER_REGNUM 6
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245
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246 /* Base register for access to local variables of the function. */
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247 #define FRAME_POINTER_REGNUM 5
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248
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249 /* Value should be nonzero if functions must have frame pointers.
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250 Zero means the frame pointer need not be set up (and parms
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251 may be accessed via the stack pointer) in functions that seem suitable.
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252 This is computed in `reload', in reload1.c.
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253 */
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254
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255 #define FRAME_POINTER_REQUIRED 0
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256
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257 /* Base register for access to arguments of the function. */
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258 #define ARG_POINTER_REGNUM 5
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259
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260 /* Register in which static-chain is passed to a function. */
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261 /* ??? - i don't want to give up a reg for this! */
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262 #define STATIC_CHAIN_REGNUM 4
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263
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264 /* Define the classes of registers for register constraints in the
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265 machine description. Also define ranges of constants.
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266
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267 One of the classes must always be named ALL_REGS and include all hard regs.
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268 If there is more than one class, another class must be named NO_REGS
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269 and contain no registers.
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270
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271 The name GENERAL_REGS must be the name of a class (or an alias for
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272 another name such as ALL_REGS). This is the class of registers
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273 that is allowed by "g" or "r" in a register constraint.
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274 Also, registers outside this class are allocated only when
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275 instructions express preferences for them.
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276
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277 The classes must be numbered in nondecreasing order; that is,
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278 a larger-numbered class must never be contained completely
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279 in a smaller-numbered class.
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280
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281 For any two classes, it is very desirable that there be another
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282 class that represents their union. */
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283
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284 /* The pdp has a couple of classes:
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285
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286 MUL_REGS are used for odd numbered regs, to use in 16-bit multiplication
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287 (even numbered do 32-bit multiply)
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288 LMUL_REGS long multiply registers (even numbered regs )
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289 (don't need them, all 32-bit regs are even numbered!)
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290 GENERAL_REGS is all cpu
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291 LOAD_FPU_REGS is the first four cpu regs, they are easier to load
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292 NO_LOAD_FPU_REGS is ac4 and ac5, currently - difficult to load them
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293 FPU_REGS is all fpu regs
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294 */
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295
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296 enum reg_class { NO_REGS, MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS, FPU_REGS, ALL_REGS, LIM_REG_CLASSES };
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297
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298 #define N_REG_CLASSES (int) LIM_REG_CLASSES
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299
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300 /* have to allow this till cmpsi/tstsi are fixed in a better way !! */
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301 #define SMALL_REGISTER_CLASSES 1
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302
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303 /* Since GENERAL_REGS is the same class as ALL_REGS,
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304 don't give it a different class number; just make it an alias. */
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305
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306 /* #define GENERAL_REGS ALL_REGS */
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307
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308 /* Give names of register classes as strings for dump file. */
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309
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310 #define REG_CLASS_NAMES {"NO_REGS", "MUL_REGS", "GENERAL_REGS", "LOAD_FPU_REGS", "NO_LOAD_FPU_REGS", "FPU_REGS", "ALL_REGS" }
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311
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312 /* Define which registers fit in which classes.
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313 This is an initializer for a vector of HARD_REG_SET
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314 of length N_REG_CLASSES. */
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315
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316 #define REG_CLASS_CONTENTS {{0}, {0x00aa}, {0x00ff}, {0x0f00}, {0x3000}, {0x3f00}, {0x3fff}}
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317
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318 /* The same information, inverted:
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319 Return the class number of the smallest class containing
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320 reg number REGNO. This could be a conditional expression
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321 or could index an array. */
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322
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323 #define REGNO_REG_CLASS(REGNO) \
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324 ((REGNO)>=8?((REGNO)<=11?LOAD_FPU_REGS:NO_LOAD_FPU_REGS):(((REGNO)&1)?MUL_REGS:GENERAL_REGS))
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325
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326
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327 /* The class value for index registers, and the one for base regs. */
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328 #define INDEX_REG_CLASS GENERAL_REGS
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329 #define BASE_REG_CLASS GENERAL_REGS
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330
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331 /* Get reg_class from a letter such as appears in the machine description. */
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332
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333 #define REG_CLASS_FROM_LETTER(C) \
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334 ((C) == 'f' ? FPU_REGS : \
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335 ((C) == 'd' ? MUL_REGS : \
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336 ((C) == 'a' ? LOAD_FPU_REGS : NO_REGS)))
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337
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338
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339 /* The letters I, J, K, L and M in a register constraint string
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340 can be used to stand for particular ranges of immediate operands.
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341 This macro defines what the ranges are.
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342 C is the letter, and VALUE is a constant value.
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343 Return 1 if VALUE is in the range specified by C.
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344
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345 I bits 31-16 0000
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346 J bits 15-00 0000
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347 K completely random 32 bit
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348 L,M,N -1,1,0 respectively
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349 O where doing shifts in sequence is faster than
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350 one big shift
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351 */
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352
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353 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
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354 ((C) == 'I' ? ((VALUE) & 0xffff0000) == 0 \
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355 : (C) == 'J' ? ((VALUE) & 0x0000ffff) == 0 \
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356 : (C) == 'K' ? (((VALUE) & 0xffff0000) != 0 \
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357 && ((VALUE) & 0x0000ffff) != 0) \
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358 : (C) == 'L' ? ((VALUE) == 1) \
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359 : (C) == 'M' ? ((VALUE) == -1) \
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360 : (C) == 'N' ? ((VALUE) == 0) \
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361 : (C) == 'O' ? (abs(VALUE) >1 && abs(VALUE) <= 4) \
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362 : 0)
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363
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364 /* Similar, but for floating constants, and defining letters G and H.
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365 Here VALUE is the CONST_DOUBLE rtx itself. */
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366
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367 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
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368 ((C) == 'G' && XINT (VALUE, 0) == 0 && XINT (VALUE, 1) == 0)
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369
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370
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371 /* Letters in the range `Q' through `U' may be defined in a
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372 machine-dependent fashion to stand for arbitrary operand types.
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373 The machine description macro `EXTRA_CONSTRAINT' is passed the
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374 operand as its first argument and the constraint letter as its
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375 second operand.
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376
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377 `Q' is for memory references that require an extra word after the opcode.
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378 `R' is for memory references which are encoded within the opcode. */
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379
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380 #define EXTRA_CONSTRAINT(OP,CODE) \
|
|
|
381 ((GET_CODE (OP) != MEM) ? 0 \
|
|
|
382 : !legitimate_address_p (GET_MODE (OP), XEXP (OP, 0)) ? 0 \
|
|
|
383 : ((CODE) == 'Q') ? !simple_memory_operand (OP, GET_MODE (OP)) \
|
|
|
384 : ((CODE) == 'R') ? simple_memory_operand (OP, GET_MODE (OP)) \
|
|
|
385 : 0)
|
|
|
386
|
|
|
387 /* Given an rtx X being reloaded into a reg required to be
|
|
|
388 in class CLASS, return the class of reg to actually use.
|
|
|
389 In general this is just CLASS; but on some machines
|
|
|
390 in some cases it is preferable to use a more restrictive class.
|
|
|
391
|
|
|
392 loading is easier into LOAD_FPU_REGS than FPU_REGS! */
|
|
|
393
|
|
|
394 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
|
|
|
395 (((CLASS) != FPU_REGS)?(CLASS):LOAD_FPU_REGS)
|
|
|
396
|
|
|
397 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,x) \
|
|
|
398 (((CLASS) == NO_LOAD_FPU_REGS && !(REG_P(x) && LOAD_FPU_REG_P(REGNO(x))))?LOAD_FPU_REGS:NO_REGS)
|
|
|
399
|
|
|
400 /* Return the maximum number of consecutive registers
|
|
|
401 needed to represent mode MODE in a register of class CLASS. */
|
|
|
402 #define CLASS_MAX_NREGS(CLASS, MODE) \
|
|
|
403 ((CLASS == GENERAL_REGS || CLASS == MUL_REGS)? \
|
|
|
404 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD): \
|
|
|
405 1 \
|
|
|
406 )
|
|
|
407
|
|
|
408
|
|
|
409 /* Stack layout; function entry, exit and calling. */
|
|
|
410
|
|
|
411 /* Define this if pushing a word on the stack
|
|
|
412 makes the stack pointer a smaller address. */
|
|
|
413 #define STACK_GROWS_DOWNWARD
|
|
|
414
|
|
|
415 /* Define this to nonzero if the nominal address of the stack frame
|
|
|
416 is at the high-address end of the local variables;
|
|
|
417 that is, each additional local variable allocated
|
|
|
418 goes at a more negative offset in the frame.
|
|
|
419 */
|
|
|
420 #define FRAME_GROWS_DOWNWARD 1
|
|
|
421
|
|
|
422 /* Offset within stack frame to start allocating local variables at.
|
|
|
423 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
|
|
|
424 first local allocated. Otherwise, it is the offset to the BEGINNING
|
|
|
425 of the first local allocated. */
|
|
|
426 #define STARTING_FRAME_OFFSET 0
|
|
|
427
|
|
|
428 /* If we generate an insn to push BYTES bytes,
|
|
|
429 this says how many the stack pointer really advances by.
|
|
|
430 On the pdp11, the stack is on an even boundary */
|
|
|
431 #define PUSH_ROUNDING(BYTES) ((BYTES + 1) & ~1)
|
|
|
432
|
|
|
433 /* current_first_parm_offset stores the # of registers pushed on the
|
|
|
434 stack */
|
|
|
435 extern int current_first_parm_offset;
|
|
|
436
|
|
|
437 /* Offset of first parameter from the argument pointer register value.
|
|
|
438 For the pdp11, this is nonzero to account for the return address.
|
|
|
439 1 - return address
|
|
|
440 2 - frame pointer (always saved, even when not used!!!!)
|
|
|
441 -- change some day !!!:q!
|
|
|
442
|
|
|
443 */
|
|
|
444 #define FIRST_PARM_OFFSET(FNDECL) 4
|
|
|
445
|
|
|
446 /* Value is 1 if returning from a function call automatically
|
|
|
447 pops the arguments described by the number-of-args field in the call.
|
|
|
448 FUNDECL is the declaration node of the function (as a tree),
|
|
|
449 FUNTYPE is the data type of the function (as a tree),
|
|
|
450 or for a library call it is an identifier node for the subroutine name. */
|
|
|
451
|
|
|
452 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
|
|
|
453
|
|
|
454 /* Define how to find the value returned by a function.
|
|
|
455 VALTYPE is the data type of the value (as a tree).
|
|
|
456 If the precise function being called is known, FUNC is its FUNCTION_DECL;
|
|
|
457 otherwise, FUNC is 0. */
|
|
|
458 #define BASE_RETURN_VALUE_REG(MODE) \
|
|
|
459 ((MODE) == DFmode ? 8 : 0)
|
|
|
460
|
|
|
461 /* On the pdp11 the value is found in R0 (or ac0???
|
|
|
462 not without FPU!!!! ) */
|
|
|
463
|
|
|
464 #define FUNCTION_VALUE(VALTYPE, FUNC) \
|
|
|
465 gen_rtx_REG (TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE)))
|
|
|
466
|
|
|
467 /* and the called function leaves it in the first register.
|
|
|
468 Difference only on machines with register windows. */
|
|
|
469
|
|
|
470 #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \
|
|
|
471 gen_rtx_REG (TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE)))
|
|
|
472
|
|
|
473 /* Define how to find the value returned by a library function
|
|
|
474 assuming the value has mode MODE. */
|
|
|
475
|
|
|
476 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, BASE_RETURN_VALUE_REG(MODE))
|
|
|
477
|
|
|
478 /* 1 if N is a possible register number for a function value
|
|
|
479 as seen by the caller.
|
|
|
480 On the pdp, the first "output" reg is the only register thus used.
|
|
|
481
|
|
|
482 maybe ac0 ? - as option someday! */
|
|
|
483
|
|
|
484 #define FUNCTION_VALUE_REGNO_P(N) (((N) == 0) || (TARGET_AC0 && (N) == 8))
|
|
|
485
|
|
|
486 /* 1 if N is a possible register number for function argument passing.
|
|
|
487 - not used on pdp */
|
|
|
488
|
|
|
489 #define FUNCTION_ARG_REGNO_P(N) 0
|
|
|
490
|
|
|
491 /* Define a data type for recording info about an argument list
|
|
|
492 during the scan of that argument list. This data type should
|
|
|
493 hold all necessary information about the function itself
|
|
|
494 and about the args processed so far, enough to enable macros
|
|
|
495 such as FUNCTION_ARG to determine where the next arg should go.
|
|
|
496
|
|
|
497 */
|
|
|
498
|
|
|
499 #define CUMULATIVE_ARGS int
|
|
|
500
|
|
|
501 /* Initialize a variable CUM of type CUMULATIVE_ARGS
|
|
|
502 for a call to a function whose data type is FNTYPE.
|
|
|
503 For a library call, FNTYPE is 0.
|
|
|
504
|
|
|
505 ...., the offset normally starts at 0, but starts at 1 word
|
|
|
506 when the function gets a structure-value-address as an
|
|
|
507 invisible first argument. */
|
|
|
508
|
|
|
509 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
|
|
|
510 ((CUM) = 0)
|
|
|
511
|
|
|
512 /* Update the data in CUM to advance over an argument
|
|
|
513 of mode MODE and data type TYPE.
|
|
|
514 (TYPE is null for libcalls where that information may not be available.)
|
|
|
515
|
|
|
516 */
|
|
|
517
|
|
|
518
|
|
|
519 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
|
|
|
520 ((CUM) += ((MODE) != BLKmode \
|
|
|
521 ? (GET_MODE_SIZE (MODE)) \
|
|
|
522 : (int_size_in_bytes (TYPE))))
|
|
|
523
|
|
|
524 /* Determine where to put an argument to a function.
|
|
|
525 Value is zero to push the argument on the stack,
|
|
|
526 or a hard register in which to store the argument.
|
|
|
527
|
|
|
528 MODE is the argument's machine mode.
|
|
|
529 TYPE is the data type of the argument (as a tree).
|
|
|
530 This is null for libcalls where that information may
|
|
|
531 not be available.
|
|
|
532 CUM is a variable of type CUMULATIVE_ARGS which gives info about
|
|
|
533 the preceding args and about the function being called.
|
|
|
534 NAMED is nonzero if this argument is a named parameter
|
|
|
535 (otherwise it is an extra parameter matching an ellipsis). */
|
|
|
536
|
|
|
537 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
|
|
|
538
|
|
|
539 /* Define where a function finds its arguments.
|
|
|
540 This would be different from FUNCTION_ARG if we had register windows. */
|
|
|
541 /*
|
|
|
542 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
|
|
|
543 FUNCTION_ARG (CUM, MODE, TYPE, NAMED)
|
|
|
544 */
|
|
|
545
|
|
|
546 /* Output assembler code to FILE to increment profiler label # LABELNO
|
|
|
547 for profiling a function entry. */
|
|
|
548
|
|
|
549 #define FUNCTION_PROFILER(FILE, LABELNO) \
|
|
|
550 gcc_unreachable ();
|
|
|
551
|
|
|
552 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
|
|
|
553 the stack pointer does not matter. The value is tested only in
|
|
|
554 functions that have frame pointers.
|
|
|
555 No definition is equivalent to always zero. */
|
|
|
556
|
|
|
557 extern int may_call_alloca;
|
|
|
558
|
|
|
559 #define EXIT_IGNORE_STACK 1
|
|
|
560
|
|
|
561 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH_VAR) \
|
|
|
562 { \
|
|
|
563 int offset, regno; \
|
|
|
564 offset = get_frame_size(); \
|
|
|
565 for (regno = 0; regno < 8; regno++) \
|
|
|
566 if (df_regs_ever_live_p (regno) && ! call_used_regs[regno]) \
|
|
|
567 offset += 2; \
|
|
|
568 for (regno = 8; regno < 14; regno++) \
|
|
|
569 if (df_regs_ever_live_p (regno) && ! call_used_regs[regno]) \
|
|
|
570 offset += 8; \
|
|
|
571 /* offset -= 2; no fp on stack frame */ \
|
|
|
572 (DEPTH_VAR) = offset; \
|
|
|
573 }
|
|
|
574
|
|
|
575
|
|
|
576 /* Addressing modes, and classification of registers for them. */
|
|
|
577
|
|
|
578 #define HAVE_POST_INCREMENT 1
|
|
|
579
|
|
|
580 #define HAVE_PRE_DECREMENT 1
|
|
|
581
|
|
|
582 /* Macros to check register numbers against specific register classes. */
|
|
|
583
|
|
|
584 /* These assume that REGNO is a hard or pseudo reg number.
|
|
|
585 They give nonzero only if REGNO is a hard reg of the suitable class
|
|
|
586 or a pseudo reg currently allocated to a suitable hard reg.
|
|
|
587 Since they use reg_renumber, they are safe only once reg_renumber
|
|
|
588 has been allocated, which happens in local-alloc.c. */
|
|
|
589
|
|
|
590 #define REGNO_OK_FOR_INDEX_P(REGNO) \
|
|
|
591 ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
|
|
|
592 #define REGNO_OK_FOR_BASE_P(REGNO) \
|
|
|
593 ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
|
|
|
594
|
|
|
595 /* Now macros that check whether X is a register and also,
|
|
|
596 strictly, whether it is in a specified class.
|
|
|
597 */
|
|
|
598
|
|
|
599
|
|
|
600
|
|
|
601 /* Maximum number of registers that can appear in a valid memory address. */
|
|
|
602
|
|
|
603 #define MAX_REGS_PER_ADDRESS 1
|
|
|
604
|
|
|
605 /* Recognize any constant value that is a valid address. */
|
|
|
606
|
|
|
607 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
|
|
|
608
|
|
|
609 /* Nonzero if the constant value X is a legitimate general operand.
|
|
|
610 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
|
|
|
611
|
|
|
612 #define LEGITIMATE_CONSTANT_P(X) \
|
|
|
613 (GET_CODE (X) != CONST_DOUBLE || legitimate_const_double_p (X))
|
|
|
614
|
|
|
615 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
|
|
|
616 and check its validity for a certain class.
|
|
|
617 We have two alternate definitions for each of them.
|
|
|
618 The usual definition accepts all pseudo regs; the other rejects
|
|
|
619 them unless they have been allocated suitable hard regs.
|
|
|
620 The symbol REG_OK_STRICT causes the latter definition to be used.
|
|
|
621
|
|
|
622 Most source files want to accept pseudo regs in the hope that
|
|
|
623 they will get allocated to the class that the insn wants them to be in.
|
|
|
624 Source files for reload pass need to be strict.
|
|
|
625 After reload, it makes no difference, since pseudo regs have
|
|
|
626 been eliminated by then. */
|
|
|
627
|
|
|
628 #ifndef REG_OK_STRICT
|
|
|
629
|
|
|
630 /* Nonzero if X is a hard reg that can be used as an index
|
|
|
631 or if it is a pseudo reg. */
|
|
|
632 #define REG_OK_FOR_INDEX_P(X) (1)
|
|
|
633 /* Nonzero if X is a hard reg that can be used as a base reg
|
|
|
634 or if it is a pseudo reg. */
|
|
|
635 #define REG_OK_FOR_BASE_P(X) (1)
|
|
|
636
|
|
|
637 #else
|
|
|
638
|
|
|
639 /* Nonzero if X is a hard reg that can be used as an index. */
|
|
|
640 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
|
|
|
641 /* Nonzero if X is a hard reg that can be used as a base reg. */
|
|
|
642 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
|
|
|
643
|
|
|
644 #endif
|
|
|
645
|
|
|
646 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
|
|
|
647 that is a valid memory address for an instruction.
|
|
|
648 The MODE argument is the machine mode for the MEM expression
|
|
|
649 that wants to use this address.
|
|
|
650
|
|
|
651 */
|
|
|
652
|
|
|
653 #define GO_IF_LEGITIMATE_ADDRESS(mode, operand, ADDR) \
|
|
|
654 { \
|
|
|
655 rtx xfoob; \
|
|
|
656 \
|
|
|
657 /* accept (R0) */ \
|
|
|
658 if (GET_CODE (operand) == REG \
|
|
|
659 && REG_OK_FOR_BASE_P(operand)) \
|
|
|
660 goto ADDR; \
|
|
|
661 \
|
|
|
662 /* accept @#address */ \
|
|
|
663 if (CONSTANT_ADDRESS_P (operand)) \
|
|
|
664 goto ADDR; \
|
|
|
665 \
|
|
|
666 /* accept X(R0) */ \
|
|
|
667 if (GET_CODE (operand) == PLUS \
|
|
|
668 && GET_CODE (XEXP (operand, 0)) == REG \
|
|
|
669 && REG_OK_FOR_BASE_P (XEXP (operand, 0)) \
|
|
|
670 && CONSTANT_ADDRESS_P (XEXP (operand, 1))) \
|
|
|
671 goto ADDR; \
|
|
|
672 \
|
|
|
673 /* accept -(R0) */ \
|
|
|
674 if (GET_CODE (operand) == PRE_DEC \
|
|
|
675 && GET_CODE (XEXP (operand, 0)) == REG \
|
|
|
676 && REG_OK_FOR_BASE_P (XEXP (operand, 0))) \
|
|
|
677 goto ADDR; \
|
|
|
678 \
|
|
|
679 /* accept (R0)+ */ \
|
|
|
680 if (GET_CODE (operand) == POST_INC \
|
|
|
681 && GET_CODE (XEXP (operand, 0)) == REG \
|
|
|
682 && REG_OK_FOR_BASE_P (XEXP (operand, 0))) \
|
|
|
683 goto ADDR; \
|
|
|
684 \
|
|
|
685 /* accept -(SP) -- which uses PRE_MODIFY for byte mode */ \
|
|
|
686 if (GET_CODE (operand) == PRE_MODIFY \
|
|
|
687 && GET_CODE (XEXP (operand, 0)) == REG \
|
|
|
688 && REGNO (XEXP (operand, 0)) == 6 \
|
|
|
689 && GET_CODE ((xfoob = XEXP (operand, 1))) == PLUS \
|
|
|
690 && GET_CODE (XEXP (xfoob, 0)) == REG \
|
|
|
691 && REGNO (XEXP (xfoob, 0)) == 6 \
|
|
|
692 && CONSTANT_P (XEXP (xfoob, 1)) \
|
|
|
693 && INTVAL (XEXP (xfoob,1)) == -2) \
|
|
|
694 goto ADDR; \
|
|
|
695 \
|
|
|
696 /* accept (SP)+ -- which uses POST_MODIFY for byte mode */ \
|
|
|
697 if (GET_CODE (operand) == POST_MODIFY \
|
|
|
698 && GET_CODE (XEXP (operand, 0)) == REG \
|
|
|
699 && REGNO (XEXP (operand, 0)) == 6 \
|
|
|
700 && GET_CODE ((xfoob = XEXP (operand, 1))) == PLUS \
|
|
|
701 && GET_CODE (XEXP (xfoob, 0)) == REG \
|
|
|
702 && REGNO (XEXP (xfoob, 0)) == 6 \
|
|
|
703 && CONSTANT_P (XEXP (xfoob, 1)) \
|
|
|
704 && INTVAL (XEXP (xfoob,1)) == 2) \
|
|
|
705 goto ADDR; \
|
|
|
706 \
|
|
|
707 \
|
|
|
708 /* handle another level of indirection ! */ \
|
|
|
709 if (GET_CODE(operand) != MEM) \
|
|
|
710 goto fail; \
|
|
|
711 \
|
|
|
712 xfoob = XEXP (operand, 0); \
|
|
|
713 \
|
|
|
714 /* (MEM:xx (MEM:xx ())) is not valid for SI, DI and currently */ \
|
|
|
715 /* also forbidden for float, because we have to handle this */ \
|
|
|
716 /* in output_move_double and/or output_move_quad() - we could */ \
|
|
|
717 /* do it, but currently it's not worth it!!! */ \
|
|
|
718 /* now that DFmode cannot go into CPU register file, */ \
|
|
|
719 /* maybe I should allow float ... */ \
|
|
|
720 /* but then I have to handle memory-to-memory moves in movdf ?? */ \
|
|
|
721 \
|
|
|
722 if (GET_MODE_BITSIZE(mode) > 16) \
|
|
|
723 goto fail; \
|
|
|
724 \
|
|
|
725 /* accept @(R0) - which is @0(R0) */ \
|
|
|
726 if (GET_CODE (xfoob) == REG \
|
|
|
727 && REG_OK_FOR_BASE_P(xfoob)) \
|
|
|
728 goto ADDR; \
|
|
|
729 \
|
|
|
730 /* accept @address */ \
|
|
|
731 if (CONSTANT_ADDRESS_P (xfoob)) \
|
|
|
732 goto ADDR; \
|
|
|
733 \
|
|
|
734 /* accept @X(R0) */ \
|
|
|
735 if (GET_CODE (xfoob) == PLUS \
|
|
|
736 && GET_CODE (XEXP (xfoob, 0)) == REG \
|
|
|
737 && REG_OK_FOR_BASE_P (XEXP (xfoob, 0)) \
|
|
|
738 && CONSTANT_ADDRESS_P (XEXP (xfoob, 1))) \
|
|
|
739 goto ADDR; \
|
|
|
740 \
|
|
|
741 /* accept @-(R0) */ \
|
|
|
742 if (GET_CODE (xfoob) == PRE_DEC \
|
|
|
743 && GET_CODE (XEXP (xfoob, 0)) == REG \
|
|
|
744 && REG_OK_FOR_BASE_P (XEXP (xfoob, 0))) \
|
|
|
745 goto ADDR; \
|
|
|
746 \
|
|
|
747 /* accept @(R0)+ */ \
|
|
|
748 if (GET_CODE (xfoob) == POST_INC \
|
|
|
749 && GET_CODE (XEXP (xfoob, 0)) == REG \
|
|
|
750 && REG_OK_FOR_BASE_P (XEXP (xfoob, 0))) \
|
|
|
751 goto ADDR; \
|
|
|
752 \
|
|
|
753 /* anything else is invalid */ \
|
|
|
754 fail: ; \
|
|
|
755 }
|
|
|
756
|
|
|
757
|
|
|
758 /* Go to LABEL if ADDR (a legitimate address expression)
|
|
|
759 has an effect that depends on the machine mode it is used for.
|
|
|
760 On the pdp this is for predec/postinc, and this is now treated
|
|
|
761 generically in recog.c. */
|
|
|
762
|
|
|
763 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
|
|
|
764
|
|
|
765
|
|
|
766 /* Specify the machine mode that this machine uses
|
|
|
767 for the index in the tablejump instruction. */
|
|
|
768 #define CASE_VECTOR_MODE HImode
|
|
|
769
|
|
|
770 /* Define this if a raw index is all that is needed for a
|
|
|
771 `tablejump' insn. */
|
|
|
772 #define CASE_TAKES_INDEX_RAW
|
|
|
773
|
|
|
774 /* Define this as 1 if `char' should by default be signed; else as 0. */
|
|
|
775 #define DEFAULT_SIGNED_CHAR 1
|
|
|
776
|
|
|
777 /* Max number of bytes we can move from memory to memory
|
|
|
778 in one reasonably fast instruction.
|
|
|
779 */
|
|
|
780
|
|
|
781 #define MOVE_MAX 2
|
|
|
782
|
|
|
783 /* Nonzero if access to memory by byte is slow and undesirable. -
|
|
|
784 */
|
|
|
785 #define SLOW_BYTE_ACCESS 0
|
|
|
786
|
|
|
787 /* Do not break .stabs pseudos into continuations. */
|
|
|
788 #define DBX_CONTIN_LENGTH 0
|
|
|
789
|
|
|
790 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
|
|
|
791 is done just by pretending it is already truncated. */
|
|
|
792 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
|
|
|
793
|
|
|
794 /* Give a comparison code (EQ, NE etc) and the first operand of a COMPARE,
|
|
|
795 return the mode to be used for the comparison. For floating-point, CCFPmode
|
|
|
796 should be used. */
|
|
|
797
|
|
|
798 #define SELECT_CC_MODE(OP,X,Y) \
|
|
|
799 (GET_MODE_CLASS(GET_MODE(X)) == MODE_FLOAT? CCFPmode : CCmode)
|
|
|
800
|
|
|
801 /* Specify the machine mode that pointers have.
|
|
|
802 After generation of rtl, the compiler makes no further distinction
|
|
|
803 between pointers and any other objects of this machine mode. */
|
|
|
804 #define Pmode HImode
|
|
|
805
|
|
|
806 /* A function address in a call instruction
|
|
|
807 is a word address (for indexing purposes)
|
|
|
808 so give the MEM rtx a word's mode. */
|
|
|
809 #define FUNCTION_MODE HImode
|
|
|
810
|
|
|
811 /* Define this if addresses of constant functions
|
|
|
812 shouldn't be put through pseudo regs where they can be cse'd.
|
|
|
813 Desirable on machines where ordinary constants are expensive
|
|
|
814 but a CALL with constant address is cheap. */
|
|
|
815 /* #define NO_FUNCTION_CSE */
|
|
|
816
|
|
|
817
|
|
|
818 /* cost of moving one register class to another */
|
|
|
819 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
|
|
|
820 register_move_cost (CLASS1, CLASS2)
|
|
|
821
|
|
|
822 /* Tell emit-rtl.c how to initialize special values on a per-function base. */
|
|
|
823 extern int optimize;
|
|
|
824 extern struct rtx_def *cc0_reg_rtx;
|
|
|
825
|
|
|
826 #define CC_STATUS_MDEP rtx
|
|
|
827
|
|
|
828 #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0)
|
|
|
829
|
|
|
830 /* Tell final.c how to eliminate redundant test instructions. */
|
|
|
831
|
|
|
832 /* Here we define machine-dependent flags and fields in cc_status
|
|
|
833 (see `conditions.h'). */
|
|
|
834
|
|
|
835 #define CC_IN_FPU 04000
|
|
|
836
|
|
|
837 /* Do UPDATE_CC if EXP is a set, used in
|
|
|
838 NOTICE_UPDATE_CC
|
|
|
839
|
|
|
840 floats only do compare correctly, else nullify ...
|
|
|
841
|
|
|
842 get cc0 out soon ...
|
|
|
843 */
|
|
|
844
|
|
|
845 /* Store in cc_status the expressions
|
|
|
846 that the condition codes will describe
|
|
|
847 after execution of an instruction whose pattern is EXP.
|
|
|
848 Do not alter them if the instruction would not alter the cc's. */
|
|
|
849
|
|
|
850 #define NOTICE_UPDATE_CC(EXP, INSN) \
|
|
|
851 { if (GET_CODE (EXP) == SET) \
|
|
|
852 { \
|
|
|
853 notice_update_cc_on_set(EXP, INSN); \
|
|
|
854 } \
|
|
|
855 else if (GET_CODE (EXP) == PARALLEL \
|
|
|
856 && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \
|
|
|
857 { \
|
|
|
858 notice_update_cc_on_set(XVECEXP (EXP, 0, 0), INSN); \
|
|
|
859 } \
|
|
|
860 else if (GET_CODE (EXP) == CALL) \
|
|
|
861 { /* all bets are off */ CC_STATUS_INIT; } \
|
|
|
862 if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \
|
|
|
863 && cc_status.value2 \
|
|
|
864 && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \
|
|
|
865 { \
|
|
|
866 printf ("here!\n"); \
|
|
|
867 cc_status.value2 = 0; \
|
|
|
868 } \
|
|
|
869 }
|
|
|
870
|
|
|
871 /* Control the assembler format that we output. */
|
|
|
872
|
|
|
873 /* Output to assembler file text saying following lines
|
|
|
874 may contain character constants, extra white space, comments, etc. */
|
|
|
875
|
|
|
876 #define ASM_APP_ON ""
|
|
|
877
|
|
|
878 /* Output to assembler file text saying following lines
|
|
|
879 no longer contain unusual constructs. */
|
|
|
880
|
|
|
881 #define ASM_APP_OFF ""
|
|
|
882
|
|
|
883 /* Output before read-only data. */
|
|
|
884
|
|
|
885 #define TEXT_SECTION_ASM_OP "\t.text\n"
|
|
|
886
|
|
|
887 /* Output before writable data. */
|
|
|
888
|
|
|
889 #define DATA_SECTION_ASM_OP "\t.data\n"
|
|
|
890
|
|
|
891 /* How to refer to registers in assembler output.
|
|
|
892 This sequence is indexed by compiler's hard-register-number (see above). */
|
|
|
893
|
|
|
894 #define REGISTER_NAMES \
|
|
|
895 {"r0", "r1", "r2", "r3", "r4", "r5", "sp", "pc", \
|
|
|
896 "ac0", "ac1", "ac2", "ac3", "ac4", "ac5" }
|
|
|
897
|
|
|
898 /* Globalizing directive for a label. */
|
|
|
899 #define GLOBAL_ASM_OP "\t.globl "
|
|
|
900
|
|
|
901 /* The prefix to add to user-visible assembler symbols. */
|
|
|
902
|
|
|
903 #define USER_LABEL_PREFIX "_"
|
|
|
904
|
|
|
905 /* This is how to store into the string LABEL
|
|
|
906 the symbol_ref name of an internal numbered label where
|
|
|
907 PREFIX is the class of label and NUM is the number within the class.
|
|
|
908 This is suitable for output with `assemble_name'. */
|
|
|
909
|
|
|
910 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
|
|
|
911 sprintf (LABEL, "*%s_%lu", PREFIX, (unsigned long)(NUM))
|
|
|
912
|
|
|
913 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
|
|
|
914 output_ascii (FILE, P, SIZE)
|
|
|
915
|
|
|
916 /* This is how to output an element of a case-vector that is absolute. */
|
|
|
917
|
|
|
918 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
|
|
|
919 fprintf (FILE, "\t%sL_%d\n", TARGET_UNIX_ASM ? "" : ".word ", VALUE)
|
|
|
920
|
|
|
921 /* This is how to output an element of a case-vector that is relative.
|
|
|
922 Don't define this if it is not supported. */
|
|
|
923
|
|
|
924 /* #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) */
|
|
|
925
|
|
|
926 /* This is how to output an assembler line
|
|
|
927 that says to advance the location counter
|
|
|
928 to a multiple of 2**LOG bytes.
|
|
|
929
|
|
|
930 who needs this????
|
|
|
931 */
|
|
|
932
|
|
|
933 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
|
|
|
934 switch (LOG) \
|
|
|
935 { \
|
|
|
936 case 0: \
|
|
|
937 break; \
|
|
|
938 case 1: \
|
|
|
939 fprintf (FILE, "\t.even\n"); \
|
|
|
940 break; \
|
|
|
941 default: \
|
|
|
942 gcc_unreachable (); \
|
|
|
943 }
|
|
|
944
|
|
|
945 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
|
|
|
946 fprintf (FILE, "\t.=.+ %#ho\n", (unsigned short)(SIZE))
|
|
|
947
|
|
|
948 /* This says how to output an assembler line
|
|
|
949 to define a global common symbol. */
|
|
|
950
|
|
|
951 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
|
|
|
952 ( fprintf ((FILE), ".globl "), \
|
|
|
953 assemble_name ((FILE), (NAME)), \
|
|
|
954 fprintf ((FILE), "\n"), \
|
|
|
955 assemble_name ((FILE), (NAME)), \
|
|
|
956 fprintf ((FILE), ": .=.+ %#ho\n", (unsigned short)(ROUNDED)) \
|
|
|
957 )
|
|
|
958
|
|
|
959 /* This says how to output an assembler line
|
|
|
960 to define a local common symbol. */
|
|
|
961
|
|
|
962 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
|
|
|
963 ( assemble_name ((FILE), (NAME)), \
|
|
|
964 fprintf ((FILE), ":\t.=.+ %#ho\n", (unsigned short)(ROUNDED)))
|
|
|
965
|
|
|
966 /* Print operand X (an rtx) in assembler syntax to file FILE.
|
|
|
967 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
|
|
|
968 For `%' followed by punctuation, CODE is the punctuation and X is null.
|
|
|
969
|
|
|
970 */
|
|
|
971
|
|
|
972
|
|
|
973 #define PRINT_OPERAND(FILE, X, CODE) \
|
|
|
974 { if (CODE == '#') fprintf (FILE, "#"); \
|
|
|
975 else if (GET_CODE (X) == REG) \
|
|
|
976 fprintf (FILE, "%s", reg_names[REGNO (X)]); \
|
|
|
977 else if (GET_CODE (X) == MEM) \
|
|
|
978 output_address (XEXP (X, 0)); \
|
|
|
979 else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != SImode) \
|
|
|
980 { REAL_VALUE_TYPE r; \
|
|
|
981 long sval[2]; \
|
|
|
982 REAL_VALUE_FROM_CONST_DOUBLE (r, X); \
|
|
|
983 REAL_VALUE_TO_TARGET_DOUBLE (r, sval); \
|
|
|
984 fprintf (FILE, "$%#lo", sval[0] >> 16); } \
|
|
|
985 else { putc ('$', FILE); output_addr_const_pdp11 (FILE, X); }}
|
|
|
986
|
|
|
987 /* Print a memory address as an operand to reference that memory location. */
|
|
|
988
|
|
|
989 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
|
|
|
990 print_operand_address (FILE, ADDR)
|
|
|
991
|
|
|
992 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
|
|
|
993 ( \
|
|
|
994 fprintf (FILE, "\tmov %s, -(sp)\n", reg_names[REGNO]) \
|
|
|
995 )
|
|
|
996
|
|
|
997 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
|
|
|
998 ( \
|
|
|
999 fprintf (FILE, "\tmov (sp)+, %s\n", reg_names[REGNO]) \
|
|
|
1000 )
|
|
|
1001
|
|
|
1002 /* trampoline - how should i do it in separate i+d ?
|
|
|
1003 have some allocate_trampoline magic???
|
|
|
1004
|
|
|
1005 the following should work for shared I/D: */
|
|
|
1006
|
|
|
1007 /* lets see whether this works as trampoline:
|
|
|
1008 MV #STATIC, $4 0x940Y 0x0000 <- STATIC; Y = STATIC_CHAIN_REGNUM
|
|
|
1009 JMP FUNCTION 0x0058 0x0000 <- FUNCTION
|
|
|
1010 */
|
|
|
1011
|
|
|
1012 #define TRAMPOLINE_TEMPLATE(FILE) \
|
|
|
1013 { \
|
|
|
1014 gcc_assert (!TARGET_SPLIT); \
|
|
|
1015 \
|
|
|
1016 assemble_aligned_integer (2, GEN_INT (0x9400+STATIC_CHAIN_REGNUM)); \
|
|
|
1017 assemble_aligned_integer (2, const0_rtx); \
|
|
|
1018 assemble_aligned_integer (2, GEN_INT(0x0058)); \
|
|
|
1019 assemble_aligned_integer (2, const0_rtx); \
|
|
|
1020 }
|
|
|
1021
|
|
|
1022 #define TRAMPOLINE_SIZE 8
|
|
|
1023 #define TRAMPOLINE_ALIGNMENT 16
|
|
|
1024
|
|
|
1025 /* Emit RTL insns to initialize the variable parts of a trampoline.
|
|
|
1026 FNADDR is an RTX for the address of the function's pure code.
|
|
|
1027 CXT is an RTX for the static chain value for the function. */
|
|
|
1028
|
|
|
1029 #define INITIALIZE_TRAMPOLINE(TRAMP,FNADDR,CXT) \
|
|
|
1030 { \
|
|
|
1031 gcc_assert (!TARGET_SPLIT); \
|
|
|
1032 \
|
|
|
1033 emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 2)), CXT); \
|
|
|
1034 emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 6)), FNADDR); \
|
|
|
1035 }
|
|
|
1036
|
|
|
1037
|
|
|
1038 /* Some machines may desire to change what optimizations are
|
|
|
1039 performed for various optimization levels. This macro, if
|
|
|
1040 defined, is executed once just after the optimization level is
|
|
|
1041 determined and before the remainder of the command options have
|
|
|
1042 been parsed. Values set in this macro are used as the default
|
|
|
1043 values for the other command line options.
|
|
|
1044
|
|
|
1045 LEVEL is the optimization level specified; 2 if -O2 is
|
|
|
1046 specified, 1 if -O is specified, and 0 if neither is specified. */
|
|
|
1047
|
|
|
1048 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \
|
|
|
1049 { \
|
|
|
1050 if (LEVEL >= 3) \
|
|
|
1051 { \
|
|
|
1052 flag_omit_frame_pointer = 1; \
|
|
|
1053 /* flag_unroll_loops = 1; */ \
|
|
|
1054 } \
|
|
|
1055 }
|
|
|
1056
|
|
|
1057 /* there is no point in avoiding branches on a pdp,
|
|
|
1058 since branches are really cheap - I just want to find out
|
|
|
1059 how much difference the BRANCH_COST macro makes in code */
|
|
|
1060 #define BRANCH_COST(speed_p, predictable_p) (TARGET_BRANCH_CHEAP ? 0 : 1)
|
|
|
1061
|
|
|
1062
|
|
|
1063 #define COMPARE_FLAG_MODE HImode
|
